45e9809aff7304721fddb95654901b32195c9c7avboxsync/****************************************************************************
45e9809aff7304721fddb95654901b32195c9c7avboxsync*
45e9809aff7304721fddb95654901b32195c9c7avboxsync* Realmode X86 Emulator Library
45e9809aff7304721fddb95654901b32195c9c7avboxsync*
45e9809aff7304721fddb95654901b32195c9c7avboxsync* Copyright (C) 1996-1999 SciTech Software, Inc.
45e9809aff7304721fddb95654901b32195c9c7avboxsync* Copyright (C) David Mosberger-Tang
45e9809aff7304721fddb95654901b32195c9c7avboxsync* Copyright (C) 1999 Egbert Eich
45e9809aff7304721fddb95654901b32195c9c7avboxsync*
45e9809aff7304721fddb95654901b32195c9c7avboxsync* ========================================================================
45e9809aff7304721fddb95654901b32195c9c7avboxsync*
45e9809aff7304721fddb95654901b32195c9c7avboxsync* Permission to use, copy, modify, distribute, and sell this software and
45e9809aff7304721fddb95654901b32195c9c7avboxsync* its documentation for any purpose is hereby granted without fee,
45e9809aff7304721fddb95654901b32195c9c7avboxsync* provided that the above copyright notice appear in all copies and that
45e9809aff7304721fddb95654901b32195c9c7avboxsync* both that copyright notice and this permission notice appear in
45e9809aff7304721fddb95654901b32195c9c7avboxsync* supporting documentation, and that the name of the authors not be used
45e9809aff7304721fddb95654901b32195c9c7avboxsync* in advertising or publicity pertaining to distribution of the software
45e9809aff7304721fddb95654901b32195c9c7avboxsync* without specific, written prior permission. The authors makes no
45e9809aff7304721fddb95654901b32195c9c7avboxsync* representations about the suitability of this software for any purpose.
45e9809aff7304721fddb95654901b32195c9c7avboxsync* It is provided "as is" without express or implied warranty.
45e9809aff7304721fddb95654901b32195c9c7avboxsync*
45e9809aff7304721fddb95654901b32195c9c7avboxsync* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
45e9809aff7304721fddb95654901b32195c9c7avboxsync* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
45e9809aff7304721fddb95654901b32195c9c7avboxsync* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
45e9809aff7304721fddb95654901b32195c9c7avboxsync* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
45e9809aff7304721fddb95654901b32195c9c7avboxsync* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
45e9809aff7304721fddb95654901b32195c9c7avboxsync* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
45e9809aff7304721fddb95654901b32195c9c7avboxsync* PERFORMANCE OF THIS SOFTWARE.
45e9809aff7304721fddb95654901b32195c9c7avboxsync*
45e9809aff7304721fddb95654901b32195c9c7avboxsync* ========================================================================
45e9809aff7304721fddb95654901b32195c9c7avboxsync*
45e9809aff7304721fddb95654901b32195c9c7avboxsync* Language: ANSI C
45e9809aff7304721fddb95654901b32195c9c7avboxsync* Environment: Any
45e9809aff7304721fddb95654901b32195c9c7avboxsync* Developer: Kendall Bennett
45e9809aff7304721fddb95654901b32195c9c7avboxsync*
45e9809aff7304721fddb95654901b32195c9c7avboxsync* Description: Header file for FPU register definitions.
45e9809aff7304721fddb95654901b32195c9c7avboxsync*
45e9809aff7304721fddb95654901b32195c9c7avboxsync****************************************************************************/
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#ifndef __X86EMU_FPU_REGS_H
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define __X86EMU_FPU_REGS_H
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#ifdef X86_FPU_SUPPORT
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#ifdef PACK
45e9809aff7304721fddb95654901b32195c9c7avboxsync# pragma PACK
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync/* Basic 8087 register can hold any of the following values: */
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsyncunion x86_fpu_reg_u {
45e9809aff7304721fddb95654901b32195c9c7avboxsync s8 tenbytes[10];
45e9809aff7304721fddb95654901b32195c9c7avboxsync double dval;
45e9809aff7304721fddb95654901b32195c9c7avboxsync float fval;
45e9809aff7304721fddb95654901b32195c9c7avboxsync s16 sval;
45e9809aff7304721fddb95654901b32195c9c7avboxsync s32 lval;
45e9809aff7304721fddb95654901b32195c9c7avboxsync };
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsyncstruct x86_fpu_reg {
45e9809aff7304721fddb95654901b32195c9c7avboxsync union x86_fpu_reg_u reg;
45e9809aff7304721fddb95654901b32195c9c7avboxsync char tag;
45e9809aff7304721fddb95654901b32195c9c7avboxsync };
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync/*
45e9809aff7304721fddb95654901b32195c9c7avboxsync * Since we are not going to worry about the problems of aliasing
45e9809aff7304721fddb95654901b32195c9c7avboxsync * registers, every time a register is modified, its result type is
45e9809aff7304721fddb95654901b32195c9c7avboxsync * set in the tag fields for that register. If some operation
45e9809aff7304721fddb95654901b32195c9c7avboxsync * attempts to access the type in a way inconsistent with its current
45e9809aff7304721fddb95654901b32195c9c7avboxsync * storage format, then we flag the operation. If common, we'll
45e9809aff7304721fddb95654901b32195c9c7avboxsync * attempt the conversion.
45e9809aff7304721fddb95654901b32195c9c7avboxsync */
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_VALID 0x80
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_REGTYP(r) ((r) & 0x7F)
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_WORD 0x0
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_SHORT 0x1
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_LONG 0x2
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_FLOAT 0x3
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_DOUBLE 0x4
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_LDBL 0x5
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_BSD 0x6
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define X86_FPU_STKTOP 0
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsyncstruct x86_fpu_registers {
45e9809aff7304721fddb95654901b32195c9c7avboxsync struct x86_fpu_reg x86_fpu_stack[8];
45e9809aff7304721fddb95654901b32195c9c7avboxsync int x86_fpu_flags;
45e9809aff7304721fddb95654901b32195c9c7avboxsync int x86_fpu_config; /* rounding modes, etc. */
45e9809aff7304721fddb95654901b32195c9c7avboxsync short x86_fpu_tos, x86_fpu_bos;
45e9809aff7304721fddb95654901b32195c9c7avboxsync };
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#ifdef END_PACK
45e9809aff7304721fddb95654901b32195c9c7avboxsync# pragma END_PACK
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync/*
45e9809aff7304721fddb95654901b32195c9c7avboxsync * There are two versions of the following macro.
45e9809aff7304721fddb95654901b32195c9c7avboxsync *
45e9809aff7304721fddb95654901b32195c9c7avboxsync * One version is for opcode D9, for which there are more than 32
45e9809aff7304721fddb95654901b32195c9c7avboxsync * instructions encoded in the second byte of the opcode.
45e9809aff7304721fddb95654901b32195c9c7avboxsync *
45e9809aff7304721fddb95654901b32195c9c7avboxsync * The other version, deals with all the other 7 i87 opcodes, for
45e9809aff7304721fddb95654901b32195c9c7avboxsync * which there are only 32 strings needed to describe the
45e9809aff7304721fddb95654901b32195c9c7avboxsync * instructions.
45e9809aff7304721fddb95654901b32195c9c7avboxsync */
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* X86_FPU_SUPPORT */
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#ifdef DEBUG
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define DECODE_PRINTINSTR32(t,mod,rh,rl) \
45e9809aff7304721fddb95654901b32195c9c7avboxsync DECODE_PRINTF(t[(mod<<3)+(rh)]);
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define DECODE_PRINTINSTR256(t,mod,rh,rl) \
45e9809aff7304721fddb95654901b32195c9c7avboxsync DECODE_PRINTF(t[(mod<<6)+(rh<<3)+(rl)]);
45e9809aff7304721fddb95654901b32195c9c7avboxsync#else
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define DECODE_PRINTINSTR32(t,mod,rh,rl)
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define DECODE_PRINTINSTR256(t,mod,rh,rl)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif
45e9809aff7304721fddb95654901b32195c9c7avboxsync
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* __X86EMU_FPU_REGS_H */