deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/*
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * Copyright (c) 1997,1998 The XFree86 Project, Inc.
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync *
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * Loosely based on code bearing the following copyright:
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync *
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync *
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * Author: Dirk Hohndel
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#ifndef _VGAHW_H
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define _VGAHW_H
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include <X11/X.h>
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include "misc.h"
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include "input.h"
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include "scrnintstr.h"
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include "colormapst.h"
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include "xf86str.h"
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include "xf86Pci.h"
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include "xf86DDC.h"
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include "globals.h"
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define DPMS_SERVER
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#include <X11/extensions/dpms.h>
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncextern int vgaHWGetIndex(void);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/*
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * access macro
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGAHWPTR(p) ((vgaHWPtr)((p)->privates[vgaHWGetIndex()].ptr))
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/* Standard VGA registers */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_ATTR_INDEX 0x3C0
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_ATTR_DATA_W 0x3C0
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_ATTR_DATA_R 0x3C1
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_IN_STAT_0 0x3C2 /* read */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_MISC_OUT_W 0x3C2 /* write */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_ENABLE 0x3C3
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_SEQ_INDEX 0x3C4
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_SEQ_DATA 0x3C5
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_DAC_MASK 0x3C6
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_DAC_READ_ADDR 0x3C7
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_DAC_WRITE_ADDR 0x3C8
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_DAC_DATA 0x3C9
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_FEATURE_R 0x3CA /* read */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_MISC_OUT_R 0x3CC /* read */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_GRAPH_INDEX 0x3CE
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_GRAPH_DATA 0x3CF
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_IOBASE_MONO 0x3B0
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_IOBASE_COLOR 0x3D0
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_CRTC_INDEX_OFFSET 0x04
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_CRTC_DATA_OFFSET 0x05
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_IN_STAT_1_OFFSET 0x0A /* read */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_FEATURE_W_OFFSET 0x0A /* write */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/* default number of VGA registers stored internally */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_NUM_CRTC 25
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_NUM_SEQ 5
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_NUM_GFX 9
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_NUM_ATTR 21
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/* Flags for vgaHWSave() and vgaHWRestore() */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_SR_MODE 0x01
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_SR_FONTS 0x02
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_SR_CMAP 0x04
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_SR_ALL (VGA_SR_MODE | VGA_SR_FONTS | VGA_SR_CMAP)
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/* Defaults for the VGA memory window */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_DEFAULT_PHYS_ADDR 0xA0000
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGA_DEFAULT_MEM_SIZE (64 * 1024)
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/*
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * vgaRegRec contains settings of standard VGA registers.
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef struct {
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char MiscOutReg; /* */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char *CRTC; /* Crtc Controller */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char *Sequencer; /* Video Sequencer */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char *Graphics; /* Video Graphics */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char *Attribute; /* Video Atribute */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char DAC[768]; /* Internal Colorlookuptable */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char numCRTC; /* number of CRTC registers, def=VGA_NUM_CRTC */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char numSequencer; /* number of seq registers, def=VGA_NUM_SEQ */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char numGraphics; /* number of gfx registers, def=VGA_NUM_GFX */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned char numAttribute; /* number of attr registers, def=VGA_NUM_ATTR */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync} vgaRegRec, *vgaRegPtr;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef struct _vgaHWRec *vgaHWPtr;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef void (*vgaHWWriteIndexProcPtr)(vgaHWPtr hwp, CARD8 indx, CARD8 value);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef CARD8 (*vgaHWReadIndexProcPtr)(vgaHWPtr hwp, CARD8 indx);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef void (*vgaHWWriteProcPtr)(vgaHWPtr hwp, CARD8 value);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef CARD8 (*vgaHWReadProcPtr)(vgaHWPtr hwp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef void (*vgaHWMiscProcPtr)(vgaHWPtr hwp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/*
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * vgaHWRec contains per-screen information required by the vgahw module.
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync *
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * Note, the palette referred to by the paletteEnabled, enablePalette and
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * disablePalette is the 16-entry (+overscan) EGA-compatible palette accessed
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync * via the first 17 attribute registers and not the main 8-bit palette.
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef struct _vgaHWRec {
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync pointer Base; /* Address of "VGA" memory */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync int MapSize; /* Size of "VGA" memory */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned long MapPhys; /* phys location of VGA mem */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync int IOBase; /* I/O Base address */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync CARD8 * MMIOBase; /* Pointer to MMIO start */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync int MMIOOffset; /* base + offset + vgareg
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync = mmioreg */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync pointer FontInfo1; /* save area for fonts in
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync plane 2 */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync pointer FontInfo2; /* save area for fonts in
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync plane 3 */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync pointer TextInfo; /* save area for text */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaRegRec SavedReg; /* saved registers */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaRegRec ModeReg; /* register settings for
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync current mode */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync Bool ShowOverscan;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync Bool paletteEnabled;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync Bool cmapSaved;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync ScrnInfoPtr pScrn;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteIndexProcPtr writeCrtc;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadIndexProcPtr readCrtc;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteIndexProcPtr writeGr;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadIndexProcPtr readGr;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadProcPtr readST00;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadProcPtr readST01;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadProcPtr readFCR;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteProcPtr writeFCR;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteIndexProcPtr writeAttr;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadIndexProcPtr readAttr;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteIndexProcPtr writeSeq;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadIndexProcPtr readSeq;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteProcPtr writeMiscOut;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadProcPtr readMiscOut;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWMiscProcPtr enablePalette;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWMiscProcPtr disablePalette;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteProcPtr writeDacMask;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadProcPtr readDacMask;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteProcPtr writeDacWriteAddr;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteProcPtr writeDacReadAddr;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteProcPtr writeDacData;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadProcPtr readDacData;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync pointer ddc;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync IOADDRESS PIOOffset; /* offset + vgareg
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync = pioreg */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWReadProcPtr readEnable;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync vgaHWWriteProcPtr writeEnable;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync PCITAG Tag;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync} vgaHWRec;
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/* Some macros that VGA drivers can use in their ChipProbe() function */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define VGAHW_GET_IOBASE() ((inb(VGA_MISC_OUT_R) & 0x01) ? \
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync VGA_IOBASE_COLOR : VGA_IOBASE_MONO)
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define OVERSCAN 0x11 /* Index of OverScan register */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/* Flags that define how overscan correction should take place */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define KGA_FIX_OVERSCAN 1 /* overcan correction required */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define KGA_ENABLE_ON_ZERO 2 /* if possible enable display at beginning */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync /* of next scanline/frame */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define KGA_BE_TOT_DEC 4 /* always fix problem by setting blank end */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync /* to total - 1 */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define BIT_PLANE 3 /* Which plane we write to in mono mode */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define BITS_PER_GUN 6
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define COLORMAP_SIZE 256
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#if defined(__powerpc__) || defined(__arm__) || defined(__s390__)
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define DACDelay(hw) /* No legacy VGA support */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#else
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#define DACDelay(hw) \
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync do { \
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync (void)inb((hw)->PIOOffset + (hw)->IOBase + VGA_IN_STAT_1_OFFSET); \
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync (void)inb((hw)->PIOOffset + (hw)->IOBase + VGA_IN_STAT_1_OFFSET); \
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync } while (0)
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#endif
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/* Function Prototypes */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync/* vgaHW.c */
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef void vgaHWProtectProc(ScrnInfoPtr, Bool);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsynctypedef void vgaHWBlankScreenProc(ScrnInfoPtr, Bool);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWSetStdFuncs(vgaHWPtr hwp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWSetMmioFuncs(vgaHWPtr hwp, CARD8 *base, int offset);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWProtect(ScrnInfoPtr pScrn, Bool on);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvgaHWProtectProc *vgaHWProtectWeak(void);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncBool vgaHWSaveScreen(ScreenPtr pScreen, int mode);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWBlankScreen(ScrnInfoPtr pScrn, Bool on);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvgaHWBlankScreenProc *vgaHWBlankScreenWeak(void);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWSeqReset(vgaHWPtr hwp, Bool start);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWRestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWRestoreMode(ScrnInfoPtr scrninfp, vgaRegPtr restore);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWRestoreColormap(ScrnInfoPtr scrninfp, vgaRegPtr restore);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWRestore(ScrnInfoPtr scrninfp, vgaRegPtr restore, int flags);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWSaveMode(ScrnInfoPtr scrninfp, vgaRegPtr save);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWSave(ScrnInfoPtr scrninfp, vgaRegPtr save, int flags);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncBool vgaHWInit(ScrnInfoPtr scrnp, DisplayModePtr mode);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncBool vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, int numSequencer,
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync int numGraphics, int numAttribute);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncBool vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncBool vgaHWGetHWRec(ScrnInfoPtr scrp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWFreeHWRec(ScrnInfoPtr scrp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncBool vgaHWMapMem(ScrnInfoPtr scrp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWUnmapMem(ScrnInfoPtr scrp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWGetIOBase(vgaHWPtr hwp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWLock(vgaHWPtr hwp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWUnlock(vgaHWPtr hwp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWEnable(vgaHWPtr hwp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWDisable(vgaHWPtr hwp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncBool vgaHWHandleColormaps(ScreenPtr pScreen);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncvoid vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncCARD32 vgaHWHBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned int Flags);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncCARD32 vgaHWVBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync unsigned int Flags);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncBool vgaHWAllocDefaultRegs(vgaRegPtr regp);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncDDC1SetSpeedProc vgaHWddc1SetSpeedWeak(void);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsyncSaveScreenProcPtr vgaHWSaveScreenWeak(void);
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync
deb4998ba50060c48cce222fd18a8eed053918d7vboxsync#endif /* _VGAHW_H */