xf86DDC.h revision 61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4cc
/* xf86DDC.h
*
* This file contains all information to interpret a standard EDIC block
* transmitted by a display device via DDC (Display Data Channel). So far
* there is no information to deal with optional EDID blocks.
* DDC is a Trademark of VESA (Video Electronics Standard Association).
*
* Copyright 1998 by Egbert Eich <Egbert.Eich@Physik.TU-Darmstadt.DE>
*/
#ifndef XF86_DDC_H
#define XF86_DDC_H
#include "edid.h"
#include "xf86i2c.h"
#include "xf86str.h"
/* speed up / slow down */
typedef enum {
} xf86ddcSpeed;
unsigned
int (*DDC1Read) (ScrnInfoPtr)
);
extern _X_EXPORT void
extern _X_EXPORT void
extern _X_EXPORT DisplayModePtr
/*
* Quirks to work around broken EDID data from various monitors.
*/
typedef enum {
DDC_QUIRK_NONE = 0,
/* First detailed mode is bogus, prefer largest mode at 60hz */
DDC_QUIRK_PREFER_LARGE_60 = 1 << 0,
/* 135MHz clock is too high, drop a bit */
/* Prefer the largest mode at 75 Hz */
/* Convert detailed timing's horizontal from units of cm to mm */
/* Convert detailed timing's vertical from units of cm to mm */
/* Detailed timing descriptors have bogus size values, so just take the
* maximum size and use that.
*/
/* Monitor forgot to set the first detailed is preferred bit. */
/* use +hsync +vsync for detailed mode */
/* Force single-link DVI bandwidth limit */
} ddc_quirk_t;
typedef void (*handle_detailed_fn) (struct detailed_monitor_section *, void *);
typedef void (*handle_video_fn) (struct cea_video_block *, void *);
#endif