61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync * This file contains all information to interpret a standard EDIC block
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync * transmitted by a display device via DDC (Display Data Channel). So far
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync * there is no information to deal with optional EDID blocks.
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync * DDC is a Trademark of VESA (Video Electronics Standard Association).
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync * Copyright 1998 by Egbert Eich <Egbert.Eich@Physik.TU-Darmstadt.DE>
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync/* speed up / slow down */
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsynctypedef enum {
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsynctypedef void (*DDC1SetSpeedProc) (ScrnInfoPtr, xf86ddcSpeed);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncextern _X_EXPORT xf86MonPtr xf86DoEDID_DDC1(ScrnInfoPtr pScrn,
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncextern _X_EXPORT xf86MonPtr xf86DoEDID_DDC2(ScrnInfoPtr pScrn, I2CBusPtr pBus);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncextern _X_EXPORT xf86MonPtr xf86DoEEDID(ScrnInfoPtr pScrn, I2CBusPtr pBus, Bool);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncextern _X_EXPORT xf86MonPtr xf86PrintEDID(xf86MonPtr monPtr);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncextern _X_EXPORT xf86MonPtr xf86InterpretEDID(int screenIndex, Uchar * block);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncextern _X_EXPORT xf86MonPtr xf86InterpretEEDID(int screenIndex, Uchar * block);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync xf86EdidMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncextern _X_EXPORT Bool xf86SetDDCproperties(ScrnInfoPtr pScreen, xf86MonPtr DDC);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncextern _X_EXPORT xf86MonPtr xf86DoDisplayID(ScrnInfoPtr pScrn, I2CBusPtr pBus);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync xf86DisplayIDMonitorSet(int scrnIndex, MonPtr mon, xf86MonPtr DDC);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncFindDMTMode(int hsize, int vsize, int refresh, Bool rb);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync * Quirks to work around broken EDID data from various monitors.
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsynctypedef enum {
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync /* First detailed mode is bogus, prefer largest mode at 60hz */
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync /* 135MHz clock is too high, drop a bit */
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync /* Prefer the largest mode at 75 Hz */
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync /* Convert detailed timing's horizontal from units of cm to mm */
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync /* Convert detailed timing's vertical from units of cm to mm */
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync /* Detailed timing descriptors have bogus size values, so just take the
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync * maximum size and use that.
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync /* Monitor forgot to set the first detailed is preferred bit. */
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync /* use +hsync +vsync for detailed mode */
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsync /* Force single-link DVI bandwidth limit */
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsynctypedef void (*handle_detailed_fn) (struct detailed_monitor_section *, void *);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncvoid xf86ForEachDetailedBlock(xf86MonPtr mon, handle_detailed_fn, void *data);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncddc_quirk_t xf86DDCDetectQuirks(int scrnIndex, xf86MonPtr DDC, Bool verbose);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncvoid xf86DetTimingApplyQuirks(struct detailed_monitor_section *det_mon,
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsynctypedef void (*handle_video_fn) (struct cea_video_block *, void *);
61cb83a8ccd1dd7f671f31fa93c9d8b7be09b4ccvboxsyncvoid xf86ForEachVideoBlock(xf86MonPtr, handle_video_fn, void *);