65fea56f17cd614bc8908264df980a62e1931468vboxsync * This file contains all information to interpret a standard EDIC block
65fea56f17cd614bc8908264df980a62e1931468vboxsync * transmitted by a display device via DDC (Display Data Channel). So far
65fea56f17cd614bc8908264df980a62e1931468vboxsync * there is no information to deal with optional EDID blocks.
65fea56f17cd614bc8908264df980a62e1931468vboxsync * DDC is a Trademark of VESA (Video Electronics Standard Association).
65fea56f17cd614bc8908264df980a62e1931468vboxsync * Copyright 1998 by Egbert Eich <Egbert.Eich@Physik.TU-Darmstadt.DE>
65fea56f17cd614bc8908264df980a62e1931468vboxsync/* speed up / slow down */
65fea56f17cd614bc8908264df980a62e1931468vboxsynctypedef enum {
65fea56f17cd614bc8908264df980a62e1931468vboxsynctypedef void (*DDC1SetSpeedProc) (ScrnInfoPtr, xf86ddcSpeed);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT xf86MonPtr xf86DoEDID_DDC1(ScrnInfoPtr pScrn,
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT xf86MonPtr xf86DoEDID_DDC2(ScrnInfoPtr pScrn, I2CBusPtr pBus);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT xf86MonPtr xf86DoEEDID(ScrnInfoPtr pScrn, I2CBusPtr pBus, Bool);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT xf86MonPtr xf86PrintEDID(xf86MonPtr monPtr);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT xf86MonPtr xf86InterpretEDID(int screenIndex, Uchar * block);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT xf86MonPtr xf86InterpretEEDID(int screenIndex, Uchar * block);
65fea56f17cd614bc8908264df980a62e1931468vboxsync xf86EdidMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT Bool xf86SetDDCproperties(ScrnInfoPtr pScreen, xf86MonPtr DDC);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT xf86MonPtr xf86DoDisplayID(ScrnInfoPtr pScrn, I2CBusPtr pBus);
65fea56f17cd614bc8908264df980a62e1931468vboxsync xf86DisplayIDMonitorSet(int scrnIndex, MonPtr mon, xf86MonPtr DDC);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncFindDMTMode(int hsize, int vsize, int refresh, Bool rb);
65fea56f17cd614bc8908264df980a62e1931468vboxsync * Quirks to work around broken EDID data from various monitors.
65fea56f17cd614bc8908264df980a62e1931468vboxsynctypedef enum {
65fea56f17cd614bc8908264df980a62e1931468vboxsync /* First detailed mode is bogus, prefer largest mode at 60hz */
65fea56f17cd614bc8908264df980a62e1931468vboxsync /* 135MHz clock is too high, drop a bit */
65fea56f17cd614bc8908264df980a62e1931468vboxsync /* Prefer the largest mode at 75 Hz */
65fea56f17cd614bc8908264df980a62e1931468vboxsync /* Convert detailed timing's horizontal from units of cm to mm */
65fea56f17cd614bc8908264df980a62e1931468vboxsync /* Convert detailed timing's vertical from units of cm to mm */
65fea56f17cd614bc8908264df980a62e1931468vboxsync /* Detailed timing descriptors have bogus size values, so just take the
65fea56f17cd614bc8908264df980a62e1931468vboxsync * maximum size and use that.
65fea56f17cd614bc8908264df980a62e1931468vboxsync /* Monitor forgot to set the first detailed is preferred bit. */
65fea56f17cd614bc8908264df980a62e1931468vboxsync /* use +hsync +vsync for detailed mode */
65fea56f17cd614bc8908264df980a62e1931468vboxsync /* Force single-link DVI bandwidth limit */
65fea56f17cd614bc8908264df980a62e1931468vboxsynctypedef void (*handle_detailed_fn) (struct detailed_monitor_section *, void *);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncvoid xf86ForEachDetailedBlock(xf86MonPtr mon, handle_detailed_fn, void *data);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncddc_quirk_t xf86DDCDetectQuirks(int scrnIndex, xf86MonPtr DDC, Bool verbose);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncvoid xf86DetTimingApplyQuirks(struct detailed_monitor_section *det_mon,
65fea56f17cd614bc8908264df980a62e1931468vboxsynctypedef void (*handle_video_fn) (struct cea_video_block *, void *);