65fea56f17cd614bc8908264df980a62e1931468vboxsync/****************************************************************************
65fea56f17cd614bc8908264df980a62e1931468vboxsync*
65fea56f17cd614bc8908264df980a62e1931468vboxsync* Realmode X86 Emulator Library
65fea56f17cd614bc8908264df980a62e1931468vboxsync*
65fea56f17cd614bc8908264df980a62e1931468vboxsync* Copyright (C) 1996-1999 SciTech Software, Inc.
65fea56f17cd614bc8908264df980a62e1931468vboxsync* Copyright (C) David Mosberger-Tang
65fea56f17cd614bc8908264df980a62e1931468vboxsync* Copyright (C) 1999 Egbert Eich
65fea56f17cd614bc8908264df980a62e1931468vboxsync*
65fea56f17cd614bc8908264df980a62e1931468vboxsync* ========================================================================
65fea56f17cd614bc8908264df980a62e1931468vboxsync*
65fea56f17cd614bc8908264df980a62e1931468vboxsync* Permission to use, copy, modify, distribute, and sell this software and
65fea56f17cd614bc8908264df980a62e1931468vboxsync* its documentation for any purpose is hereby granted without fee,
65fea56f17cd614bc8908264df980a62e1931468vboxsync* provided that the above copyright notice appear in all copies and that
65fea56f17cd614bc8908264df980a62e1931468vboxsync* both that copyright notice and this permission notice appear in
65fea56f17cd614bc8908264df980a62e1931468vboxsync* supporting documentation, and that the name of the authors not be used
65fea56f17cd614bc8908264df980a62e1931468vboxsync* in advertising or publicity pertaining to distribution of the software
65fea56f17cd614bc8908264df980a62e1931468vboxsync* without specific, written prior permission. The authors makes no
65fea56f17cd614bc8908264df980a62e1931468vboxsync* representations about the suitability of this software for any purpose.
65fea56f17cd614bc8908264df980a62e1931468vboxsync* It is provided "as is" without express or implied warranty.
65fea56f17cd614bc8908264df980a62e1931468vboxsync*
65fea56f17cd614bc8908264df980a62e1931468vboxsync* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
65fea56f17cd614bc8908264df980a62e1931468vboxsync* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
65fea56f17cd614bc8908264df980a62e1931468vboxsync* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
65fea56f17cd614bc8908264df980a62e1931468vboxsync* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
65fea56f17cd614bc8908264df980a62e1931468vboxsync* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
65fea56f17cd614bc8908264df980a62e1931468vboxsync* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
65fea56f17cd614bc8908264df980a62e1931468vboxsync* PERFORMANCE OF THIS SOFTWARE.
65fea56f17cd614bc8908264df980a62e1931468vboxsync*
65fea56f17cd614bc8908264df980a62e1931468vboxsync* ========================================================================
65fea56f17cd614bc8908264df980a62e1931468vboxsync*
65fea56f17cd614bc8908264df980a62e1931468vboxsync* Language: ANSI C
65fea56f17cd614bc8908264df980a62e1931468vboxsync* Environment: Any
65fea56f17cd614bc8908264df980a62e1931468vboxsync* Developer: Kendall Bennett
65fea56f17cd614bc8908264df980a62e1931468vboxsync*
65fea56f17cd614bc8908264df980a62e1931468vboxsync* Description: Header file for FPU register definitions.
65fea56f17cd614bc8908264df980a62e1931468vboxsync*
65fea56f17cd614bc8908264df980a62e1931468vboxsync****************************************************************************/
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#ifndef __X86EMU_FPU_REGS_H
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define __X86EMU_FPU_REGS_H
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#ifdef X86_FPU_SUPPORT
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#ifdef PACK
65fea56f17cd614bc8908264df980a62e1931468vboxsync#pragma PACK
65fea56f17cd614bc8908264df980a62e1931468vboxsync#endif
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync/* Basic 8087 register can hold any of the following values: */
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsyncunion x86_fpu_reg_u {
65fea56f17cd614bc8908264df980a62e1931468vboxsync s8 tenbytes[10];
65fea56f17cd614bc8908264df980a62e1931468vboxsync double dval;
65fea56f17cd614bc8908264df980a62e1931468vboxsync float fval;
65fea56f17cd614bc8908264df980a62e1931468vboxsync s16 sval;
65fea56f17cd614bc8908264df980a62e1931468vboxsync s32 lval;
65fea56f17cd614bc8908264df980a62e1931468vboxsync};
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsyncstruct x86_fpu_reg {
65fea56f17cd614bc8908264df980a62e1931468vboxsync union x86_fpu_reg_u reg;
65fea56f17cd614bc8908264df980a62e1931468vboxsync char tag;
65fea56f17cd614bc8908264df980a62e1931468vboxsync};
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync/*
65fea56f17cd614bc8908264df980a62e1931468vboxsync * Since we are not going to worry about the problems of aliasing
65fea56f17cd614bc8908264df980a62e1931468vboxsync * registers, every time a register is modified, its result type is
65fea56f17cd614bc8908264df980a62e1931468vboxsync * set in the tag fields for that register. If some operation
65fea56f17cd614bc8908264df980a62e1931468vboxsync * attempts to access the type in a way inconsistent with its current
65fea56f17cd614bc8908264df980a62e1931468vboxsync * storage format, then we flag the operation. If common, we'll
65fea56f17cd614bc8908264df980a62e1931468vboxsync * attempt the conversion.
65fea56f17cd614bc8908264df980a62e1931468vboxsync */
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_VALID 0x80
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_REGTYP(r) ((r) & 0x7F)
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_WORD 0x0
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_SHORT 0x1
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_LONG 0x2
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_FLOAT 0x3
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_DOUBLE 0x4
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_LDBL 0x5
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_BSD 0x6
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define X86_FPU_STKTOP 0
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsyncstruct x86_fpu_registers {
65fea56f17cd614bc8908264df980a62e1931468vboxsync struct x86_fpu_reg x86_fpu_stack[8];
65fea56f17cd614bc8908264df980a62e1931468vboxsync int x86_fpu_flags;
65fea56f17cd614bc8908264df980a62e1931468vboxsync int x86_fpu_config; /* rounding modes, etc. */
65fea56f17cd614bc8908264df980a62e1931468vboxsync short x86_fpu_tos, x86_fpu_bos;
65fea56f17cd614bc8908264df980a62e1931468vboxsync};
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#ifdef END_PACK
65fea56f17cd614bc8908264df980a62e1931468vboxsync#pragma END_PACK
65fea56f17cd614bc8908264df980a62e1931468vboxsync#endif
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync/*
65fea56f17cd614bc8908264df980a62e1931468vboxsync * There are two versions of the following macro.
65fea56f17cd614bc8908264df980a62e1931468vboxsync *
65fea56f17cd614bc8908264df980a62e1931468vboxsync * One version is for opcode D9, for which there are more than 32
65fea56f17cd614bc8908264df980a62e1931468vboxsync * instructions encoded in the second byte of the opcode.
65fea56f17cd614bc8908264df980a62e1931468vboxsync *
65fea56f17cd614bc8908264df980a62e1931468vboxsync * The other version, deals with all the other 7 i87 opcodes, for
65fea56f17cd614bc8908264df980a62e1931468vboxsync * which there are only 32 strings needed to describe the
65fea56f17cd614bc8908264df980a62e1931468vboxsync * instructions.
65fea56f17cd614bc8908264df980a62e1931468vboxsync */
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#endif /* X86_FPU_SUPPORT */
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#ifdef DEBUG
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define DECODE_PRINTINSTR32(t,mod,rh,rl) \
65fea56f17cd614bc8908264df980a62e1931468vboxsync DECODE_PRINTF(t[(mod<<3)+(rh)]);
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define DECODE_PRINTINSTR256(t,mod,rh,rl) \
65fea56f17cd614bc8908264df980a62e1931468vboxsync DECODE_PRINTF(t[(mod<<6)+(rh<<3)+(rl)]);
65fea56f17cd614bc8908264df980a62e1931468vboxsync#else
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define DECODE_PRINTINSTR32(t,mod,rh,rl)
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define DECODE_PRINTINSTR256(t,mod,rh,rl)
65fea56f17cd614bc8908264df980a62e1931468vboxsync#endif
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#endif /* __X86EMU_FPU_REGS_H */