65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#include <xf86RamDac.h>
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT unsigned long TIramdacCalculateMNPForClock(unsigned long
65fea56f17cd614bc8908264df980a62e1931468vboxsync RefClock,
65fea56f17cd614bc8908264df980a62e1931468vboxsync unsigned long
65fea56f17cd614bc8908264df980a62e1931468vboxsync ReqClock,
65fea56f17cd614bc8908264df980a62e1931468vboxsync char IsPixClock,
65fea56f17cd614bc8908264df980a62e1931468vboxsync unsigned long
65fea56f17cd614bc8908264df980a62e1931468vboxsync MinClock,
65fea56f17cd614bc8908264df980a62e1931468vboxsync unsigned long
65fea56f17cd614bc8908264df980a62e1931468vboxsync MaxClock,
65fea56f17cd614bc8908264df980a62e1931468vboxsync unsigned long *rM,
65fea56f17cd614bc8908264df980a62e1931468vboxsync unsigned long *rN,
65fea56f17cd614bc8908264df980a62e1931468vboxsync unsigned long *rP);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT RamDacHelperRecPtr TIramdacProbe(ScrnInfoPtr pScrn,
65fea56f17cd614bc8908264df980a62e1931468vboxsync RamDacSupportedInfoRecPtr
65fea56f17cd614bc8908264df980a62e1931468vboxsync ramdacs);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT void TIramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec,
65fea56f17cd614bc8908264df980a62e1931468vboxsync RamDacRegRecPtr RamDacRegRec);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT void TIramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec,
65fea56f17cd614bc8908264df980a62e1931468vboxsync RamDacRegRecPtr RamDacRegRec);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT void TIramdac3026SetBpp(ScrnInfoPtr pScrn,
65fea56f17cd614bc8908264df980a62e1931468vboxsync RamDacRegRecPtr RamDacRegRec);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT void TIramdac3030SetBpp(ScrnInfoPtr pScrn,
65fea56f17cd614bc8908264df980a62e1931468vboxsync RamDacRegRecPtr RamDacRegRec);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT void TIramdacHWCursorInit(xf86CursorInfoPtr infoPtr);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT void TIramdacLoadPalette(ScrnInfoPtr pScrn, int numColors,
65fea56f17cd614bc8908264df980a62e1931468vboxsync int *indices, LOCO * colors,
65fea56f17cd614bc8908264df980a62e1931468vboxsync VisualPtr pVisual);
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsynctypedef void TIramdacLoadPaletteProc(ScrnInfoPtr, int, int *, LOCO *,
65fea56f17cd614bc8908264df980a62e1931468vboxsync VisualPtr);
65fea56f17cd614bc8908264df980a62e1931468vboxsyncextern _X_EXPORT TIramdacLoadPaletteProc *TIramdacLoadPaletteWeak(void);
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TI3030_RAMDAC (VENDOR_TI << 16) | 0x00
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TI3026_RAMDAC (VENDOR_TI << 16) | 0x01
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync/*
65fea56f17cd614bc8908264df980a62e1931468vboxsync * TI Ramdac registers
65fea56f17cd614bc8908264df980a62e1931468vboxsync */
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_rev 0x01
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_ind_curs_ctrl 0x06
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_byte_router_ctrl 0x07
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_latch_ctrl 0x0f
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_true_color_ctrl 0x18
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_multiplex_ctrl 0x19
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_clock_select 0x1a
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_palette_page 0x1c
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_general_ctrl 0x1d
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_misc_ctrl 0x1e
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_pll_addr 0x2c
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_pll_pixel_data 0x2d
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_pll_memory_data 0x2e
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_pll_loop_data 0x2f
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_key_over_low 0x30
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_key_over_high 0x31
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_key_red_low 0x32
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_key_red_high 0x33
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_key_green_low 0x34
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_key_green_high 0x35
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_key_blue_low 0x36
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_key_blue_high 0x37
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_key_ctrl 0x38
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_clock_ctrl 0x39
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_sense_test 0x3a
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_test_mode_data 0x3b
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_crc_remain_lsb 0x3c
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_crc_remain_msb 0x3d
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_crc_bit_select 0x3e
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_id 0x3f
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync/* These are pll values that are accessed via TIDAC_pll_pixel_data */
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_PIXEL_N 0x80
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_PIXEL_M 0x81
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_PIXEL_P 0x82
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_PIXEL_VALID 0x83
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync/* These are pll values that are accessed via TIDAC_pll_loop_data */
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_LOOP_N 0x90
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_LOOP_M 0x91
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_LOOP_P 0x92
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_LOOP_VALID 0x93
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync/* Direct mapping addresses */
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_INDEX 0xa0
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_PALETTE_DATA 0xa1
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_READ_MASK 0xa2
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_READ_ADDR 0xa3
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_CURS_WRITE_ADDR 0xa4
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_CURS_COLOR 0xa5
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_CURS_READ_ADDR 0xa7
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_CURS_CTL 0xa9
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_INDEXED_DATA 0xaa
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_CURS_RAM_DATA 0xab
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_CURS_XLOW 0xac
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_CURS_XHIGH 0xad
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_CURS_YLOW 0xae
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_CURS_YHIGH 0xaf
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_sw_reset 0xff
65fea56f17cd614bc8908264df980a62e1931468vboxsync
65fea56f17cd614bc8908264df980a62e1931468vboxsync/* Constants */
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_TVP_3026_ID 0x26
65fea56f17cd614bc8908264df980a62e1931468vboxsync#define TIDAC_TVP_3030_ID 0x30