03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* xf86DDC.h
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync *
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync * This file contains all information to interpret a standard EDIC block
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync * transmitted by a display device via DDC (Display Data Channel). So far
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync * there is no information to deal with optional EDID blocks.
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync * DDC is a Trademark of VESA (Video Electronics Standard Association).
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync *
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync * Copyright 1998 by Egbert Eich <Egbert.Eich@Physik.TU-Darmstadt.DE>
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync#ifndef XF86_DDC_H
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync#define XF86_DDC_H
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync#include "edid.h"
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync#include "xf86i2c.h"
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync#include "xf86str.h"
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* speed up / slow down */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsynctypedef enum {
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_SLOW,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_FAST
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync} xf86ddcSpeed;
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsynctypedef void (*DDC1SetSpeedProc) (ScrnInfoPtr, xf86ddcSpeed);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT xf86MonPtr xf86DoEDID_DDC1(ScrnInfoPtr pScrn,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC1SetSpeedProc DDC1SetSpeed,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync int (*DDC1Read) (ScrnInfoPtr)
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync );
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT xf86MonPtr xf86DoEDID_DDC2(ScrnInfoPtr pScrn, I2CBusPtr pBus);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT xf86MonPtr xf86DoEEDID(ScrnInfoPtr pScrn, I2CBusPtr pBus, Bool);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT xf86MonPtr xf86PrintEDID(xf86MonPtr monPtr);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT xf86MonPtr xf86InterpretEDID(int screenIndex, Uchar * block);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT xf86MonPtr xf86InterpretEEDID(int screenIndex, Uchar * block);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT void
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync xf86EdidMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT Bool xf86SetDDCproperties(ScrnInfoPtr pScreen, xf86MonPtr DDC);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT DisplayModePtr xf86DDCGetModes(int scrnIndex, xf86MonPtr DDC);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT Bool
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync xf86MonitorIsHDMI(xf86MonPtr mon);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT xf86MonPtr xf86DoDisplayID(ScrnInfoPtr pScrn, I2CBusPtr pBus);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT void
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync xf86DisplayIDMonitorSet(int scrnIndex, MonPtr mon, xf86MonPtr DDC);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT DisplayModePtr
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncFindDMTMode(int hsize, int vsize, int refresh, Bool rb);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT const DisplayModeRec DMTModes[];
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/*
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync * Quirks to work around broken EDID data from various monitors.
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsynctypedef enum {
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_NONE = 0,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync /* First detailed mode is bogus, prefer largest mode at 60hz */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_PREFER_LARGE_60 = 1 << 0,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync /* 135MHz clock is too high, drop a bit */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_135_CLOCK_TOO_HIGH = 1 << 1,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync /* Prefer the largest mode at 75 Hz */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_PREFER_LARGE_75 = 1 << 2,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync /* Convert detailed timing's horizontal from units of cm to mm */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_DETAILED_H_IN_CM = 1 << 3,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync /* Convert detailed timing's vertical from units of cm to mm */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_DETAILED_V_IN_CM = 1 << 4,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync /* Detailed timing descriptors have bogus size values, so just take the
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync * maximum size and use that.
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE = 1 << 5,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync /* Monitor forgot to set the first detailed is preferred bit. */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_FIRST_DETAILED_PREFERRED = 1 << 6,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync /* use +hsync +vsync for detailed mode */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_DETAILED_SYNC_PP = 1 << 7,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync /* Force single-link DVI bandwidth limit */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync DDC_QUIRK_DVI_SINGLE_LINK = 1 << 8,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync} ddc_quirk_t;
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsynctypedef void (*handle_detailed_fn) (struct detailed_monitor_section *, void *);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncvoid xf86ForEachDetailedBlock(xf86MonPtr mon, handle_detailed_fn, void *data);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncddc_quirk_t xf86DDCDetectQuirks(int scrnIndex, xf86MonPtr DDC, Bool verbose);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncvoid xf86DetTimingApplyQuirks(struct detailed_monitor_section *det_mon,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync ddc_quirk_t quirks, int hsize, int vsize);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsynctypedef void (*handle_video_fn) (struct cea_video_block *, void *);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncvoid xf86ForEachVideoBlock(xf86MonPtr, handle_video_fn, void *);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync#endif