IBM.h revision 03532efdc331b598d3dedc8cc7477641c3b0dd12
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT RamDacHelperRecPtr IBMramdacProbe(ScrnInfoPtr pScrn,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT void IBMramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT void IBMramdacRestore(ScrnInfoPtr pScrn,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT void IBMramdac526SetBpp(ScrnInfoPtr pScrn,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT void IBMramdac640SetBpp(ScrnInfoPtr pScrn,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT unsigned long IBMramdac526CalculateMNPCForClock(unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT unsigned long IBMramdac640CalculateMNPCForClock(unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync unsigned long
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT void IBMramdac526HWCursorInit(xf86CursorInfoPtr infoPtr);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT void IBMramdac640HWCursorInit(xf86CursorInfoPtr infoPtr);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsynctypedef void IBMramdac526SetBppProc(ScrnInfoPtr, RamDacRegRecPtr);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsyncextern _X_EXPORT IBMramdac526SetBppProc *IBMramdac526SetBppWeak(void);
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync * IBM Ramdac registers
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* #define IBMRGB_f0 0x20 */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* Constants rgb525.h */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_REVISION_LEVEL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_ID */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_MISC_CTRL_1 */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_MISC_CTRL_2 */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_MISC_CTRL_3 */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_MISC_CLK_CTRL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_SYNC_CTRL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_HSYNC_CTRL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync#define HSYN_POS(n) (n)
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_POWER_MANAGEMENT */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_DAC_OPERATION */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_PALETTE_CTRL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_PIXEL_FORMAT */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_8BPP_CTRL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_16BPP_CTRL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_24BPP_CTRL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_32BPP_CTRL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_PLL_CTRL_1 */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_PLL_CTRL_2 */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_PLL_REF_DIV_COUNT */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_F0 - RGB525_F15 */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_PLL_REFCLK values */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_CURSOR_CONTROL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_REVISION_LEVEL */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* RGB525_ID */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* MISR status */
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync/* the IBMRGB640 is rather different from the rest of the RAMDACs,
03532efdc331b598d3dedc8cc7477641c3b0dd12vboxsync so we define a completely new set of register names for it */