a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Copyright (c) 1997,1998 The XFree86 Project, Inc.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Loosely based on code bearing the following copyright:
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Author: Dirk Hohndel
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * access macro
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define VGAHWPTR(p) ((vgaHWPtr)((p)->privates[vgaHWGetIndex()].ptr))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Standard VGA registers */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* default number of VGA registers stored internally */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Flags for vgaHWSave() and vgaHWRestore() */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define VGA_SR_ALL (VGA_SR_MODE | VGA_SR_FONTS | VGA_SR_CMAP)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Defaults for the VGA memory window */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * vgaRegRec contains settings of standard VGA registers.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsynctypedef struct {
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned char DAC[768]; /* Internal Colorlookuptable */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned char numCRTC; /* number of CRTC registers, def=VGA_NUM_CRTC */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned char numSequencer; /* number of seq registers, def=VGA_NUM_SEQ */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned char numGraphics; /* number of gfx registers, def=VGA_NUM_GFX */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned char numAttribute; /* number of attr registers, def=VGA_NUM_ATTR */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsynctypedef void (*vgaHWWriteIndexProcPtr) (vgaHWPtr hwp, CARD8 indx, CARD8 value);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsynctypedef CARD8 (*vgaHWReadIndexProcPtr) (vgaHWPtr hwp, CARD8 indx);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsynctypedef void (*vgaHWWriteProcPtr) (vgaHWPtr hwp, CARD8 value);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * vgaHWRec contains per-screen information required by the vgahw module.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Note, the palette referred to by the paletteEnabled, enablePalette and
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * disablePalette is the 16-entry (+overscan) EGA-compatible palette accessed
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * via the first 17 attribute registers and not the main 8-bit palette.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long MapPhys; /* phys location of VGA mem */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync = mmioreg */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync current mode */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Some macros that VGA drivers can use in their ChipProbe() function */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define OVERSCAN 0x11 /* Index of OverScan register */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Flags that define how overscan correction should take place */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define KGA_FIX_OVERSCAN 1 /* overcan correction required */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define KGA_ENABLE_ON_ZERO 2 /* if possible enable display at beginning */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync /* of next scanline/frame */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define KGA_BE_TOT_DEC 4 /* always fix problem by setting blank end */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync /* to total - 1 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define BIT_PLANE 3 /* Which plane we write to in mono mode */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync } while (0)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Function Prototypes */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsynctypedef void vgaHWBlankScreenProc(ScrnInfoPtr, Bool);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWSetStdFuncs(vgaHWPtr hwp);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWSetMmioFuncs(vgaHWPtr hwp, CARD8 *base, int offset);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWProtect(ScrnInfoPtr pScrn, Bool on);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT vgaHWProtectProc *vgaHWProtectWeak(void);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT Bool vgaHWSaveScreen(ScreenPtr pScreen, int mode);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWBlankScreen(ScrnInfoPtr pScrn, Bool on);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT vgaHWBlankScreenProc *vgaHWBlankScreenWeak(void);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWSeqReset(vgaHWPtr hwp, Bool start);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWRestoreFonts(ScrnInfoPtr scrninfp,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWRestoreMode(ScrnInfoPtr scrninfp, vgaRegPtr restore);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWRestoreColormap(ScrnInfoPtr scrninfp,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWRestore(ScrnInfoPtr scrninfp, vgaRegPtr restore,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWSaveMode(ScrnInfoPtr scrninfp, vgaRegPtr save);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWSave(ScrnInfoPtr scrninfp, vgaRegPtr save,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT Bool vgaHWInit(ScrnInfoPtr scrnp, DisplayModePtr mode);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT Bool vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT Bool vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT Bool vgaHWGetHWRec(ScrnInfoPtr scrp);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWFreeHWRec(ScrnInfoPtr scrp);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT Bool vgaHWMapMem(ScrnInfoPtr scrp);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWUnmapMem(ScrnInfoPtr scrp);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT Bool vgaHWHandleColormaps(ScreenPtr pScreen);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT CARD32 vgaHWHBlankKGA(DisplayModePtr mode, vgaRegPtr regp,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT CARD32 vgaHWVBlankKGA(DisplayModePtr mode, vgaRegPtr regp,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT Bool vgaHWAllocDefaultRegs(vgaRegPtr regp);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT DDC1SetSpeedProc vgaHWddc1SetSpeedWeak(void);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT SaveScreenProcPtr vgaHWSaveScreenWeak(void);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void xf86GetClocks(ScrnInfoPtr pScrn, int num,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#endif /* _VGAHW_H */