a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Memory range attribute operations, peformed on /dev/mem
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Memory range attributes */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MDF_UNCACHEABLE (1<<0) /* region not cached */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MDF_WRITECOMBINE (1<<1) /* region supports "write combine"
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * action */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MDF_WRITETHROUGH (1<<2) /* write-through cached */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MDF_WRITEBACK (1<<3) /* write-back cached */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MDF_WRITEPROTECT (1<<4) /* read-only region */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MDF_FIRMWARE (1<<26) /* set by firmware (XXX not useful?) */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MDF_FIXACTIVE (1<<29) /* can't be turned off */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync /* XXX want a flag that says "set and undo when I exit" */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MEMRANGE_GET _IOWR('m', 50, struct mem_range_op)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MEMRANGE_SET _IOW('m', 51, struct mem_range_op)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync __P((struct mem_range_softc * sc, struct mem_range_desc * mrd,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern int mem_range_attr_get __P((struct mem_range_desc * mrd, int *arg));
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern int mem_range_attr_set __P((struct mem_range_desc * mrd, int *arg));