a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * edid.h: defines to parse an EDID block
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * This file contains all information to interpret a standard EDIC block
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * transmitted by a display device via DDC (Display Data Channel). So far
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * there is no information to deal with optional EDID blocks.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * DDC is a Trademark of VESA (Video Electronics Standard Association).
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Copyright 1998 by Egbert Eich <Egbert.Eich@Physik.TU-Darmstadt.DE>
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* read complete EDID record */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* header: 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* vendor section */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define VENDOR_SECTION (HEADER_SECTION + HEADER_LENGTH)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* EDID version */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define VERSION_SECTION (VENDOR_SECTION + VENDOR_LENGTH)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* display information */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define DISPLAY_SECTION (VERSION_SECTION + VERSION_LENGTH)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* supported VESA and other standard timings */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define ESTABLISHED_TIMING_SECTION (DISPLAY_SECTION + DISPLAY_LENGTH)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* non predefined standard timings supported by display */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define STD_TIMING_SECTION (ESTABLISHED_TIMING_SECTION + E_TIMING_LENGTH)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define STD_TIMING_LENGTH (STD_TIMING_INFO_LEN * STD_TIMING_INFO_NUM)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* detailed timing info of non standard timings */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define DET_TIMING_SECTION (STD_TIMING_SECTION + STD_TIMING_LENGTH)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define DET_TIMING_LENGTH (DET_TIMING_INFO_LEN * DET_TIMING_INFO_NUM)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* number of EDID sections to follow */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define NO_EDID (DET_TIMING_SECTION + DET_TIMING_LENGTH)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* one byte checksum */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* extract information from vendor section */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _SERIAL_NO(x) x[0] + (x[1] << 8) + (x[2] << 16) + (x[3] << 24)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _L2(x) ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@'
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* extract information from version section */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* extract information from display section */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define DIGITAL_INTERFACE _DIGITAL_INTERFACE(GET(D_INPUT))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _GAMMA(x) (x == 0xff ? 0.0 : ((x + 100.0)/100.0))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* color characteristics */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define REDX F_CC(I_CC((GET(D_RG_LOW)),(GET(D_REDX)),6))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define REDY F_CC(I_CC((GET(D_RG_LOW)),(GET(D_REDY)),4))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define GREENX F_CC(I_CC((GET(D_RG_LOW)),(GET(D_GREENX)),2))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define GREENY F_CC(I_CC((GET(D_RG_LOW)),(GET(D_GREENY)),0))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define BLUEX F_CC(I_CC((GET(D_BW_LOW)),(GET(D_BLUEX)),6))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define BLUEY F_CC(I_CC((GET(D_BW_LOW)),(GET(D_BLUEY)),4))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define WHITEX F_CC(I_CC((GET(D_BW_LOW)),(GET(D_WHITEX)),2))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define WHITEY F_CC(I_CC((GET(D_BW_LOW)),(GET(D_WHITEY)),0))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* extract information from standard timing section */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* extract information from estabished timing section */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _VALID_TIMING(x) !(((x[0] == 0x01) && (x[1] == 0x01)) \
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* EDID Ver. 1.3 redefined this */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync case RATIO1_1: y = ((v->version > 1 || v->revision > 2) \
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _NEXT_STD_TIMING(x) (x = (x + STD_TIMING_INFO_LEN))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* EDID Ver. >= 1.2 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Returns true if the pointer is the start of a monitor descriptor block
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * instead of a detailed timing descriptor.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Checking the reserved pad fields for zeroes fails on some monitors with
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * broken empty ASCII strings. Only the first two bytes are reliable.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _IS_MONITOR_DESC(x) (x[0] == 0 && x[1] == 0)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _PIXEL_CLOCK(x) (x[0] + (x[1] << 8)) * 10000
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _H_SYNC_OFF(x) (x[8] + ((x[11] & 0xC0) << 2))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _H_SYNC_WIDTH(x) (x[9] + ((x[11] & 0x30) << 4))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _V_SYNC_OFF(x) ((x[10] >> 4) + ((x[11] & 0x0C) << 2))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _V_SYNC_WIDTH(x) ((x[10] & 0x0F) + ((x[11] & 0x03) << 4))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define MAX_CLOCK_KHZ (MAX_CLOCK * 10000) - (_MAX_CLOCK_KHZ(c) * 250)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _MAXWIDTH(x) ((x[13] == 0 ? 0 : x[13] + ((x[12] & 0x03) << 8)) * 8)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _SUPPORTED_BLANKING(x) ((x[15] & 0x18) >> 3)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define WHITEX F_CC(I_CC((GET(D_BW_LOW)),(GET(D_WHITEX)),2))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define WHITEY F_CC(I_CC((GET(D_BW_LOW)),(GET(D_WHITEY)),0))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _WHITEX_ADD(x,y) F_CC(I_CC(((*(x + y))),(*(x + y + 1)),2))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _WHITEY_ADD(x,y) F_CC(I_CC(((*(x + y))),(*(x + y + 2)),0))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define _NEXT_DT_MD_SECTION(x) (x = (x + DET_TIMING_INFO_LEN))
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#endif /* _PARSE_EDID_ */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* input type */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* input voltage level */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Signal level setup */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* sync characteristics */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* DPMS features */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* display type, analog */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* display color encodings, digital */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Msc stuff EDID Ver > 1.1 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* detailed timing misc */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync /* 15 bit hole */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * Be careful when adding new sections; this structure can't grow, it's
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * embedded in the middle of xf86Monitor which is ABI. Sizes below are
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * in bytes, for ILP32 systems. If all else fails just copy the section
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * literally like serial and friends.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync /* color management data */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* old, don't use */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * For DisplayID devices, only the scrnIndex, flags, and rawData fields
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * are meaningful. For EDID, they all are.
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsynctypedef struct {
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define VENDOR_SUPPORT_DC_48bit(x) ( ( (x) >> 6) & 0x01)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define VENDOR_SUPPORT_DC_36bit(x) ( ( (x) >> 5) & 0x01)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define VENDOR_SUPPORT_DC_30bit(x) ( ( (x) >> 4) & 0x01)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define VENDOR_SUPPORT_DC_Y444(x) ( ( (x) >> 3) & 0x01)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#define VENDOR_LATENCY_PRESENT_I(x) ( ( (x) >> 6) & 0x01)
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync /* any other vendor blocks we know about */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync#endif /* _EDID_H_ */