a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT RamDacHelperRecPtr IBMramdacProbe(ScrnInfoPtr pScrn,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void IBMramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void IBMramdacRestore(ScrnInfoPtr pScrn,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void IBMramdac526SetBpp(ScrnInfoPtr pScrn,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void IBMramdac640SetBpp(ScrnInfoPtr pScrn,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT unsigned long IBMramdac526CalculateMNPCForClock(unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT unsigned long IBMramdac640CalculateMNPCForClock(unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync unsigned long
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void IBMramdac526HWCursorInit(xf86CursorInfoPtr infoPtr);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT void IBMramdac640HWCursorInit(xf86CursorInfoPtr infoPtr);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsynctypedef void IBMramdac526SetBppProc(ScrnInfoPtr, RamDacRegRecPtr);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsyncextern _X_EXPORT IBMramdac526SetBppProc *IBMramdac526SetBppWeak(void);
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync * IBM Ramdac registers
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* #define IBMRGB_f0 0x20 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* Constants rgb525.h */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_REVISION_LEVEL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_ID */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_MISC_CTRL_1 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_MISC_CTRL_2 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_MISC_CTRL_3 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_MISC_CLK_CTRL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_SYNC_CTRL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_HSYNC_CTRL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_POWER_MANAGEMENT */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_DAC_OPERATION */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_PALETTE_CTRL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_PIXEL_FORMAT */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_8BPP_CTRL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_16BPP_CTRL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_24BPP_CTRL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_32BPP_CTRL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_PLL_CTRL_1 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_PLL_CTRL_2 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_PLL_REF_DIV_COUNT */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_F0 - RGB525_F15 */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_PLL_REFCLK values */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_CURSOR_CONTROL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_REVISION_LEVEL */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* RGB525_ID */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* MISR status */
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync/* the IBMRGB640 is rather different from the rest of the RAMDACs,
a3f3701cea1ba388e7c877955252bb7375eedebdvboxsync so we define a completely new set of register names for it */