f0ab104f070bc7f569404826fea1828ed985638cvboxsync * This file contains all information to interpret a standard EDIC block
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * transmitted by a display device via DDC (Display Data Channel). So far
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * there is no information to deal with optional EDID blocks.
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * DDC is a Trademark of VESA (Video Electronics Standard Association).
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * Copyright 1998 by Egbert Eich <Egbert.Eich@Physik.TU-Darmstadt.DE>
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/* speed up / slow down */
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef enum {
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef void (* DDC1SetSpeedProc)(ScrnInfoPtr, xf86ddcSpeed);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT xf86MonPtr xf86DoEEDID(int scrnIndex, I2CBusPtr pBus, Bool);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncxf86EdidMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT DisplayModePtr xf86DDCGetModes(int scrnIndex, xf86MonPtr DDC);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncxf86DisplayIDMonitorSet(int scrnIndex, MonPtr mon, xf86MonPtr DDC);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncFindDMTMode(int hsize, int vsize, int refresh, Bool rb);
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * Quirks to work around broken EDID data from various monitors.
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef enum {
f0ab104f070bc7f569404826fea1828ed985638cvboxsync /* First detailed mode is bogus, prefer largest mode at 60hz */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync /* 135MHz clock is too high, drop a bit */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync /* Prefer the largest mode at 75 Hz */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync /* Convert detailed timing's horizontal from units of cm to mm */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync /* Convert detailed timing's vertical from units of cm to mm */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync /* Detailed timing descriptors have bogus size values, so just take the
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * maximum size and use that.
f0ab104f070bc7f569404826fea1828ed985638cvboxsync /* Monitor forgot to set the first detailed is preferred bit. */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync /* use +hsync +vsync for detailed mode */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync /* Force single-link DVI bandwidth limit */
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef void (* handle_detailed_fn)(struct detailed_monitor_section *,void *);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncxf86DDCDetectQuirks(int scrnIndex, xf86MonPtr DDC, Bool verbose);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncvoid xf86DetTimingApplyQuirks(struct detailed_monitor_section *det_mon,
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef void (* handle_video_fn)(struct cea_video_block *, void *);