x11include/xorg-server-1.12.0/vgaHW.h

f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/*
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * Copyright (c) 1997,1998 The XFree86 Project, Inc.
f0ab104f070bc7f569404826fea1828ed985638cvboxsync *
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * Loosely based on code bearing the following copyright:
f0ab104f070bc7f569404826fea1828ed985638cvboxsync *
f0ab104f070bc7f569404826fea1828ed985638cvboxsync *   Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
f0ab104f070bc7f569404826fea1828ed985638cvboxsync *
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * Author: Dirk Hohndel
f0ab104f070bc7f569404826fea1828ed985638cvboxsync */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#ifndef _VGAHW_H
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define _VGAHW_H
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include <X11/X.h>
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include "misc.h"
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include "input.h"
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include "scrnintstr.h"
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include "colormapst.h"
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include "xf86str.h"
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include "xf86Pci.h"
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include "xf86DDC.h"
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include "globals.h"
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#include <X11/extensions/dpmsconst.h>
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT int vgaHWGetIndex(void);
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/*
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * access macro
f0ab104f070bc7f569404826fea1828ed985638cvboxsync */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGAHWPTR(p) ((vgaHWPtr)((p)->privates[vgaHWGetIndex()].ptr))
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/* Standard VGA registers */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_ATTR_INDEX      0x3C0
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_ATTR_DATA_W     0x3C0
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_ATTR_DATA_R     0x3C1
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_IN_STAT_0       0x3C2       /* read */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_MISC_OUT_W      0x3C2       /* write */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_ENABLE      0x3C3
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_SEQ_INDEX       0x3C4
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_SEQ_DATA        0x3C5
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_DAC_MASK        0x3C6
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_DAC_READ_ADDR   0x3C7
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_DAC_WRITE_ADDR  0x3C8
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_DAC_DATA        0x3C9
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_FEATURE_R       0x3CA       /* read */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_MISC_OUT_R      0x3CC       /* read */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_GRAPH_INDEX     0x3CE
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_GRAPH_DATA      0x3CF
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_IOBASE_MONO     0x3B0
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_IOBASE_COLOR    0x3D0
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_CRTC_INDEX_OFFSET   0x04
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_CRTC_DATA_OFFSET    0x05
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_IN_STAT_1_OFFSET    0x0A        /* read */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_FEATURE_W_OFFSET    0x0A        /* write */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/* default number of VGA registers stored internally */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_NUM_CRTC 25
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_NUM_SEQ 5
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_NUM_GFX 9
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_NUM_ATTR 21
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/* Flags for vgaHWSave() and vgaHWRestore() */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_SR_MODE     0x01
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_SR_FONTS        0x02
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_SR_CMAP     0x04
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_SR_ALL      (VGA_SR_MODE | VGA_SR_FONTS | VGA_SR_CMAP)
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/* Defaults for the VGA memory window */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_DEFAULT_PHYS_ADDR   0xA0000
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define VGA_DEFAULT_MEM_SIZE    (64 * 1024)
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/*
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * vgaRegRec contains settings of standard VGA registers.
f0ab104f070bc7f569404826fea1828ed985638cvboxsync */
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef struct {
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char MiscOutReg;     /* */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char *CRTC;       /* Crtc Controller */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char *Sequencer;   /* Video Sequencer */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char *Graphics;    /* Video Graphics */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char *Attribute;  /* Video Atribute */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char DAC[768];       /* Internal Colorlookuptable */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char numCRTC;  /* number of CRTC registers, def=VGA_NUM_CRTC */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char numSequencer; /* number of seq registers, def=VGA_NUM_SEQ */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char numGraphics;  /* number of gfx registers, def=VGA_NUM_GFX */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned char numAttribute; /* number of attr registers, def=VGA_NUM_ATTR */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync} vgaRegRec, *vgaRegPtr;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef struct _vgaHWRec *vgaHWPtr;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef void (*vgaHWWriteIndexProcPtr)(vgaHWPtr hwp, CARD8 indx, CARD8 value);
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef CARD8 (*vgaHWReadIndexProcPtr)(vgaHWPtr hwp, CARD8 indx);
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef void (*vgaHWWriteProcPtr)(vgaHWPtr hwp, CARD8 value);
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef CARD8 (*vgaHWReadProcPtr)(vgaHWPtr hwp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef void (*vgaHWMiscProcPtr)(vgaHWPtr hwp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/*
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * vgaHWRec contains per-screen information required by the vgahw module.
f0ab104f070bc7f569404826fea1828ed985638cvboxsync *
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * Note, the palette referred to by the paletteEnabled, enablePalette and
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * disablePalette is the 16-entry (+overscan) EGA-compatible palette accessed
f0ab104f070bc7f569404826fea1828ed985638cvboxsync * via the first 17 attribute registers and not the main 8-bit palette.
f0ab104f070bc7f569404826fea1828ed985638cvboxsync */
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef struct _vgaHWRec {
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    pointer         Base;       /* Address of "VGA" memory */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    int             MapSize;    /* Size of "VGA" memory */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    unsigned long       MapPhys;    /* phys location of VGA mem */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    int             IOBase;     /* I/O Base address */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    CARD8 *             MMIOBase;   /* Pointer to MMIO start */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    int             MMIOOffset; /* base + offset + vgareg
f0ab104f070bc7f569404826fea1828ed985638cvboxsync                           = mmioreg */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    pointer         FontInfo1;  /* save area for fonts in
f0ab104f070bc7f569404826fea1828ed985638cvboxsync                            plane 2 */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    pointer         FontInfo2;  /* save area for fonts in
f0ab104f070bc7f569404826fea1828ed985638cvboxsync                            plane 3 */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    pointer         TextInfo;   /* save area for text */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaRegRec           SavedReg;   /* saved registers */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaRegRec           ModeReg;    /* register settings for
f0ab104f070bc7f569404826fea1828ed985638cvboxsync                            current mode */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    Bool            ShowOverscan;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    Bool            paletteEnabled;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    Bool            cmapSaved;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    ScrnInfoPtr         pScrn;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteIndexProcPtr  writeCrtc;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadIndexProcPtr   readCrtc;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteIndexProcPtr  writeGr;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadIndexProcPtr   readGr;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadProcPtr            readST00;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadProcPtr            readST01;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadProcPtr            readFCR;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteProcPtr           writeFCR;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteIndexProcPtr  writeAttr;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadIndexProcPtr   readAttr;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteIndexProcPtr  writeSeq;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadIndexProcPtr   readSeq;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteProcPtr       writeMiscOut;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadProcPtr        readMiscOut;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWMiscProcPtr        enablePalette;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWMiscProcPtr        disablePalette;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteProcPtr       writeDacMask;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadProcPtr        readDacMask;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteProcPtr       writeDacWriteAddr;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteProcPtr       writeDacReadAddr;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteProcPtr       writeDacData;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadProcPtr        readDacData;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    pointer                     ddc;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    struct pci_io_handle        *io;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWReadProcPtr        readEnable;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    vgaHWWriteProcPtr       writeEnable;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    struct pci_device          *dev;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync} vgaHWRec;
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/* Some macros that VGA drivers can use in their ChipProbe() function */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define OVERSCAN 0x11       /* Index of OverScan register */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/* Flags that define how overscan correction should take place */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define KGA_FIX_OVERSCAN  1   /* overcan correction required */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define KGA_ENABLE_ON_ZERO 2  /* if possible enable display at beginning */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync                              /* of next scanline/frame                  */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define KGA_BE_TOT_DEC 4      /* always fix problem by setting blank end */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync                  /* to total - 1                            */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define BIT_PLANE 3     /* Which plane we write to in mono mode */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define BITS_PER_GUN 6
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define COLORMAP_SIZE 256
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#define DACDelay(hw) \
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    do { \
f0ab104f070bc7f569404826fea1828ed985638cvboxsync        (hw)->readST01((hw)); \
f0ab104f070bc7f569404826fea1828ed985638cvboxsync        (hw)->readST01((hw)); \
f0ab104f070bc7f569404826fea1828ed985638cvboxsync    } while (0)
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/* Function Prototypes */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync/* vgaHW.c */
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef void vgaHWProtectProc(ScrnInfoPtr, Bool);
f0ab104f070bc7f569404826fea1828ed985638cvboxsynctypedef void vgaHWBlankScreenProc(ScrnInfoPtr, Bool);
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWSetStdFuncs(vgaHWPtr hwp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWSetMmioFuncs(vgaHWPtr hwp, CARD8 *base, int offset);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWProtect(ScrnInfoPtr pScrn, Bool on);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT vgaHWProtectProc *vgaHWProtectWeak(void);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT Bool vgaHWSaveScreen(ScreenPtr pScreen, int mode);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWBlankScreen(ScrnInfoPtr pScrn, Bool on);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT vgaHWBlankScreenProc *vgaHWBlankScreenWeak(void);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWSeqReset(vgaHWPtr hwp, Bool start);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWRestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWRestoreMode(ScrnInfoPtr scrninfp, vgaRegPtr restore);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWRestoreColormap(ScrnInfoPtr scrninfp, vgaRegPtr restore);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWRestore(ScrnInfoPtr scrninfp, vgaRegPtr restore, int flags);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWSaveMode(ScrnInfoPtr scrninfp, vgaRegPtr save);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWSave(ScrnInfoPtr scrninfp, vgaRegPtr save, int flags);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT Bool vgaHWInit(ScrnInfoPtr scrnp, DisplayModePtr mode);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT Bool vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, int numSequencer,
f0ab104f070bc7f569404826fea1828ed985638cvboxsync                    int numGraphics, int numAttribute);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT Bool vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT Bool vgaHWGetHWRec(ScrnInfoPtr scrp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWFreeHWRec(ScrnInfoPtr scrp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT Bool vgaHWMapMem(ScrnInfoPtr scrp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWUnmapMem(ScrnInfoPtr scrp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWGetIOBase(vgaHWPtr hwp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWLock(vgaHWPtr hwp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWUnlock(vgaHWPtr hwp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWEnable(vgaHWPtr hwp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWDisable(vgaHWPtr hwp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT Bool vgaHWHandleColormaps(ScreenPtr pScreen);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT CARD32 vgaHWHBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
f0ab104f070bc7f569404826fea1828ed985638cvboxsync           unsigned int Flags);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT CARD32 vgaHWVBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
f0ab104f070bc7f569404826fea1828ed985638cvboxsync           unsigned int Flags);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT Bool vgaHWAllocDefaultRegs(vgaRegPtr regp);
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT DDC1SetSpeedProc vgaHWddc1SetSpeedWeak(void);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT SaveScreenProcPtr vgaHWSaveScreenWeak(void);
f0ab104f070bc7f569404826fea1828ed985638cvboxsyncextern _X_EXPORT void xf86GetClocks(ScrnInfoPtr pScrn, int num,
f0ab104f070bc7f569404826fea1828ed985638cvboxsync           Bool (*ClockFunc)(ScrnInfoPtr, int),
f0ab104f070bc7f569404826fea1828ed985638cvboxsync           void (*ProtectRegs)(ScrnInfoPtr, Bool),
f0ab104f070bc7f569404826fea1828ed985638cvboxsync           void (*BlankScreen)(ScrnInfoPtr, Bool),
f0ab104f070bc7f569404826fea1828ed985638cvboxsync           unsigned long vertsyncreg, int maskval,
f0ab104f070bc7f569404826fea1828ed985638cvboxsync           int knownclkindex, int knownclkvalue);
f0ab104f070bc7f569404826fea1828ed985638cvboxsync
f0ab104f070bc7f569404826fea1828ed985638cvboxsync#endif /* _VGAHW_H */