/*
* Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
*
* Permission to use, copy, modify, distribute, and sell this software and its
* documentation for any purpose is hereby granted without fee, provided that
* the above copyright notice appear in all copies and that both that
* copyright notice and this permission notice appear in supporting
* documentation, and that the name of Thomas Roell not be used in
* advertising or publicity pertaining to distribution of the software without
* specific, written prior permission. Thomas Roell makes no representations
* about the suitability of this software for any purpose. It is provided
* "as is" without express or implied warranty.
*
* THOMAS ROELL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
* EVENT SHALL THOMAS ROELL BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*
*/
/*
* Copyright (c) 1994-2003 by The XFree86 Project, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Except as contained in this notice, the name of the copyright holder(s)
* and author(s) shall not be used in advertising or otherwise to promote
* the sale, use or other dealings in this Software without prior written
* authorization from the copyright holder(s) and author(s).
*/
#ifndef _COMPILER_H
# define _COMPILER_H
#if defined(__SUNPRO_C)
# define DO_PROTOTYPES
#endif
/* Map Sun compiler platform defines to gcc-style used in the code */
# define __amd64__
#endif
# define __i386__
#endif
# define __sparc__
#endif
#if defined(__sparcv9) && !defined(__sparc64__)
# define __sparc64__
#endif
#ifndef _X_EXPORT
# include <X11/Xfuncproto.h>
#endif
# include <pixman.h> /* for uint*_t types */
# ifndef __inline__
# if defined(__GNUC__)
/* gcc has __inline__ */
# else
# endif
# endif /* __inline__ */
# ifndef __inline
# if defined(__GNUC__)
/* gcc has __inline */
# else
# endif
# endif /* __inline */
/* Support gcc's __FUNCTION__ for people using other compilers */
#if !defined(__GNUC__) && !defined(__FUNCTION__)
#endif
# if defined(NO_INLINE) || defined(DO_PROTOTYPES)
# if !defined(__arm__)
# else /* __sparc__, __arm32__, __alpha__, __nds32__ */
# endif /* __sparc__, __arm32__, __alpha__, __nds32__ */
# endif /* __arm__ */
# if defined(__powerpc__) && !defined(__OpenBSD__)
extern unsigned long ldq_u(unsigned long *);
extern unsigned long ldl_u(unsigned int *);
extern unsigned long ldw_u(unsigned short *);
extern void stq_u(unsigned long, unsigned long *);
extern void stl_u(unsigned long, unsigned int *);
extern void stw_u(unsigned long, unsigned short *);
extern void mem_barrier(void);
extern void write_mem_barrier(void);
extern void stl_brx(unsigned long, volatile unsigned char *, int);
extern void stw_brx(unsigned short, volatile unsigned char *, int);
extern unsigned long ldl_brx(volatile unsigned char *, int);
extern unsigned short ldw_brx(volatile unsigned char *, int);
# endif /* __powerpc__ && !__OpenBSD */
# endif /* NO_INLINE || DO_PROTOTYPES */
# ifndef NO_INLINE
# ifdef __GNUC__
# ifdef __i386__
# ifdef __SSE__
# else
# endif
# ifdef __SSE2__
# else
# endif
# ifndef __INTEL_COMPILER
# else
# include "ia64intrin.h"
# endif
/* Note: sync instruction requires MIPS II instruction set */
# define mem_barrier() \
".set push\n\t" \
".set noreorder\n\t" \
".set mips2\n\t" \
"sync\n\t" \
".set pop" \
: /* no output */ \
: /* no input */ \
: "memory")
# elif defined __powerpc__
# if defined(linux) && defined(__powerpc64__)
# endif
# endif /* defined(linux) && defined(__powerpc64__) */
# ifndef eieio /* We deal with arch-specific eieio() routines above... */
# endif /* eieio */
# endif
# endif /* __GNUC__ */
# endif /* NO_INLINE */
# ifndef mem_barrier
# endif
# ifndef write_mem_barrier
# endif
# ifndef NO_INLINE
# ifdef __GNUC__
/* Define some packed structures to use with unaligned accesses */
/* Elemental unaligned loads */
{
return ptr->x;
}
{
return ptr->x;
}
{
return ptr->x;
}
/* Elemental unaligned stores */
{
}
{
}
{
}
# else /* !__GNUC__ */
#include <string.h> /* needed for memmove */
{
return ret;
}
{
return ret;
}
{
return ret;
}
{
}
{
}
{
}
# endif /* __GNUC__ */
# endif /* NO_INLINE */
# ifndef NO_INLINE
# ifdef __GNUC__
# if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && (defined(__alpha__))
# ifdef linux
/* for Linux on Alpha, we use the LIBC _inx/_outx routines */
/* note that the appropriate setup via "ioperm" needs to be done */
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ unsigned int
{
}
static __inline__ unsigned int
{
}
static __inline__ unsigned int
{
}
# endif /* linux */
# if (defined(__FreeBSD__) || defined(__OpenBSD__)) \
&& !defined(DO_PROTOTYPES)
/* for FreeBSD and OpenBSD on Alpha, we use the libio (resp. libalpha) */
/* note that the appropriate setup via "ioperm" needs to be done */
# endif /* (__FreeBSD__ || __OpenBSD__ ) && !DO_PROTOTYPES */
#if defined(__NetBSD__)
#endif /* __NetBSD__ */
# include <inttypes.h>
# include <inttypes.h>
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ unsigned int
{
unsigned char ret;
"=a" (ret) :
"d" (port));
return ret;
}
static __inline__ unsigned int
{
unsigned short ret;
"=a" (ret) :
"d" (port));
return ret;
}
static __inline__ unsigned int
{
unsigned int ret;
"=a" (ret) :
"d" (port));
return ret;
}
# elif (defined(linux) || defined(sun) || defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__sparc__)
# ifndef ASI_PL
# endif
static __inline__ void
{
: /* No outputs */
barrier();
}
static __inline__ void
{
: /* No outputs */
barrier();
}
static __inline__ void
{
: /* No outputs */
barrier();
}
static __inline__ unsigned int
{
unsigned int ret;
: "=r" (ret)
return ret;
}
static __inline__ unsigned int
{
unsigned int ret;
: "=r" (ret)
return ret;
}
static __inline__ unsigned int
{
unsigned int ret;
: "=r" (ret)
return ret;
}
static __inline__ unsigned char
{
unsigned char ret;
: "=r" (ret)
return ret;
}
static __inline__ unsigned short
{
unsigned short ret;
: "=r" (ret)
: "r" (addr));
return ret;
}
static __inline__ unsigned short
{
unsigned short ret;
: "=r" (ret)
return ret;
}
static __inline__ unsigned int
{
unsigned int ret;
: "=r" (ret)
: "r" (addr));
return ret;
}
static __inline__ unsigned int
{
unsigned int ret;
: "=r" (ret)
return ret;
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
barrier();
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
barrier();
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
barrier();
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
barrier();
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
barrier();
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
}
# ifdef __arm32__
# define PORT_SIZE long
# else
# define PORT_SIZE short
# endif
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ unsigned int
{
}
static __inline__ unsigned int
{
}
static __inline__ unsigned int
{
}
# if defined(__mips__)
# ifdef linux /* don't mess with other OSs */
# if X_BYTE_ORDER == X_BIG_ENDIAN
static __inline__ unsigned int
{
unsigned int ret;
: "=r" (ret)
: "r" (addr));
return ret;
}
static __inline__ void
const unsigned int val)
{
: /* No outputs */
}
# endif
# endif /* !linux */
# endif /* __mips__ */
# elif (defined(linux) || defined(__OpenBSD__) || defined(__NetBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)
# ifndef MAP_FAILED
# endif
static __inline__ unsigned char
{
register unsigned char val;
"lbzx %0,%1,%2\n\t"
"eieio"
: "=r" (val)
return val;
}
static __inline__ unsigned short
{
register unsigned short val;
"lhzx %0,%1,%2\n\t"
"eieio"
: "=r" (val)
return val;
}
static __inline__ unsigned short
{
register unsigned short val;
"lhbrx %0,%1,%2\n\t"
"eieio"
: "=r" (val)
return val;
}
static __inline__ unsigned int
{
register unsigned int val;
"lwzx %0,%1,%2\n\t"
"eieio"
: "=r" (val)
return val;
}
static __inline__ unsigned int
{
register unsigned int val;
"lwbrx %0,%1,%2\n\t"
"eieio"
: "=r" (val)
return val;
}
static __inline__ void
const unsigned char val)
{
"stbx %1,%2,%3\n\t"
}
static __inline__ void
const unsigned short val)
{
"sthbrx %1,%2,%3\n\t"
}
static __inline__ void
const unsigned short val)
{
"sthx %1,%2,%3\n\t"
}
static __inline__ void
const unsigned int val)
{
"stwbrx %1,%2,%3\n\t"
}
static __inline__ void
const unsigned int val)
{
"stwx %1,%2,%3\n\t"
}
static __inline__ void
const unsigned char val)
{
eieio();
}
static __inline__ void
const unsigned short val)
{
eieio();
}
static __inline__ void
const unsigned short val)
{
eieio();
}
static __inline__ void
const unsigned int val)
{
eieio();
}
static __inline__ void
const unsigned int val)
{
eieio();
}
static __inline__ void
{
if(ioBase == MAP_FAILED) return;
}
static __inline__ void
{
if(ioBase == MAP_FAILED) return;
}
static __inline__ void
{
if(ioBase == MAP_FAILED) return;
}
static __inline__ unsigned int
{
if(ioBase == MAP_FAILED) return 0;
}
static __inline__ unsigned int
{
if(ioBase == MAP_FAILED) return 0;
}
static __inline__ unsigned int
{
if(ioBase == MAP_FAILED) return 0;
}
/* note that the appropriate setup via "ioperm" needs to be done */
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ void
{
}
/*
* Assume all port access are aligned. We need to revise this implementation
* if there is unaligned port access. For ldq_u, ldl_u, ldw_u, stq_u, stl_u and
* stw_u, they are assumed unaligned.
*/
#define PORT_SIZE long
static __inline__ unsigned char
{
}
static __inline__ void
const unsigned int val)
{
barrier();
}
static __inline__ void
const unsigned int val)
{
}
static __inline__ unsigned short
{
unsigned short ret;
"lhi %0, [%1];\n\t"
"wsbh %0, %0;\n\t"
: "=r" (ret)
: "r" (addr));
return ret;
}
static __inline__ unsigned short
{
}
static __inline__ void
const unsigned int val)
{
"wsbh %0, %0;\n\t"
"shi %0, [%1];\n\t"
: /* No outputs */
barrier();
}
static __inline__ void
const unsigned int val)
{
barrier();
}
static __inline__ void
const unsigned int val)
{
"wsbh %0, %0;\n\t"
"shi %0, [%1];\n\t"
: /* No outputs */
}
static __inline__ void
const unsigned int val)
{
}
static __inline__ unsigned int
{
unsigned int ret;
"lwi %0, [%1];\n\t"
"wsbh %0, %0;\n\t"
"rotri %0, %0, 16;\n\t"
: "=r" (ret)
: "r" (addr));
return ret;
}
static __inline__ unsigned int
{
}
static __inline__ void
const unsigned int val)
{
"wsbh %0, %0;\n\t"
"rotri %0, %0, 16;\n\t"
"swi %0, [%1];\n\t"
: /* No outputs */
barrier();
}
static __inline__ void
const unsigned int val)
{
barrier();
}
static __inline__ void
const unsigned int val)
{
"wsbh %0, %0;\n\t"
"rotri %0, %0, 16;\n\t"
"swi %0, [%1];\n\t"
: /* No outputs */
}
static __inline__ void
const unsigned int val)
{
}
# if defined(NDS32_MMIO_SWAP)
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ unsigned int
{
}
static __inline__ unsigned int
{
}
static __inline__ unsigned int
{
}
{
unsigned long addr = (unsigned long)p;
unsigned int ret;
"lmw.bi %0, [%1], %0, 0;\n\t"
"wsbh %0, %0;\n\t"
"rotri %0, %0, 16;\n\t"
: "=r" (ret)
: "r" (addr));
return ret;
}
{
unsigned long addr = (unsigned long)p;
unsigned int ret;
"lmw.bi %0, [%1], %0, 0;\n\t"
"wsbh %0, %0;\n\t"
"rotri %0, %0, 16;\n\t"
: "=r" (ret)
: "r" (addr));
return ret;
}
{
unsigned long addr = (unsigned long)p;
"wsbh %0, %0;\n\t"
"rotri %0, %0, 16;\n\t"
"smw.bi %0, [%1], %0, 0;\n\t"
: /* No outputs */
}
{
unsigned long addr = (unsigned long)p;
"wsbh %0, %0;\n\t"
"rotri %0, %0, 16;\n\t"
"smw.bi %0, [%1], %0, 0;\n\t"
: /* No outputs */
}
# else /* !NDS32_MMIO_SWAP */
static __inline__ void
{
barrier();
}
static __inline__ void
{
barrier();
}
static __inline__ void
{
barrier();
}
static __inline__ unsigned int
{
}
static __inline__ unsigned int
{
}
static __inline__ unsigned int
{
}
{
unsigned long addr = (unsigned long)p;
unsigned int ret;
"lmw.bi %0, [%1], %0, 0;\n\t"
: "=r" (ret)
: "r" (addr));
return ret;
}
{
unsigned long addr = (unsigned long)p;
unsigned int ret;
"lmw.bi %0, [%1], %0, 0;\n\t"
: "=r" (ret)
: "r" (addr));
return ret;
}
{
unsigned long addr = (unsigned long)p;
"smw.bi %0, [%1], %0, 0;\n\t"
: /* No outputs */
}
{
unsigned long addr = (unsigned long)p;
"smw.bi %0, [%1], %0, 0;\n\t"
: /* No outputs */
}
# endif /* NDS32_MMIO_SWAP */
# if (((X_BYTE_ORDER == X_BIG_ENDIAN) && !defined(NDS32_MMIO_SWAP)) || ((X_BYTE_ORDER != X_BIG_ENDIAN) && defined(NDS32_MMIO_SWAP)))
(*((unsigned char *)(p)+1)))
(*((unsigned char *)(p)+1)) = (v)
# else
# define ldw_u(p) ((*(unsigned char *)(p)) | \
(*((unsigned char *)(p)+1)<<8))
# define stw_u(v,p) (*(unsigned char *)(p)) = (v); \
(*((unsigned char *)(p)+1)) = ((v) >> 8)
# endif
# else /* ix86 */
# if !defined(__SUNPRO_C)
# if !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && !defined(__m32r__)
# ifdef GCCUSESGAS
/*
* If gcc uses gas rather than the native assembler, the syntax of these
* inlines has to be different. DHD
*/
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ unsigned int
{
unsigned char ret;
"=a" (ret) :
"d" (port));
return ret;
}
static __inline__ unsigned int
{
unsigned short ret;
"=a" (ret) :
"d" (port));
return ret;
}
static __inline__ unsigned int
{
unsigned int ret;
"=a" (ret) :
"d" (port));
return ret;
}
# else /* GCCUSESGAS */
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ unsigned int
{
unsigned char ret;
"=a" (ret) :
"d" (port));
return ret;
}
static __inline__ unsigned int
{
unsigned short ret;
"=a" (ret) :
"d" (port));
return ret;
}
static __inline__ unsigned int
{
unsigned int ret;
"=a" (ret) :
"d" (port));
return ret;
}
# endif /* GCCUSESGAS */
# else /* !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__m32r__) */
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ void
{
}
static __inline__ unsigned int
{
return 0;
}
static __inline__ unsigned int
{
return 0;
}
static __inline__ unsigned int
{
return 0;
}
# endif /* FAKEIT */
# endif /* __SUNPRO_C */
# endif /* ix86 */
# else /* !GNUC */
# ifndef asm
# define asm __asm
# endif
# endif
# if !defined(__SUNPRO_C)
# endif
# if !defined(__HIGHC__) && !defined(__SUNPRO_C) || \
defined(__USLC__)
# pragma asm partial_optimization outl
# pragma asm partial_optimization outw
# pragma asm partial_optimization outb
# pragma asm partial_optimization inl
# pragma asm partial_optimization inw
# pragma asm partial_optimization inb
# endif
# endif /* __GNUC__ */
# endif /* NO_INLINE */
# ifdef __alpha__
/* entry points for Mmio memory access routines */
extern _X_EXPORT int (*xf86ReadMmio8)(void *, unsigned long);
extern _X_EXPORT int (*xf86ReadMmio16)(void *, unsigned long);
# ifndef STANDALONE_MMIO
extern _X_EXPORT int (*xf86ReadMmio32)(void *, unsigned long);
# else
/* Some DRI 3D drivers need MMIO_IN32. */
static __inline__ int
{
mem_barrier();
}
# endif
extern _X_EXPORT void (*xf86WriteMmio8)(int, void *, unsigned long);
extern _X_EXPORT void (*xf86WriteMmio16)(int, void *, unsigned long);
extern _X_EXPORT void (*xf86WriteMmio32)(int, void *, unsigned long);
extern _X_EXPORT void (*xf86WriteMmioNB8)(int, void *, unsigned long);
extern _X_EXPORT void (*xf86WriteMmioNB16)(int, void *, unsigned long);
extern _X_EXPORT void (*xf86WriteMmioNB32)(int, void *, unsigned long);
extern _X_EXPORT void xf86SlowBCopyFromBus(unsigned char *, unsigned char *, int);
extern _X_EXPORT void xf86SlowBCopyToBus(unsigned char *, unsigned char *, int);
/* Some macros to hide the system dependencies for MMIO accesses */
/* Changed to kill noise generated by gcc's -Wcast-align */
# ifndef STANDALONE_MMIO
# else
# endif
do { \
write_mem_barrier(); \
} while (0)
# elif defined(__powerpc__)
/*
* we provide byteswapping and no byteswapping functions here
* with byteswapping as default,
* drivers that don't need byteswapping should define PPC_MMIO_IS_BE
*/
# if defined(PPC_MMIO_IS_BE) /* No byteswapping */
# else /* byteswapping is the default */
# endif
/*
* Like powerpc, we provide byteswapping and no byteswapping functions
* here with byteswapping as default, drivers that don't need byteswapping
* should define SPARC_MMIO_IS_BE (perhaps create a generic macro so that we
* do not need to use PPC_MMIO_IS_BE and the sparc one in all the same places
* of drivers?).
*/
# if defined(SPARC_MMIO_IS_BE) /* No byteswapping */
# else /* byteswapping is the default */
# endif
/*
* we provide byteswapping and no byteswapping functions here
* with no byteswapping as default; when endianness of CPU core
* and I/O devices don't match, byte swapping is necessary
* drivers that need byteswapping should define NDS32_MMIO_SWAP
*/
# if defined(NDS32_MMIO_SWAP) /* byteswapping */
# else /* no byteswapping is the default */
# endif
#ifdef N1213_HC /* for NDS32 N1213 hardcore */
{
__asm__ volatile (
"isync %0;"
"msync;"
"isb;"
"cctl %0,L1I_VA_INVAL;"
"isb;"
}
#else
{
__asm__ volatile (
"isync %0;"
"isb;"
}
#endif
# else /* !__alpha__ && !__powerpc__ && !__sparc__ */
# endif /* __alpha__ */
/*
* With Intel, the version in os-support/misc/SlowBcopy.s is used.
* This avoids port I/O during the copy (which causes problems with
* some hardware).
*/
# ifdef __alpha__
# else /* __alpha__ */
# endif /* __alpha__ */
#endif /* _COMPILER_H */