4c221b0da1816acf2ca302b10092df059484468dvboxsync * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Permission to use, copy, modify, distribute, and sell this software and its
4c221b0da1816acf2ca302b10092df059484468dvboxsync * documentation for any purpose is hereby granted without fee, provided that
4c221b0da1816acf2ca302b10092df059484468dvboxsync * the above copyright notice appear in all copies and that both that
4c221b0da1816acf2ca302b10092df059484468dvboxsync * copyright notice and this permission notice appear in supporting
4c221b0da1816acf2ca302b10092df059484468dvboxsync * documentation, and that the name of Thomas Roell not be used in
4c221b0da1816acf2ca302b10092df059484468dvboxsync * advertising or publicity pertaining to distribution of the software without
4c221b0da1816acf2ca302b10092df059484468dvboxsync * specific, written prior permission. Thomas Roell makes no representations
4c221b0da1816acf2ca302b10092df059484468dvboxsync * about the suitability of this software for any purpose. It is provided
4c221b0da1816acf2ca302b10092df059484468dvboxsync * "as is" without express or implied warranty.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * THOMAS ROELL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
4c221b0da1816acf2ca302b10092df059484468dvboxsync * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
4c221b0da1816acf2ca302b10092df059484468dvboxsync * EVENT SHALL THOMAS ROELL BE LIABLE FOR ANY SPECIAL, INDIRECT OR
4c221b0da1816acf2ca302b10092df059484468dvboxsync * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
4c221b0da1816acf2ca302b10092df059484468dvboxsync * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
4c221b0da1816acf2ca302b10092df059484468dvboxsync * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
4c221b0da1816acf2ca302b10092df059484468dvboxsync * PERFORMANCE OF THIS SOFTWARE.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Copyright (c) 1994-2003 by The XFree86 Project, Inc.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Permission is hereby granted, free of charge, to any person obtaining a
4c221b0da1816acf2ca302b10092df059484468dvboxsync * copy of this software and associated documentation files (the "Software"),
4c221b0da1816acf2ca302b10092df059484468dvboxsync * to deal in the Software without restriction, including without limitation
4c221b0da1816acf2ca302b10092df059484468dvboxsync * the rights to use, copy, modify, merge, publish, distribute, sublicense,
4c221b0da1816acf2ca302b10092df059484468dvboxsync * and/or sell copies of the Software, and to permit persons to whom the
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Software is furnished to do so, subject to the following conditions:
4c221b0da1816acf2ca302b10092df059484468dvboxsync * The above copyright notice and this permission notice shall be included in
4c221b0da1816acf2ca302b10092df059484468dvboxsync * all copies or substantial portions of the Software.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
4c221b0da1816acf2ca302b10092df059484468dvboxsync * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
4c221b0da1816acf2ca302b10092df059484468dvboxsync * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
4c221b0da1816acf2ca302b10092df059484468dvboxsync * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
4c221b0da1816acf2ca302b10092df059484468dvboxsync * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
4c221b0da1816acf2ca302b10092df059484468dvboxsync * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4c221b0da1816acf2ca302b10092df059484468dvboxsync * OTHER DEALINGS IN THE SOFTWARE.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Except as contained in this notice, the name of the copyright holder(s)
4c221b0da1816acf2ca302b10092df059484468dvboxsync * and author(s) shall not be used in advertising or otherwise to promote
4c221b0da1816acf2ca302b10092df059484468dvboxsync * the sale, use or other dealings in this Software without prior written
4c221b0da1816acf2ca302b10092df059484468dvboxsync * authorization from the copyright holder(s) and author(s).
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Map Sun compiler platform defines to gcc-style used in the code */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Allow drivers to use the GCC-supported __inline__ and/or __inline. */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if defined(__GNUC__)
4c221b0da1816acf2ca302b10092df059484468dvboxsync /* gcc has __inline__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __inline__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if defined(__GNUC__)
4c221b0da1816acf2ca302b10092df059484468dvboxsync /* gcc has __inline */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __inline */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Support gcc's __FUNCTION__ for people using other compilers */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if !defined(__arm__)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if !defined(__sparc__) && !defined(__sparc) && !defined(__arm32__) && !defined(__nds32__) \
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outb(unsigned short, unsigned char);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outw(unsigned short, unsigned short);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outl(unsigned short, unsigned int);
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* __sparc__, __arm32__, __alpha__, __nds32__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outb(unsigned long, unsigned char);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outw(unsigned long, unsigned short);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outl(unsigned long, unsigned int);
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __sparc__, __arm32__, __alpha__, __nds32__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __arm__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern unsigned long ldq_u(unsigned long *);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern unsigned long ldl_u(unsigned int *);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern unsigned long ldw_u(unsigned short *);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern void stq_u(unsigned long, unsigned long *);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern void stl_u(unsigned long, unsigned int *);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern void stw_u(unsigned long, unsigned short *);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern void mem_barrier(void);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern void write_mem_barrier(void);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern void stl_brx(unsigned long, volatile unsigned char *, int);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern void stw_brx(unsigned short, volatile unsigned char *, int);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern unsigned long ldl_brx(volatile unsigned char *, int);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern unsigned short ldw_brx(volatile unsigned char *, int);
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __powerpc__ && !__OpenBSD */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* NO_INLINE || DO_PROTOTYPES */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define write_mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define mem_barrier() __asm__ __volatile__ ("mb" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define write_mem_barrier() __asm__ __volatile__ ("wmb" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define write_mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync /* Note: sync instruction requires MIPS II instruction set */
4c221b0da1816acf2ca302b10092df059484468dvboxsync ".set push\n\t" \
4c221b0da1816acf2ca302b10092df059484468dvboxsync ".set noreorder\n\t" \
4c221b0da1816acf2ca302b10092df059484468dvboxsync ".set mips2\n\t" \
4c221b0da1816acf2ca302b10092df059484468dvboxsync "sync\n\t" \
4c221b0da1816acf2ca302b10092df059484468dvboxsync ".set pop" \
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* no output */ \
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* no input */ \
4c221b0da1816acf2ca302b10092df059484468dvboxsync : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* defined(linux) && defined(__powerpc64__) */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# ifndef eieio /* We deal with arch-specific eieio() routines above... */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define eieio() __asm__ __volatile__ ("eieio" ::: "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* eieio */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define barrier() __asm__ __volatile__ (".word 0x8143e00a" : : : "memory")
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __GNUC__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* NO_INLINE */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Define some packed structures to use with unaligned accesses */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstruct __una_u64 { uint64_t x __attribute__((packed)); };
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstruct __una_u32 { uint32_t x __attribute__((packed)); };
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstruct __una_u16 { uint16_t x __attribute__((packed)); };
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Elemental unaligned loads */
4c221b0da1816acf2ca302b10092df059484468dvboxsync const struct __una_u64 *ptr = (const struct __una_u64 *) p;
4c221b0da1816acf2ca302b10092df059484468dvboxsync const struct __una_u32 *ptr = (const struct __una_u32 *) p;
4c221b0da1816acf2ca302b10092df059484468dvboxsync const struct __una_u16 *ptr = (const struct __una_u16 *) p;
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Elemental unaligned stores */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stq_u(uint64_t val, uint64_t *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stl_u(uint32_t val, uint32_t *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stw_u(uint16_t val, uint16_t *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* !__GNUC__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stq_u(uint64_t val, uint64_t *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stl_u(uint32_t val, uint32_t *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stw_u(uint16_t val, uint16_t *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __GNUC__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* NO_INLINE */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && (defined(__alpha__))
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* for Linux on Alpha, we use the LIBC _inx/_outx routines */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* note that the appropriate setup via "ioperm" needs to be done */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* *before* any inx/outx is done. */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void _outb(unsigned char val, unsigned long port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void _outw(unsigned short val, unsigned long port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void _outl(unsigned int val, unsigned long port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT unsigned int _inb(unsigned long port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT unsigned int _inw(unsigned long port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT unsigned int _inl(unsigned long port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* linux */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if (defined(__FreeBSD__) || defined(__OpenBSD__)) \
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* for FreeBSD and OpenBSD on Alpha, we use the libio (resp. libalpha) */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* inx/outx routines */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* note that the appropriate setup via "ioperm" needs to be done */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* *before* any inx/outx is done. */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outb(unsigned int port, unsigned char val);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outw(unsigned int port, unsigned short val);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outl(unsigned int port, unsigned int val);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT unsigned char inb(unsigned int port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT unsigned short inw(unsigned int port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT unsigned int inl(unsigned int port);
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* (__FreeBSD__ || __OpenBSD__ ) && !DO_PROTOTYPES */
4c221b0da1816acf2ca302b10092df059484468dvboxsync#endif /* __NetBSD__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outb(unsigned long port, unsigned char val);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outw(unsigned long port, unsigned short val);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void outl(unsigned long port, unsigned int val);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT unsigned int inb(unsigned long port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT unsigned int inw(unsigned long port);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT unsigned int inl(unsigned long port);
4c221b0da1816acf2ca302b10092df059484468dvboxsync# elif (defined(linux) || defined(__FreeBSD__)) && defined(__amd64__)
4c221b0da1816acf2ca302b10092df059484468dvboxsync __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
4c221b0da1816acf2ca302b10092df059484468dvboxsync __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
4c221b0da1816acf2ca302b10092df059484468dvboxsync __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync# elif (defined(linux) || defined(sun) || defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__sparc__)
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned char
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned short
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned short
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16BeNB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16LeNB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32BeNB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32LeNB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# elif defined(__mips__) || (defined(__arm32__) && !defined(__linux__))
4c221b0da1816acf2ca302b10092df059484468dvboxsync_X_EXPORT unsigned int IOPortBase; /* Memory mapped I/O port area */
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase);
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if defined(__mips__)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* !linux */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __mips__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# elif (defined(linux) || defined(__OpenBSD__) || defined(__NetBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned char
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lbzx %0,%1,%2\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned short
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lhzx %0,%1,%2\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned short
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lhbrx %0,%1,%2\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lwzx %0,%1,%2\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lwbrx %0,%1,%2\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmioNB8(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned char val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "stbx %1,%2,%3\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmioNB16Le(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned short val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "sthbrx %1,%2,%3\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmioNB16Be(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned short val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "sthx %1,%2,%3\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmioNB32Le(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "stwbrx %1,%2,%3\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmioNB32Be(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "stwx %1,%2,%3\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned char val)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned short val)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned short val)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* for Linux on ARM, we use the LIBC inx/outx routines */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* note that the appropriate setup via "ioperm" needs to be done */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* *before* any inx/outx is done. */
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Assume all port access are aligned. We need to revise this implementation
4c221b0da1816acf2ca302b10092df059484468dvboxsync * if there is unaligned port access. For ldq_u, ldl_u, ldw_u, stq_u, stl_u and
4c221b0da1816acf2ca302b10092df059484468dvboxsync * stw_u, they are assumed unaligned.
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned char
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned char *)((unsigned char *)base + offset) ;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned char *)((unsigned char *)base + offset) = val ;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned char *)((unsigned char *)base + offset) = val ;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned short
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio16Swap(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lhi %0, [%1];\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned short
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio16(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned short *)((char *)base + offset) ;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16Swap(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "shi %0, [%1];\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned short *)((unsigned char *)base + offset) = val ;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16SwapNB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "shi %0, [%1];\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio16NB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned short *)((unsigned char *)base + offset) = val ;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio32Swap(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lwi %0, [%1];\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "rotri %0, %0, 16;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86ReadMmio32(__volatile__ void *base, const unsigned long offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned int *)((unsigned char *)base + offset) ;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32Swap(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "rotri %0, %0, 16;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "swi %0, [%1];\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned int *)((unsigned char *)base + offset) = val ;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32SwapNB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync unsigned long addr = ((unsigned long)base) + offset;
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "rotri %0, %0, 16;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "swi %0, [%1];\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncxf86WriteMmio32NB(__volatile__ void *base, const unsigned long offset,
4c221b0da1816acf2ca302b10092df059484468dvboxsync const unsigned int val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned int *)((unsigned char *)base + offset) = val ;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned long ldq_u(unsigned long *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lmw.bi %0, [%1], %0, 0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "rotri %0, %0, 16;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned long ldl_u(unsigned int *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lmw.bi %0, [%1], %0, 0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "rotri %0, %0, 16;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stq_u(unsigned long val, unsigned long *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "rotri %0, %0, 16;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "smw.bi %0, [%1], %0, 0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stl_u(unsigned long val, unsigned int *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "wsbh %0, %0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "rotri %0, %0, 16;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "smw.bi %0, [%1], %0, 0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* !NDS32_MMIO_SWAP */
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))) = val;
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))) = val;
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))) = val;
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port)));
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port)));
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port)));
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned long ldq_u(unsigned long *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lmw.bi %0, [%1], %0, 0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned long ldl_u(unsigned int *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "lmw.bi %0, [%1], %0, 0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stq_u(unsigned long val, unsigned long *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "smw.bi %0, [%1], %0, 0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void stl_u(unsigned long val, unsigned int *p)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "smw.bi %0, [%1], %0, 0;\n\t"
4c221b0da1816acf2ca302b10092df059484468dvboxsync : /* No outputs */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* NDS32_MMIO_SWAP */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if (((X_BYTE_ORDER == X_BIG_ENDIAN) && !defined(NDS32_MMIO_SWAP)) || ((X_BYTE_ORDER != X_BIG_ENDIAN) && defined(NDS32_MMIO_SWAP)))
4c221b0da1816acf2ca302b10092df059484468dvboxsync (*((unsigned char *)(p)+1)))
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define stw_u(v,p) (*(unsigned char *)(p)) = ((v) >> 8); \
4c221b0da1816acf2ca302b10092df059484468dvboxsync (*((unsigned char *)(p)+1)) = (v)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define stw_u(v,p) (*(unsigned char *)(p)) = (v); \
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* ix86 */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if !defined(__SUNPRO_C)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && !defined(__m32r__)
4c221b0da1816acf2ca302b10092df059484468dvboxsync * If gcc uses gas rather than the native assembler, the syntax of these
4c221b0da1816acf2ca302b10092df059484468dvboxsync * inlines has to be different. DHD
4c221b0da1816acf2ca302b10092df059484468dvboxsync __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
4c221b0da1816acf2ca302b10092df059484468dvboxsync __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
4c221b0da1816acf2ca302b10092df059484468dvboxsync __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* GCCUSESGAS */
4c221b0da1816acf2ca302b10092df059484468dvboxsync __asm__ __volatile__("out%B0 (%1)" : :"a" (val), "d" (port));
4c221b0da1816acf2ca302b10092df059484468dvboxsync __asm__ __volatile__("out%W0 (%1)" : :"a" (val), "d" (port));
4c221b0da1816acf2ca302b10092df059484468dvboxsync __asm__ __volatile__("out%L0 (%1)" : :"a" (val), "d" (port));
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* GCCUSESGAS */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__m32r__) */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ unsigned int
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* FAKEIT */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __SUNPRO_C */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* ix86 */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* !GNUC */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# ifndef asm
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if !defined(__SUNPRO_C)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if !defined(__HIGHC__) && !defined(__SUNPRO_C) || \
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __GNUC__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* NO_INLINE */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* entry points for Mmio memory access routines */
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT int (*xf86ReadMmio8)(void *, unsigned long);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT int (*xf86ReadMmio16)(void *, unsigned long);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT int (*xf86ReadMmio32)(void *, unsigned long);
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Some DRI 3D drivers need MMIO_IN32. */
4c221b0da1816acf2ca302b10092df059484468dvboxsync return *(volatile unsigned int*)((unsigned long)Base+(Offset));
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void (*xf86WriteMmio8)(int, void *, unsigned long);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void (*xf86WriteMmio16)(int, void *, unsigned long);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void (*xf86WriteMmio32)(int, void *, unsigned long);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void (*xf86WriteMmioNB8)(int, void *, unsigned long);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void (*xf86WriteMmioNB16)(int, void *, unsigned long);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void (*xf86WriteMmioNB32)(int, void *, unsigned long);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void xf86SlowBCopyFromBus(unsigned char *, unsigned char *, int);
4c221b0da1816acf2ca302b10092df059484468dvboxsyncextern _X_EXPORT void xf86SlowBCopyToBus(unsigned char *, unsigned char *, int);
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Some macros to hide the system dependencies for MMIO accesses */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Changed to kill noise generated by gcc's -Wcast-align */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN8(base, offset) (*xf86ReadMmio8)(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN16(base, offset) (*xf86ReadMmio16)(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN32(base, offset) (*xf86ReadMmio32)(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val); \
4c221b0da1816acf2ca302b10092df059484468dvboxsync } while (0)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync * we provide byteswapping and no byteswapping functions here
4c221b0da1816acf2ca302b10092df059484468dvboxsync * with byteswapping as default,
4c221b0da1816acf2ca302b10092df059484468dvboxsync * drivers that don't need byteswapping should define PPC_MMIO_IS_BE
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* byteswapping is the default */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# elif defined(__sparc__) || defined(sparc) || defined(__sparc)
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Like powerpc, we provide byteswapping and no byteswapping functions
4c221b0da1816acf2ca302b10092df059484468dvboxsync * here with byteswapping as default, drivers that don't need byteswapping
4c221b0da1816acf2ca302b10092df059484468dvboxsync * should define SPARC_MMIO_IS_BE (perhaps create a generic macro so that we
4c221b0da1816acf2ca302b10092df059484468dvboxsync * do not need to use PPC_MMIO_IS_BE and the sparc one in all the same places
4c221b0da1816acf2ca302b10092df059484468dvboxsync * of drivers?).
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# if defined(SPARC_MMIO_IS_BE) /* No byteswapping */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* byteswapping is the default */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync * we provide byteswapping and no byteswapping functions here
4c221b0da1816acf2ca302b10092df059484468dvboxsync * with no byteswapping as default; when endianness of CPU core
4c221b0da1816acf2ca302b10092df059484468dvboxsync * and I/O devices don't match, byte swapping is necessary
4c221b0da1816acf2ca302b10092df059484468dvboxsync * drivers that need byteswapping should define NDS32_MMIO_SWAP
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN16(base, offset) xf86ReadMmio16Swap(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN32(base, offset) xf86ReadMmio32Swap(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* no byteswapping is the default */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN16(base, offset) xf86ReadMmio16(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void nds32_flush_icache(char *addr)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "isync %0;"
4c221b0da1816acf2ca302b10092df059484468dvboxsync "cctl %0,L1I_VA_INVAL;"
4c221b0da1816acf2ca302b10092df059484468dvboxsyncstatic __inline__ void nds32_flush_icache(char *addr)
4c221b0da1816acf2ca302b10092df059484468dvboxsync "isync %0;"
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* !__alpha__ && !__powerpc__ && !__sparc__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset))
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset))
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile CARD8 *)(((CARD8*)(base)) + (offset)) = (val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_ONB8(base, offset, val) MMIO_OUT8(base, offset, val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_ONB16(base, offset, val) MMIO_OUT16(base, offset, val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_ONB32(base, offset, val) MMIO_OUT32(base, offset, val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define MMIO_MOVE32(base, offset, val) MMIO_OUT32(base, offset, val)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __alpha__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync * With Intel, the version in os-support/misc/SlowBcopy.s is used.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * This avoids port I/O during the copy (which causes problems with
4c221b0da1816acf2ca302b10092df059484468dvboxsync * some hardware).
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define slowbcopy_tobus(src,dst,count) xf86SlowBCopyToBus(src,dst,count)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define slowbcopy_frombus(src,dst,count) xf86SlowBCopyFromBus(src,dst,count)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# else /* __alpha__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define slowbcopy_tobus(src,dst,count) xf86SlowBcopy(src,dst,count)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# define slowbcopy_frombus(src,dst,count) xf86SlowBcopy(src,dst,count)
4c221b0da1816acf2ca302b10092df059484468dvboxsync# endif /* __alpha__ */
4c221b0da1816acf2ca302b10092df059484468dvboxsync#endif /* _COMPILER_H */