IBM.h revision b8e299dddd091ae24e0c08c45d91b8f937bd14d2
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/IBM.h,v 1.7 1999/02/12 22:52:11 hohndel Exp $ */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncRamDacHelperRecPtr IBMramdacProbe(ScrnInfoPtr pScrn, RamDacSupportedInfoRecPtr ramdacs);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid IBMramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, RamDacRegRecPtr RamDacRegRec);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid IBMramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, RamDacRegRecPtr RamDacRegRec);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid IBMramdac526SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr RamDacRegRec);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid IBMramdac640SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr RamDacRegRec);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncunsigned long IBMramdac526CalculateMNPCForClock(unsigned long RefClock,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long ReqClock, char IsPixClock, unsigned long MinClock,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long MaxClock, unsigned long *rM, unsigned long *rN,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncunsigned long IBMramdac640CalculateMNPCForClock(unsigned long RefClock,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long ReqClock, char IsPixClock, unsigned long MinClock,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long MaxClock, unsigned long *rM, unsigned long *rN,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid IBMramdac526HWCursorInit(xf86CursorInfoPtr infoPtr);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid IBMramdac640HWCursorInit(xf86CursorInfoPtr infoPtr);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsynctypedef void IBMramdac526SetBppProc(ScrnInfoPtr, RamDacRegRecPtr);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncIBMramdac526SetBppProc *IBMramdac526SetBppWeak(void);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * IBM Ramdac registers
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* #define IBMRGB_f0 0x20 */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* Constants rgb525.h */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_REVISION_LEVEL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_ID */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_MISC_CTRL_1 */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_MISC_CTRL_2 */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_MISC_CTRL_3 */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_MISC_CLK_CTRL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_SYNC_CTRL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_HSYNC_CTRL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define HSYN_POS(n) (n)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_POWER_MANAGEMENT */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_DAC_OPERATION */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_PALETTE_CTRL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_PIXEL_FORMAT */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_8BPP_CTRL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_16BPP_CTRL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_24BPP_CTRL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_32BPP_CTRL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_PLL_CTRL_1 */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_PLL_CTRL_2 */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_PLL_REF_DIV_COUNT */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_F0 - RGB525_F15 */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_PLL_REFCLK values */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_CURSOR_CONTROL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_REVISION_LEVEL */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* RGB525_ID */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* MISR status */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* the IBMRGB640 is rather different from the rest of the RAMDACs,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync so we define a completely new set of register names for it */