b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/xf86int10.h,v 1.23 2002/04/04 14:05:51 eich Exp $ */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * XFree86 int10 module
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * execute BIOS int 10h calls in x86 real mode environment
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * Copyright 1999 Egbert Eich
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* int10 info structure */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsynctypedef struct {
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsynctypedef struct _int10Mem {
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsynctypedef struct {
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsynctypedef struct {
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* OS dependent functions */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncxf86Int10InfoPtr xf86ExtendedInitInt10(int entityIndex, int Flags);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid *xf86Int10AllocPages(xf86Int10InfoPtr pInt, int num, int *off);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid xf86Int10FreePages(xf86Int10InfoPtr pInt, void *pbase, int num);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncpointer xf86int10Addr(xf86Int10InfoPtr pInt, CARD32 addr);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* x86 executor related functions */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#else /* a bug in DGUX requires this - let's try it */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define BIOS_SCRATCH_LEN (BIOS_SCRATCH_END - BIOS_SCRATCH_OFF + 1)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define SEG_ADR(type, seg, reg) type((seg << 4) + (X86_##reg))
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define SEG_EADR(type, seg, reg) type((seg << 4) + (X86_E##reg))
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define X86_VIF_MASK 0x00080000 /* virtual interrupt flag */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define X86_VIP_MASK 0x00100000 /* virtual interrupt pending */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define MEM_RB(name, addr) (*name->mem->rb)(name, addr)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define MEM_RW(name, addr) (*name->mem->rw)(name, addr)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define MEM_RL(name, addr) (*name->mem->rl)(name, addr)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define MEM_WB(name, addr, val) (*name->mem->wb)(name, addr, val)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define MEM_WW(name, addr, val) (*name->mem->ww)(name, addr, val)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define MEM_WL(name, addr, val) (*name->mem->wl)(name, addr, val)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* OS dependent functions */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* x86 executor related functions */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid LockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid UnlockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#if defined (_PC)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid xf86Int10SaveRestoreBIOSVars(xf86Int10InfoPtr pInt, Bool save);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid * xf86HandleInt10Options(ScrnInfoPtr pScrn, int entityIndex);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncBool int10_check_bios(int scrnIndex, int codeSeg, unsigned char* vbiosMem);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid dprint(unsigned long start, unsigned long size);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncint mapPciRom(int pciEntity, unsigned char *address);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#endif /* _INT10_PRIVATE */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#endif /* _XF86INT10_H */