b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/TI.h,v 1.4 2000/05/02 21:04:46 alanh Exp $ */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncunsigned long TIramdacCalculateMNPForClock(unsigned long RefClock,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long ReqClock, char IsPixClock, unsigned long MinClock,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long MaxClock, unsigned long *rM, unsigned long *rN,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long *rP);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncRamDacHelperRecPtr TIramdacProbe(ScrnInfoPtr pScrn, RamDacSupportedInfoRecPtr ramdacs);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid TIramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, RamDacRegRecPtr RamDacRegRec);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid TIramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, RamDacRegRecPtr RamDacRegRec);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid TIramdac3026SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr RamDacRegRec);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid TIramdac3030SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr RamDacRegRec);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncunsigned long TIramdac3030CalculateMNPForClock(unsigned long RefClock,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long ReqClock, char IsPixClock, unsigned long MinClock,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long MaxClock, unsigned long *rM, unsigned long *rN,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync unsigned long *rP);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid TIramdacHWCursorInit(xf86CursorInfoPtr infoPtr);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncvoid TIramdacLoadPalette( ScrnInfoPtr pScrn, int numColors, int *indices,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsynctypedef void TIramdacLoadPaletteProc(ScrnInfoPtr, int, int *, LOCO *,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsyncTIramdacLoadPaletteProc *TIramdacLoadPaletteWeak(void);
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * TI Ramdac registers
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* These are pll values that are accessed via TIDAC_pll_pixel_data */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* These are pll values that are accessed via TIDAC_pll_loop_data */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* Direct mapping addresses */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/* Constants */