7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Copyright © 2008 Intel Corporation
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Permission is hereby granted, free of charge, to any person obtaining a
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * copy of this software and associated documentation files (the "Software"),
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * to deal in the Software without restriction, including without limitation
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * and/or sell copies of the Software, and to permit persons to whom the
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Software is furnished to do so, subject to the following conditions:
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * The above copyright notice and this permission notice (including the next
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * paragraph) shall be included in all copies or substantial portions of the
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Software.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * IN THE SOFTWARE.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Eric Anholt <eric@anholt.net>
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Private definitions of Intel-specific bufmgr functions and structures.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Context for a buffer manager instance.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Contains public methods followed by private storage for the buffer manager.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Allocate a buffer object.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Buffer objects are not necessarily initially mapped into CPU virtual
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * address space or graphics device aperture. They must be mapped using
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * bo_map() to be used by the CPU, and validated for use using bo_validate()
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * to be used from the graphics device.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync drm_intel_bo *(*bo_alloc)(drm_intel_bufmgr *bufmgr, const char *name,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Allocate a buffer object, hinting that it will be used as a render target.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * This is otherwise the same as bo_alloc.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync drm_intel_bo *(*bo_alloc_for_render)(drm_intel_bufmgr *bufmgr,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync const char *name,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync unsigned long size,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync unsigned int alignment);
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync /** Takes a reference on a buffer object */
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Releases a reference on a buffer object, freeing the data if
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * rerefences remain.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Maps the buffer into userspace.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * This function will block waiting for any existing execution on the
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * buffer to complete, first. The resulting mapping is available at
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * buf->virtual.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync /** Reduces the refcount on the userspace mapping of the buffer object. */
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Write data into an object.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * This is an optional function, if missing,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * drm_intel_bo will map/memcpy/unmap.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync int (*bo_subdata)(drm_intel_bo *bo, unsigned long offset,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Read data from an object
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * This is an optional function, if missing,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * drm_intel_bo will map/memcpy/unmap.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync int (*bo_get_subdata)(drm_intel_bo *bo, unsigned long offset,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Waits for rendering to an object by the GPU to have completed.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * This is not required for any access to the BO by bo_map, bo_subdata, etc.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * It is merely a way for the driver to implement glFinish.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Tears down the buffer manager instance.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Add relocation entry in reloc_buf, which will be updated with the
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * target buffer's real offset on on command submission.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Relocations remain in place for the lifetime of the buffer object.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param bo Buffer to write the relocation into.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param offset Byte offset within reloc_bo of the pointer to target_bo.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param target_bo Buffer whose offset should be written into the
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * relocation entry.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param target_offset Constant value to be added to target_bo's offset in
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * relocation entry.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param read_domains GEM read domains which the buffer will be read into
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * by the command that this relocation is part of.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param write_domains GEM read domains which the buffer will be dirtied
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * in by the command that this relocation is part of.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync int (*bo_emit_reloc)(drm_intel_bo *bo, uint32_t offset,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync /** Executes the command buffer pointed to by bo. */
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Pin a buffer to the aperture and fix the offset until unpinned
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param buf Buffer to pin
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param alignment Required alignment for aperture, in bytes
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync int (*bo_pin)(drm_intel_bo *bo, uint32_t alignment);
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Unpin a buffer from the aperture, allowing it to be removed
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param buf Buffer to unpin
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Ask that the buffer be placed in tiling mode
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param buf Buffer to set tiling mode for
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param tiling_mode desired, and returned tiling mode
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync int (*bo_set_tiling)(drm_intel_bo *bo, uint32_t *tiling_mode,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Get the current tiling (and resulting swizzling) mode for the bo.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param buf Buffer to get tiling mode for
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param tiling_mode returned tiling mode
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param swizzle_mode returned swizzling mode
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync int (*bo_get_tiling)(drm_intel_bo *bo, uint32_t *tiling_mode,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Create a visible name for a buffer which can be used by other apps
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param buf Buffer to create a name for
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param name Returned name
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Returns 1 if mapping the buffer for write could cause the process
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * to block, due to the object being active in the GPU.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync int (*check_aperture_space)(drm_intel_bo **bo_array, int count);
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Disable buffer reuse for buffers which will be shared in some way,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * as with scanout buffers. When the buffer reference count goes to zero,
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * it will be freed and not placed in the reuse list.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param bo Buffer to disable reuse for
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * Return the pipe associated with a crtc_id so that vblank
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * synchronization can use the correct data in the request.
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * This is only supported for KMS and gem at this point, when
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * unsupported, this function returns -1 and leaves the decision
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * of what to do in that case to the caller
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param bufmgr the associated buffer manager
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync * \param crtc_id the crtc identifier
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync int (*get_pipe_from_crtc_id)(drm_intel_bufmgr *bufmgr, int crtc_id);
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync int debug; /**< Enables verbose debugging printouts */
7a0d67332f33bc21290d63bc7c8150b0cf0a4b21vboxsync#endif /* INTEL_BUFMGR_PRIV_H */