x86.mac revision 7c0b5100ad271b576a58bad7dcd3d678264401ae
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%ifndef ___VBox_x86_h
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define ___VBox_x86_h
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync%ifdef RT_OS_SOLARIS
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_CF RT_BIT(0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_PF RT_BIT(2)
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync%define X86_EFL_AF RT_BIT(4)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_ZF RT_BIT(6)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_SF RT_BIT(7)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_TF RT_BIT(8)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_IF RT_BIT(9)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_DF RT_BIT(10)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_OF RT_BIT(11)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_IOPL (RT_BIT(12) | RT_BIT(13))
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_NT RT_BIT(14)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_RF RT_BIT(16)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_VM RT_BIT(17)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_AC RT_BIT(18)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_VIF RT_BIT(19)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_VIP RT_BIT(20)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_ID RT_BIT(21)
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define X86_EFL_IOPL_SHIFT 12
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_EFL_GET_IOPL(efl) (((efl) >> X86_EFL_IOPL_SHIFT) & 3)
7b9f0c34e9ea328981c99e97054bdf8684d9d620vboxsync%define X86_EFL_POPF_BITS (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_TF | X86_EFL_IF | X86_EFL_DF | X86_EFL_OF | X86_EFL_IOPL | X86_EFL_NT | X86_EFL_AC | X86_EFL_ID)
9e7e0b61d29309a0ed7af9472c8d6d865f9e8a2dvboxsync%define X86_CPUID_VENDOR_INTEL_EBX 0x756e6547
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CPUID_VENDOR_INTEL_ECX 0x6c65746e
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CPUID_VENDOR_INTEL_EDX 0x49656e69
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CPUID_VENDOR_AMD_EBX 0x68747541
0fd108a555ae02f2fb557d5f2c40281999b60d15vboxsync%define X86_CPUID_VENDOR_AMD_ECX 0x444d4163
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define X86_CPUID_VENDOR_AMD_EDX 0x69746e65
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync%define X86_CPUID_FEATURE_ECX_SSE3 RT_BIT(0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CPUID_FEATURE_ECX_DTES64 RT_BIT(2)
b1cc3e87518139898395f96974ecff9e6bf228fbvboxsync%define X86_CPUID_FEATURE_ECX_MONITOR RT_BIT(3)
b1cc3e87518139898395f96974ecff9e6bf228fbvboxsync%define X86_CPUID_FEATURE_ECX_CPLDS RT_BIT(4)
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define X86_CPUID_FEATURE_ECX_VMX RT_BIT(5)
7862f4bd000f1eb6c86289f5ac2849e9cf943ca9vboxsync%define X86_CPUID_FEATURE_ECX_SMX RT_BIT(6)
388b6b190a5407548753b7fde12fa58134ec3563vboxsync%define X86_CPUID_FEATURE_ECX_EST RT_BIT(7)
7862f4bd000f1eb6c86289f5ac2849e9cf943ca9vboxsync%define X86_CPUID_FEATURE_ECX_TM2 RT_BIT(8)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CPUID_FEATURE_ECX_SSSE3 RT_BIT(9)
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define X86_CPUID_FEATURE_ECX_CNTXID RT_BIT(10)
f9ce005e61f0fbb51a2cabc53d58c3485151faa9vboxsync%define X86_CPUID_FEATURE_ECX_CX16 RT_BIT(13)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CPUID_FEATURE_ECX_TPRUPDATE RT_BIT(14)
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define X86_CPUID_FEATURE_ECX_PDCM RT_BIT(15)
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define X86_CPUID_FEATURE_ECX_DCA RT_BIT(18)
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define X86_CPUID_FEATURE_ECX_SSE4_1 RT_BIT(19)
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define X86_CPUID_FEATURE_ECX_SSE4_2 RT_BIT(20)
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define X86_CPUID_FEATURE_ECX_X2APIC RT_BIT(21)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CPUID_FEATURE_ECX_MOVBE RT_BIT(22)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_ECX_POPCOUNT RT_BIT(23)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_ECX_XSAVE RT_BIT(26)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_ECX_OSXSAVE RT_BIT(27)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_FPU RT_BIT(0)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_VME RT_BIT(1)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_DE RT_BIT(2)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_PSE RT_BIT(3)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_TSC RT_BIT(4)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_MSR RT_BIT(5)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_PAE RT_BIT(6)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_MCE RT_BIT(7)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_CX8 RT_BIT(8)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_APIC RT_BIT(9)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_SEP RT_BIT(11)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_MTRR RT_BIT(12)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_PGE RT_BIT(13)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_MCA RT_BIT(14)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_CMOV RT_BIT(15)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_PAT RT_BIT(16)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_PSE36 RT_BIT(17)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_PSN RT_BIT(18)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_CLFSH RT_BIT(19)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_DS RT_BIT(21)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_ACPI RT_BIT(22)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_MMX RT_BIT(23)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_FXSR RT_BIT(24)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_SSE RT_BIT(25)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_SSE2 RT_BIT(26)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_SS RT_BIT(27)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_HTT RT_BIT(28)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_TM RT_BIT(29)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_FEATURE_EDX_PBE RT_BIT(31)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_AMD_FEATURE_EDX_FPU RT_BIT(0)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_AMD_FEATURE_EDX_VME RT_BIT(1)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_AMD_FEATURE_EDX_DE RT_BIT(2)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CPUID_AMD_FEATURE_EDX_PSE RT_BIT(3)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_TSC RT_BIT(4)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_MSR RT_BIT(5)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_PAE RT_BIT(6)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_MCE RT_BIT(7)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_CX8 RT_BIT(8)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_APIC RT_BIT(9)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_SEP RT_BIT(11)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_MTRR RT_BIT(12)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_PGE RT_BIT(13)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_MCA RT_BIT(14)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_CMOV RT_BIT(15)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_PAT RT_BIT(16)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_PSE36 RT_BIT(17)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_NX RT_BIT(20)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_AXMMX RT_BIT(22)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_MMX RT_BIT(23)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_FXSR RT_BIT(24)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_FFXSR RT_BIT(25)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_PAGE1GB RT_BIT(26)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_RDTSCP RT_BIT(27)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_LONG_MODE RT_BIT(29)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_3DNOW_EX RT_BIT(30)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_EDX_3DNOW RT_BIT(31)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_LAHF_SAHF RT_BIT(0)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_CMPL RT_BIT(1)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_SVM RT_BIT(2)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_EXT_APIC RT_BIT(3)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_CR8L RT_BIT(4)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_ABM RT_BIT(5)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_SSE4A RT_BIT(6)
4171ffb38eb8720b2ae9a8d13e95103ab26cfd12vboxsync%define X86_CPUID_AMD_FEATURE_ECX_MISALNSSE RT_BIT(7)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_3DNOWPRF RT_BIT(8)
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_CPUID_AMD_FEATURE_ECX_OSVW RT_BIT(9)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_SKINIT RT_BIT(12)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_FEATURE_ECX_WDT RT_BIT(13)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_ADVPOWER_EDX_TS RT_BIT(0)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_ADVPOWER_EDX_FID RT_BIT(1)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_ADVPOWER_EDX_VID RT_BIT(2)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_ADVPOWER_EDX_TTP RT_BIT(3)
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_CPUID_AMD_ADVPOWER_EDX_TM RT_BIT(4)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_ADVPOWER_EDX_STC RT_BIT(5)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_ADVPOWER_EDX_MC RT_BIT(6)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_ADVPOWER_EDX_HWPSTATE RT_BIT(7)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CPUID_AMD_ADVPOWER_EDX_TSCINVAR RT_BIT(8)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CR0_PE RT_BIT(0)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CR0_PROTECTION_ENABLE RT_BIT(0)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CR0_MP RT_BIT(1)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CR0_MONITOR_COPROCESSOR RT_BIT(1)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CR0_EM RT_BIT(2)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CR0_EMULATE_FPU RT_BIT(2)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CR0_TS RT_BIT(3)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CR0_TASK_SWITCH RT_BIT(3)
581f0625e43a928987623d7cf59e1b1ab61ca6c8vboxsync%define X86_CR0_ET RT_BIT(4)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_CR0_EXTENSION_TYPE RT_BIT(4)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_NE RT_BIT(5)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_NUMERIC_ERROR RT_BIT(5)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_WP RT_BIT(16)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_WRITE_PROTECT RT_BIT(16)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_AM RT_BIT(18)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_ALIGMENT_MASK RT_BIT(18)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_NW RT_BIT(29)
3f5dd727ecbcf3e99217c70f04bc2340beb9072cvboxsync%define X86_CR0_NOT_WRITE_THROUGH RT_BIT(29)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_CD RT_BIT(30)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_CACHE_DISABLE RT_BIT(30)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_PG RT_BIT(31)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR0_PAGING RT_BIT(31)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR3_PWT RT_BIT(3)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR3_PCD RT_BIT(4)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR3_PAGE_MASK (0xfffff000)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR3_PAE_PAGE_MASK (0xffffffe0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR3_AMD64_PAGE_MASK UINT64_C(0x000ffffffffff000)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR4_VME RT_BIT(0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR4_PVI RT_BIT(1)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR4_TSD RT_BIT(2)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR4_DE RT_BIT(3)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_CR4_PSE RT_BIT(4)
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync%define X86_CR4_PAE RT_BIT(5)
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync%define X86_CR4_MCE RT_BIT(6)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CR4_PGE RT_BIT(7)
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync%define X86_CR4_PCE RT_BIT(8)
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync%define X86_CR4_OSFSXR RT_BIT(9)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_CR4_OSXMMEEXCPT RT_BIT(10)
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync%define X86_CR4_VMXE RT_BIT(13)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR6_B0 RT_BIT(0)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR6_B1 RT_BIT(1)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_DR6_B2 RT_BIT(2)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR6_B3 RT_BIT(3)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR6_BD RT_BIT(13)
702a8ee2dc1de96f2f77e97135015d3e243186fdvboxsync%define X86_DR6_BS RT_BIT(14)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_DR6_BT RT_BIT(15)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_DR6_INIT_VAL UINT64_C(0xFFFF0FF0)
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define X86_DR7_L0 RT_BIT(0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_DR7_G0 RT_BIT(1)
fb41ad77bcfbdb3aaa1fc9503a37ee6a70dc6461vboxsync%define X86_DR7_L1 RT_BIT(2)
fb41ad77bcfbdb3aaa1fc9503a37ee6a70dc6461vboxsync%define X86_DR7_G1 RT_BIT(3)
fb41ad77bcfbdb3aaa1fc9503a37ee6a70dc6461vboxsync%define X86_DR7_L2 RT_BIT(4)
fb41ad77bcfbdb3aaa1fc9503a37ee6a70dc6461vboxsync%define X86_DR7_G2 RT_BIT(5)
fb41ad77bcfbdb3aaa1fc9503a37ee6a70dc6461vboxsync%define X86_DR7_L3 RT_BIT(6)
fb41ad77bcfbdb3aaa1fc9503a37ee6a70dc6461vboxsync%define X86_DR7_G3 RT_BIT(7)
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define X86_DR7_LE RT_BIT(8)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_GE RT_BIT(9)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_GD RT_BIT(13)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_RW0_MASK (3 << 16)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_LEN0_MASK (3 << 18)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_RW1_MASK (3 << 20)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_LEN1_MASK (3 << 22)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_RW2_MASK (3 << 24)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_LEN2_MASK (3 << 26)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_DR7_RW3_MASK (3 << 28)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_LEN3_MASK (3 << 30)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_MB1_MASK (RT_BIT(10))
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_L(iBp) ( UINT32_C(1) << (iBp * 2) )
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_G(iBp) ( UINT32_C(1) << (iBp * 2 + 1) )
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_RW_EO 0
fb41ad77bcfbdb3aaa1fc9503a37ee6a70dc6461vboxsync%define X86_DR7_RW_WO 1
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_RW_IO 2
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define X86_DR7_RW_RW 3
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_DR7_RW(iBp, fRw) ( (fRw) << ((iBp) * 4 + 16) )
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_DR7_LEN_BYTE 0
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define X86_DR7_LEN_WORD 1
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_DR7_LEN_QWORD 2
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define X86_DR7_LEN_DWORD 3
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define X86_DR7_LEN(iBp, cb) ( (cb) << ((iBp) * 4 + 18) )
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_DR7_GET_LEN(uDR7, iBp) ( ( (uDR7) >> ((iBp) * 4 + 18) ) & 0x3)
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define X86_DR7_ENABLED_MASK (RT_BIT(0) | RT_BIT(1) | RT_BIT(2) | RT_BIT(3) | RT_BIT(4) | RT_BIT(5) | RT_BIT(6) | RT_BIT(7))
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_DR7_IO_ENABLED_MASK (X86_DR7_RW(0, X86_DR7_RW_IO) | X86_DR7_RW(1, X86_DR7_RW_IO) | X86_DR7_RW(2, X86_DR7_RW_IO) | X86_DR7_RW(3, X86_DR7_RW_IO))
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_DR7_INIT_VAL 0x400
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define MSR_IA32_TSC 0x10
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define MSR_IA32_PLATFORM_ID 0x17
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%ifndef MSR_IA32_APICBASE
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define MSR_IA32_APICBASE 0x1b
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define MSR_IA32_FEATURE_CONTROL 0x3A
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define MSR_IA32_FEATURE_CONTROL_LOCK RT_BIT(0)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_FEATURE_CONTROL_VMXON RT_BIT(2)
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_BIOS_UPDT_TRIG 0x79
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_BIOS_SIGN_ID 0x8B
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_MTRR_CAP 0xFE
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%ifndef MSR_IA32_SYSENTER_CS
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_SYSENTER_CS 0x174
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_SYSENTER_ESP 0x175
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_SYSENTER_EIP 0x176
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_MCP_CAP 0x179
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_MCP_STATUS 0x17A
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_MCP_CTRL 0x17B
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_CR_PAT 0x277
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_PERFEVTSEL0 0x186
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define MSR_IA32_PERFEVTSEL1 0x187
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_PERF_STATUS 0x198
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_PERF_CTL 0x199
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_MTRR_DEF_TYPE 0x2FF
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_MC0_CTL 0x400
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define MSR_IA32_MC0_STATUS 0x401
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define MSR_IA32_VMX_BASIC_INFO 0x480
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_PINBASED_CTLS 0x481
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_PROCBASED_CTLS 0x482
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_EXIT_CTLS 0x483
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_ENTRY_CTLS 0x484
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_MISC 0x485
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_CR0_FIXED0 0x486
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_CR0_FIXED1 0x487
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_CR4_FIXED0 0x488
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_CR4_FIXED1 0x489
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_VMCS_ENUM 0x48A
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_PROCBASED_CTLS2 0x48B
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_VMX_EPT_CAPS 0x48C
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_APIC_START 0x800
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_IA32_APIC_END 0x900
ecf100db90e8e3af96312908282d3c20e754fbe8vboxsync%define MSR_K6_EFER 0xc0000080
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define MSR_K6_EFER_SCE RT_BIT(0)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define MSR_K6_EFER_LME RT_BIT(8)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define MSR_K6_EFER_LMA RT_BIT(10)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define MSR_K6_EFER_NXE RT_BIT(11)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define MSR_K6_EFER_SVME RT_BIT(12)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define MSR_K6_EFER_LMSLE RT_BIT(13)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define MSR_K6_EFER_FFXSR RT_BIT(14)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K6_STAR 0xc0000081
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define MSR_K6_STAR_SYSRET_CS_SS_SHIFT 48
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define MSR_K6_STAR_SYSCALL_CS_SS_SHIFT 32
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define MSR_K6_STAR_SEL_MASK 0xffff
fb41ad77bcfbdb3aaa1fc9503a37ee6a70dc6461vboxsync%define MSR_K6_STAR_SYSCALL_EIP_MASK 0xffffffff
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K6_WHCR 0xc0000082
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K6_UWCCR 0xc0000085
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K6_PSOR 0xc0000087
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K6_PFIR 0xc0000088
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K7_EVNTSEL0 0xc0010000
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K7_EVNTSEL1 0xc0010001
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K7_EVNTSEL2 0xc0010002
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K7_EVNTSEL3 0xc0010003
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K7_PERFCTR0 0xc0010004
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K7_PERFCTR1 0xc0010005
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K7_PERFCTR2 0xc0010006
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define MSR_K7_PERFCTR3 0xc0010007
9523921c89c66f4bececdbd5ac95aed0039eda1bvboxsync%define MSR_K8_HWCR 0xc0010015
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_LSTAR 0xc0000082
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_CSTAR 0xc0000083
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define MSR_K8_SF_MASK 0xc0000084
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define MSR_K8_FS_BASE 0xc0000100
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define MSR_K8_GS_BASE 0xc0000101
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_KERNEL_GS_BASE 0xc0000102
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_TSC_AUX 0xc0000103
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_SYSCFG 0xc0010010
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define MSR_K8_HWCR 0xc0010015
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define MSR_K8_IORRBASE0 0xc0010016
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define MSR_K8_IORRMASK0 0xc0010017
9523921c89c66f4bececdbd5ac95aed0039eda1bvboxsync%define MSR_K8_IORRBASE1 0xc0010018
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_IORRMASK1 0xc0010019
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_TOP_MEM1 0xc001001a
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_TOP_MEM2 0xc001001d
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_VM_CR 0xc0010114
9523921c89c66f4bececdbd5ac95aed0039eda1bvboxsync%define MSR_K8_VM_CR_SVM_DISABLE RT_BIT(4)
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define MSR_K8_IGNNE 0xc0010115
9523921c89c66f4bececdbd5ac95aed0039eda1bvboxsync%define MSR_K8_SMM_CTL 0xc0010116
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define MSR_K8_VM_HSAVE_PA 0xc0010117
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define X86_PG_ENTRIES 1024
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define X86_PG_PAE_ENTRIES 512
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define X86_PG_PAE_PDPE_ENTRIES 4
9523921c89c66f4bececdbd5ac95aed0039eda1bvboxsync%define X86_PG_AMD64_ENTRIES X86_PG_PAE_ENTRIES
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PG_AMD64_PDPE_ENTRIES X86_PG_AMD64_ENTRIES
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PAGE_4K_SIZE _4K
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PAGE_4K_SHIFT 12
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PAGE_4K_OFFSET_MASK 0xfff
9523921c89c66f4bececdbd5ac95aed0039eda1bvboxsync%define X86_PAGE_4K_BASE_MASK 0xfffffffffffff000
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define X86_PAGE_4K_BASE_MASK_32 0xfffff000
9523921c89c66f4bececdbd5ac95aed0039eda1bvboxsync%define X86_PAGE_2M_SIZE _2M
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PAGE_2M_SHIFT 21
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define X86_PAGE_2M_OFFSET_MASK 0x001fffff
ed9d3db07648c7e3a979105c15ad752ee9ea18devboxsync%define X86_PAGE_2M_BASE_MASK 0xffffffffffe00000
ed9d3db07648c7e3a979105c15ad752ee9ea18devboxsync%define X86_PAGE_2M_BASE_MASK_32 0xffe00000
ed9d3db07648c7e3a979105c15ad752ee9ea18devboxsync%define X86_PAGE_4M_SIZE _4M
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PAGE_4M_SHIFT 22
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PAGE_4M_OFFSET_MASK 0x003fffff
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PAGE_4M_BASE_MASK 0xffffffffffc00000
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PAGE_4M_BASE_MASK_32 0xffc00000
9523921c89c66f4bececdbd5ac95aed0039eda1bvboxsync%define X86_PTE_BIT_P 0
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define X86_PTE_BIT_RW 1
d4a9d525e6f2111d462d2d96462dced6b9ec00efvboxsync%define X86_PTE_BIT_US 2
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PTE_BIT_PWT 3
e86baafe99d1f1eb37adcca5fdecfd06e7f13bc5vboxsync%define X86_PTE_BIT_PCD 4
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define X86_PTE_BIT_A 5
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_PTE_BIT_D 6
c55bf74b54ecdfb5ebc4e5d90b620d0fee31737evboxsync%define X86_PTE_BIT_PAT 7
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync%define X86_PTE_BIT_G 8
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_P RT_BIT(0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_RW RT_BIT(1)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_US RT_BIT(2)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_PWT RT_BIT(3)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_PCD RT_BIT(4)
06ea6bcf23874b662d499b3f130024c98b2dd7a6vboxsync%define X86_PTE_A RT_BIT(5)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_D RT_BIT(6)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_PAT RT_BIT(7)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_G RT_BIT(8)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
702a8ee2dc1de96f2f77e97135015d3e243186fdvboxsync%define X86_PTE_PG_MASK ( 0xfffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_PAE_PG_MASK ( 0x0000fffffffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_PAE_PG_MASK_FULL ( 0x000ffffffffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_PAE_PG_MASK ( 0x000ffffffffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PTE_PAE_NX RT_BIT_64(63)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PT_SHIFT 12
5f2b03bf7695dabd71222dba123532a3f76828c1vboxsync%define X86_PT_MASK 0x3ff
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PT_PAE_SHIFT 12
510567648d46488f4166e5f69ffffe3eeeeec4d9vboxsync%define X86_PT_PAE_MASK 0x1ff
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_P RT_BIT(0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_RW RT_BIT(1)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_US RT_BIT(2)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_PWT RT_BIT(3)
06ea6bcf23874b662d499b3f130024c98b2dd7a6vboxsync%define X86_PDE_PCD RT_BIT(4)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_A RT_BIT(5)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_PS RT_BIT(7)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_PG_MASK ( 0xfffff000 )
702a8ee2dc1de96f2f77e97135015d3e243186fdvboxsync%define X86_PDE_PAE_PG_MASK ( 0x0000fffffffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_PAE_PG_MASK_FULL ( 0x000ffffffffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_PAE_PG_MASK ( 0x000ffffffffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE_PAE_NX RT_BIT_64(63)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_P RT_BIT(0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_RW RT_BIT(1)
5f2b03bf7695dabd71222dba123532a3f76828c1vboxsync%define X86_PDE4M_US RT_BIT(2)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_PWT RT_BIT(3)
510567648d46488f4166e5f69ffffe3eeeeec4d9vboxsync%define X86_PDE4M_PCD RT_BIT(4)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_A RT_BIT(5)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_D RT_BIT(6)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_PS RT_BIT(7)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_G RT_BIT(8)
06ea6bcf23874b662d499b3f130024c98b2dd7a6vboxsync%define X86_PDE4M_AVL (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_PAT RT_BIT(12)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_PAT_SHIFT (12 - 7)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_PG_MASK ( 0xffc00000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE4M_PG_HIGH_MASK ( 0x001fe000 )
702a8ee2dc1de96f2f77e97135015d3e243186fdvboxsync%define X86_PDE4M_PG_HIGH_SHIFT 19
702a8ee2dc1de96f2f77e97135015d3e243186fdvboxsync%define X86_PDE2M_PAE_PG_MASK ( 0x000fffffffe00000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDE2M_PAE_NX X86_PDE2M_PAE_NX
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PD_SHIFT 22
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PD_MASK 0x3ff
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PD_PAE_SHIFT 21
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PD_PAE_MASK 0x1ff
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPE_P RT_BIT(0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPE_RW RT_BIT(1)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_PDPE_US RT_BIT(2)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPE_PWT RT_BIT(3)
510567648d46488f4166e5f69ffffe3eeeeec4d9vboxsync%define X86_PDPE_PCD RT_BIT(4)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPE_A RT_BIT(5)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPE_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPE_PG_MASK ( 0x0000fffffffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPE_PG_MASK_FULL ( 0x000ffffffffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPE_PG_MASK ( 0x000ffffffffff000 )
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPE_NX RT_BIT_64(63)
702a8ee2dc1de96f2f77e97135015d3e243186fdvboxsync%define X86_PDPT_SHIFT 30
702a8ee2dc1de96f2f77e97135015d3e243186fdvboxsync%define X86_PDPT_MASK_PAE 0x3
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PDPT_MASK_AMD64 0x1ff
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PML4E_P RT_BIT(0)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PML4E_RW RT_BIT(1)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PML4E_US RT_BIT(2)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PML4E_PWT RT_BIT(3)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PML4E_PCD RT_BIT(4)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_PML4E_A RT_BIT(5)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_PML4E_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
510567648d46488f4166e5f69ffffe3eeeeec4d9vboxsync%define X86_PML4E_PG_MASK ( 0x0000fffffffff000 )
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_PML4E_PG_MASK_FULL ( 0x000ffffffffff000 )
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_PML4E_PG_MASK ( 0x000ffffffffff000 )
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_PML4E_NX RT_BIT_64(63)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_PML4_SHIFT 39
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_PML4_MASK 0x1ff
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%if HC_ARCH_BITS == 64
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%if HC_ARCH_BITS == 64
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%if HC_ARCH_BITS == 64
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_SEL_TYPE_CODE 8
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_SEL_TYPE_MEMORY RT_BIT(4)
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync%define X86_SEL_TYPE_ACCESSED 1
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_DOWN 4
510567648d46488f4166e5f69ffffe3eeeeec4d9vboxsync%define X86_SEL_TYPE_CONF 4
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_WRITE 2
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_READ 2
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_RO 0
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_RO_ACC (0 | X86_SEL_TYPE_ACCESSED)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_RW 2
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_RW_ACC (2 | X86_SEL_TYPE_ACCESSED)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_RO_DOWN 4
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_RO_DOWN_ACC (4 | X86_SEL_TYPE_ACCESSED)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_RW_DOWN 6
702a8ee2dc1de96f2f77e97135015d3e243186fdvboxsync%define X86_SEL_TYPE_RW_DOWN_ACC (6 | X86_SEL_TYPE_ACCESSED)
702a8ee2dc1de96f2f77e97135015d3e243186fdvboxsync%define X86_SEL_TYPE_EO (0 | X86_SEL_TYPE_CODE)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_EO_ACC (0 | X86_SEL_TYPE_CODE | X86_SEL_TYPE_ACCESSED)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_ER (2 | X86_SEL_TYPE_CODE)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_ER_ACC (2 | X86_SEL_TYPE_CODE | X86_SEL_TYPE_ACCESSED)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_EO_CONF (4 | X86_SEL_TYPE_CODE)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_EO_CONF_ACC (4 | X86_SEL_TYPE_CODE | X86_SEL_TYPE_ACCESSED)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_ER_CONF (6 | X86_SEL_TYPE_CODE)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_ER_CONF_ACC (6 | X86_SEL_TYPE_CODE | X86_SEL_TYPE_ACCESSED)
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_SYS_UNDEFINED 0
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_SYS_286_TSS_AVAIL 1
510567648d46488f4166e5f69ffffe3eeeeec4d9vboxsync%define X86_SEL_TYPE_SYS_LDT 2
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_SYS_286_TSS_BUSY 3
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_SYS_286_CALL_GATE 4
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_SYS_TASK_GATE 5
2f3883b126a405f92b19e829472f614c7352b4f9vboxsync%define X86_SEL_TYPE_SYS_286_INT_GATE 6
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_SEL_TYPE_SYS_286_TRAP_GATE 7
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_SEL_TYPE_SYS_UNDEFINED2 8
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_SEL_TYPE_SYS_386_TSS_AVAIL 9
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_SEL_TYPE_SYS_UNDEFINED3 0xA
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_SEL_TYPE_SYS_386_TSS_BUSY 0xB
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_SEL_TYPE_SYS_386_CALL_GATE 0xC
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_SEL_TYPE_SYS_UNDEFINED4 0xD
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_SEL_TYPE_SYS_386_INT_GATE 0xE
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_SEL_TYPE_SYS_386_TRAP_GATE 0xF
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define AMD64_SEL_TYPE_SYS_LDT 2
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define AMD64_SEL_TYPE_SYS_TSS_AVAIL 9
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define AMD64_SEL_TYPE_SYS_TSS_BUSY 0xB
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define AMD64_SEL_TYPE_SYS_CALL_GATE 0xC
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define AMD64_SEL_TYPE_SYS_INT_GATE 0xE
510567648d46488f4166e5f69ffffe3eeeeec4d9vboxsync%define AMD64_SEL_TYPE_SYS_TRAP_GATE 0xF
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_DESC_TYPE_MASK (RT_BIT(8) | RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_DESC_S RT_BIT(12)
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_DESC_DPL (RT_BIT(13) | RT_BIT(14))
7e8ef90d3160234df0f254131b87af4243d79476vboxsync%define X86_DESC_P RT_BIT(15)
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_DESC_AVL RT_BIT(20)
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_DESC_DB RT_BIT(22)
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_DESC_G RT_BIT(23)
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_SEL_SHIFT 3
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_SEL_MASK 0xfff8
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_SEL_LDT 0x0004
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_SEL_RPL 0x0003
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_TRAP_ERR_EXTERNAL 1
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_TRAP_ERR_IDT 2
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_TRAP_ERR_TI 4
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_TRAP_ERR_SEL_MASK 0xfff8
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_TRAP_ERR_SEL_SHIFT 3
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_TRAP_PF_P RT_BIT(0)
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_TRAP_PF_RW RT_BIT(1)
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_TRAP_PF_US RT_BIT(2)
cd5df721f068659172f3bf95de8fedeb465f057dvboxsync%define X86_TRAP_PF_RSVD RT_BIT(3)
510567648d46488f4166e5f69ffffe3eeeeec4d9vboxsync%define X86_TRAP_PF_ID RT_BIT(4)