pdmdev.h revision 1cde4dd19cba0507a9cdab737272d88feba05d41
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * PDM - Pluggable Device Manager, Devices.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Copyright (C) 2006-2013 Oracle Corporation
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * available from http://www.virtualbox.org. This file is free software;
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * you can redistribute it and/or modify it under the terms of the GNU
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * General Public License (GPL) as published by the Free Software
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * The contents of this file may alternatively be used under the terms
0d12c7f9423f2745f8e282523d0930f91bff03b3vboxsync * of the Common Development and Distribution License Version 1.0
0d12c7f9423f2745f8e282523d0930f91bff03b3vboxsync * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
0d12c7f9423f2745f8e282523d0930f91bff03b3vboxsync * VirtualBox OSE distribution, in which case the provisions of the
0d12c7f9423f2745f8e282523d0930f91bff03b3vboxsync * CDDL are applicable instead of those of the GPL.
0d12c7f9423f2745f8e282523d0930f91bff03b3vboxsync * You may elect to license modified versions of this file under the
0d12c7f9423f2745f8e282523d0930f91bff03b3vboxsync * terms and conditions of either the GPL or the CDDL or both.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync/** @defgroup grp_pdm_device The PDM Devices API
c2046db2cc346cc299f0cd9b2d1e160179159cfcvboxsync * @ingroup grp_pdm
c2046db2cc346cc299f0cd9b2d1e160179159cfcvboxsync * Construct a device instance for a VM.
c2046db2cc346cc299f0cd9b2d1e160179159cfcvboxsync * @returns VBox status.
c2046db2cc346cc299f0cd9b2d1e160179159cfcvboxsync * @param pDevIns The device instance data. If the registration structure
c2046db2cc346cc299f0cd9b2d1e160179159cfcvboxsync * is needed, it can be accessed thru pDevIns->pReg.
c2046db2cc346cc299f0cd9b2d1e160179159cfcvboxsync * @param iInstance Instance number. Use this to figure out which registers
c2046db2cc346cc299f0cd9b2d1e160179159cfcvboxsync * and such to use. The instance number is also found in
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * pDevIns->iInstance, but since it's likely to be
044af0d1e6474076366759db86f101778c5f20ccvboxsync * frequently used PDM passes it as parameter.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pCfg Configuration node handle for the driver. This is
044af0d1e6474076366759db86f101778c5f20ccvboxsync * expected to be in high demand in the constructor and is
044af0d1e6474076366759db86f101778c5f20ccvboxsync * therefore passed as an argument. When using it at other
044af0d1e6474076366759db86f101778c5f20ccvboxsync * times, it can be found in pDrvIns->pCfg.
044af0d1e6474076366759db86f101778c5f20ccvboxsynctypedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
044af0d1e6474076366759db86f101778c5f20ccvboxsync/** Pointer to a FNPDMDEVCONSTRUCT() function. */
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Destruct a device instance.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Most VM resources are freed by the VM. This callback is provided so that any non-VM
044af0d1e6474076366759db86f101778c5f20ccvboxsync * resources can be freed correctly.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @returns VBox status.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pDevIns The device instance data.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @remarks The device critical section is not entered. The routine may delete
044af0d1e6474076366759db86f101778c5f20ccvboxsync * the critical section, so the caller cannot exit it.
044af0d1e6474076366759db86f101778c5f20ccvboxsynctypedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
044af0d1e6474076366759db86f101778c5f20ccvboxsync/** Pointer to a FNPDMDEVDESTRUCT() function. */
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Device relocation callback.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * This is called when the instance data has been relocated in raw-mode context
044af0d1e6474076366759db86f101778c5f20ccvboxsync * (RC). It is also called when the RC hypervisor selects changes. The device
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * must fixup all necessary pointers and re-query all interfaces to other RC
044af0d1e6474076366759db86f101778c5f20ccvboxsync * devices and drivers.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Before the RC code is executed the first time, this function will be called
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * with a 0 delta so RC pointer calculations can be one in one place.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pDevIns Pointer to the device instance.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param offDelta The relocation delta relative to the old location.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * @remarks A relocation CANNOT fail.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @remarks The device critical section is not entered. The relocations should
044af0d1e6474076366759db86f101778c5f20ccvboxsync * not normally require any locking.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsynctypedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync/** Pointer to a FNPDMDEVRELOCATE() function. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Power On notification.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @returns VBox status.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pDevIns The device instance data.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @remarks Caller enters the device critical section.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsynctypedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync/** Pointer to a FNPDMDEVPOWERON() function. */
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * Reset notification.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * @returns VBox status.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * @param pDevIns The device instance data.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * @remarks Caller enters the device critical section.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsynctypedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync/** Pointer to a FNPDMDEVRESET() function. */
a1df400bbe9d64aad400442e56eb637019300a5evboxsync * Suspend notification.
a1df400bbe9d64aad400442e56eb637019300a5evboxsync * @returns VBox status.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * @param pDevIns The device instance data.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * @thread EMT(0)
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * @remarks Caller enters the device critical section.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsynctypedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
a1df400bbe9d64aad400442e56eb637019300a5evboxsync/** Pointer to a FNPDMDEVSUSPEND() function. */
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Resume notification.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @returns VBox status.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pDevIns The device instance data.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @remarks Caller enters the device critical section.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsynctypedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync/** Pointer to a FNPDMDEVRESUME() function. */
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * Power Off notification.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * This is only called when the VMR3PowerOff call is made on a running VM. This
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * means that there is no notification if the VM was suspended before being
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * powered of. There will also be no callback when hot plugging devices.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pDevIns The device instance data.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @thread EMT(0)
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @remarks Caller enters the device critical section.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsynctypedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync/** Pointer to a FNPDMDEVPOWEROFF() function. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Attach command.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * This is called to let the device attach to a driver for a specified LUN
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * at runtime. This is not called during VM construction, the device
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * constructor have to attach to all the available drivers.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * This is like plugging in the keyboard or mouse after turning on the PC.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * @returns VBox status code.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * @param pDevIns The device instance.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * @param iLUN The logical unit which is being detached.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * @remarks Caller enters the device critical section.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsynctypedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync/** Pointer to a FNPDMDEVATTACH() function. */
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * Detach notification.
7d80dfbe5d66fc4c6de6fe109ce96a081496dcd4vboxsync * This is called when a driver is detaching itself from a LUN of the device.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * The device should adjust it's state to reflect this.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * This is like unplugging the network cable to use it for the laptop or
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * something while the PC is still running.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns The device instance.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param iLUN The logical unit which is being detached.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @remarks Caller enters the device critical section.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsynctypedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Pointer to a FNPDMDEVDETACH() function. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Query the base interface of a logical unit.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @returns VBOX status code.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns The device instance.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param iLUN The logicial unit to query.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param ppBase Where to store the pointer to the base interface of the LUN.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @remarks The device critical section is not entered.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsynctypedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsynctypedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Init complete notification.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * This can be done to do communication with other devices and other
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * initialization which requires everything to be in place.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @returns VBOX status code.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns The device instance.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @remarks Caller enters the device critical section.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsynctypedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsynctypedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * PDM Device Registration Structure.
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync * This structure is used when registering a device from VBoxInitDevices() in HC
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync * Ring-3. PDM will continue use till the VM is terminated.
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsynctypedef struct PDMDEVREG
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync /** Structure version. PDM_DEVREG_VERSION defines the current version. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync /** Device name. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync /** Name of the raw-mode context module (no path).
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Name of the ring-0 module (no path).
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync /** The description of the device. The UTF-8 string pointed to shall, like this structure,
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * remain unchanged from registration till VM destruction. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Maximum number of instances (per VM). */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Size of the instance data. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Construct instance - required. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Destruct instance - optional.
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync * Critical section NOT entered (will be destroyed). */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Relocation command - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section NOT entered. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Unused member. (Was pfnIOCtl.) */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Power on notification - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section is entered. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Reset notification - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section is entered. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync /** Suspend notification - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section is entered. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Resume notification - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section is entered. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Attach command - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section is entered. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Detach notification - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section is entered. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync /** Query a LUN base interface - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section is NOT entered. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Init complete notification - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section is entered. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Power off notification - optional.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Critical section is entered. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** @todo */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Initialization safty marker. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync/** Pointer to a PDM Device Structure. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Const pointer to a PDM Device Structure. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync/** Current DEVREG version number. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync/** PDM Device Flags.
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync/** This flag is used to indicate that the device has a RC component. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync/** This flag is used to indicate that the device has a R0 component. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * The bit count for the current host. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** The host bit count mask. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync/** The device support only 32-bit guests. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync/** The device support only 64-bit guests. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** The device support both 32-bit & 64-bit guests. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * The guest bit count for the current compilation. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** The guest bit count mask. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** A convenience. */
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync/** Indicates that the devices support PAE36 on a 32-bit guest. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Indicates that the device needs to be notified before the drivers when suspending. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Indicates that the device needs to be notified before the drivers when powering off. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Indicates that the device needs to be notified before the drivers when resetting. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** PDM Device Classes.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * The order is important, lower bit earlier instantiation.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Architecture device. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Architecture BIOS device. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** PCI bus brigde. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** ISA bus brigde. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Input device (mouse, keyboard, joystick, HID, ...). */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Interrupt controller (PIC). */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Interval controoler (PIT). */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** DMA controller. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** VMM Device. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Graphics device, like VGA. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Storage controller device. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Network interface controller. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Audio. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** USB HIC. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** ACPI. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Serial controller device. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Parallel controller device */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Host PCI pass-through device */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Misc devices (always last). */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** @name IRQ Level for use with the *SetIrq APIs.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Assert the IRQ (can assume value 1). */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Deassert the IRQ (can assume value 0). */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** flip-flop - deassert and then assert the IRQ again immediately. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Registration record for MSI.
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsynctypedef struct PDMMSIREG
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync /** Number of MSI interrupt vectors, 0 if MSI not supported */
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync /** Offset of MSI capability */
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync /** Offset of next capability to MSI */
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync /** If we support 64-bit MSI addressing */
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync /** Offset of MSI-X capability */
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync /** Offset of next capability to MSI-X */
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync * PCI Bus registration structure.
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsynctypedef struct PDMPCIBUSREG
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync * Registers the device with the default PCI bus.
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync * @returns VBox status code.
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync * @param pDevIns Device instance of the PCI Bus.
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync * @param pPciDev The PCI device structure.
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync * Any PCI enabled device must keep this in it's instance data!
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync * Fill in the PCI data config before registration, please.
9b19ad593b379ebfcc8273f85b90763b14b1da63vboxsync * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * If negative, the pci bus device will assign one.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @remarks Caller enters the PDM critical section.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * Initialize MSI support in a PCI device.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @returns VBox status code.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns Device instance of the PCI Bus.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pPciDev The PCI device structure.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pMsiReg MSI registration structure
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * @remarks Caller enters the PDM critical section.
044af0d1e6474076366759db86f101778c5f20ccvboxsync DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @returns VBox status code.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns Device instance of the PCI Bus.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pPciDev The PCI device structure.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param iRegion The region number.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param cbRegion Size of the region.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pfnCallback Callback for doing the mapping.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @remarks Caller enters the PDM critical section.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
9d020a0622f95aec3aabaff436a495e88dbbd71avboxsync * Register PCI configuration space read/write callbacks.
88acfa6629a7976c0583c1712d2b5b22a87a5121vboxsync * @param pDevIns Device instance of the PCI Bus.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pPciDev The PCI device structure.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pfnRead Pointer to the user defined PCI config read function.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * PCI config read function. This way, user can decide when (and if)
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * to call default PCI config read function. Can be NULL.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pfnWrite Pointer to the user defined PCI config write function.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * PCI config write function. This way, user can decide when (and if)
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * to call default PCI config write function. Can be NULL.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @remarks Caller enters the PDM critical section.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @thread EMT
a1df400bbe9d64aad400442e56eb637019300a5evboxsync DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
a1df400bbe9d64aad400442e56eb637019300a5evboxsync PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
9d020a0622f95aec3aabaff436a495e88dbbd71avboxsync * Set the IRQ for a PCI device.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns Device instance of the PCI Bus.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pPciDev The PCI device structure.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param iIrq IRQ number to set.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @remarks Caller enters the PDM critical section.
9d020a0622f95aec3aabaff436a495e88dbbd71avboxsync DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
9d020a0622f95aec3aabaff436a495e88dbbd71avboxsync * Called to perform the job of the bios.
9d020a0622f95aec3aabaff436a495e88dbbd71avboxsync * This is only called for the first PCI Bus - it is expected to
9d020a0622f95aec3aabaff436a495e88dbbd71avboxsync * service all the PCI buses.
9d020a0622f95aec3aabaff436a495e88dbbd71avboxsync * @returns VBox status.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns Device instance of the first bus.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @remarks Caller enters the PDM critical section.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** The name of the SetIrq RC entry point. */
9d020a0622f95aec3aabaff436a495e88dbbd71avboxsync /** The name of the SetIrq R0 entry point. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Pointer to a PCI bus registration structure. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Current PDMPCIBUSREG version number. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * PCI Bus RC helpers.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsynctypedef struct PDMPCIHLPRC
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Set an ISA IRQ.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns PCI device instance.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param iIrq IRQ number to set.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param uTagSrc The IRQ tag and source (for tracing).
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @thread EMT only.
044af0d1e6474076366759db86f101778c5f20ccvboxsync DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Set an I/O-APIC IRQ.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pDevIns PCI device instance.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param iIrq IRQ number to set.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param uTagSrc The IRQ tag and source (for tracing).
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @thread EMT only.
044af0d1e6474076366759db86f101778c5f20ccvboxsync DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync * Send an MSI.
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync * @param pDevIns PCI device instance.
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync * @param GCPhys Physical address MSI request was written.
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync * @param uValue Value written.
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync * @thread EMT only.
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync * Acquires the PDM lock.
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync * @returns VINF_SUCCESS on success.
5eda82e218d35ae0691febd531e1bfc0324cc4a6vboxsync * @returns rc if we failed to acquire the lock.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns The PCI device instance.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param rc What to return if we fail to acquire the lock.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * Releases the PDM lock.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns The PCI device instance.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync /** Just a safety precaution. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Pointer to PCI helpers. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync/** Pointer to const PCI helpers. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsynctypedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync/** Current PDMPCIHLPRC version number. */
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * PCI Bus R0 helpers.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsynctypedef struct PDMPCIHLPR0
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Set an ISA IRQ.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns PCI device instance.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param iIrq IRQ number to set.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @thread EMT only.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
9939c713bffcfc4305d99d994552aa2ad9bce097vboxsync * Set an I/O-APIC IRQ.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns PCI device instance.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param iIrq IRQ number to set.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @thread EMT only.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Send an MSI.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns PCI device instance.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param GCPhys Physical address MSI request was written.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param uValue Value written.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @thread EMT only.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Acquires the PDM lock.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @returns VINF_SUCCESS on success.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @returns rc if we failed to acquire the lock.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param pDevIns The PCI device instance.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param rc What to return if we fail to acquire the lock.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Releases the PDM lock.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns The PCI device instance.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync /** Just a safety precaution. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync/** Pointer to PCI helpers. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync/** Pointer to const PCI helpers. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsynctypedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync/** Current PDMPCIHLPR0 version number. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * PCI device helpers.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsynctypedef struct PDMPCIHLPR3
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Set an ISA IRQ.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns The PCI device instance.
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * @param iIrq IRQ number to set.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * @param uTagSrc The IRQ tag and source (for tracing).
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * Set an I/O-APIC IRQ.
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * @param pDevIns The PCI device instance.
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * @param iIrq IRQ number to set.
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * @param uTagSrc The IRQ tag and source (for tracing).
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * Send an MSI.
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * @param pDevIns PCI device instance.
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * @param GCPhys Physical address MSI request was written.
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * @param uValue Value written.
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync * @param uTagSrc The IRQ tag and source (for tracing).
bbb4c0bfd5ea55e99591d8811771257a437053eevboxsync DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Checks if the given address is an MMIO2 base address or not.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @returns true/false accordingly.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns The PCI device instance.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pOwner The owner of the memory, optional.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param GCPhys The address to check.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Gets the address of the RC PCI Bus helpers.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * This should be called at both construction and relocation time
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * to obtain the correct address of the RC helpers.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @returns RC pointer to the PCI Bus helpers.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns Device instance of the PCI Bus.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @thread EMT only.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Gets the address of the R0 PCI Bus helpers.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * This should be called at both construction and relocation time
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * to obtain the correct address of the R0 helpers.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @returns R0 pointer to the PCI Bus helpers.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns Device instance of the PCI Bus.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @thread EMT only.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Acquires the PDM lock.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @returns VINF_SUCCESS on success.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @returns Fatal error on failure.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns The PCI device instance.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param rc Dummy for making the interface identical to the RC and R0 versions.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Releases the PDM lock.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns The PCI device instance.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync /** Just a safety precaution. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync/** Pointer to PCI helpers. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync/** Pointer to const PCI helpers. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsynctypedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync/** Current PDMPCIHLPR3 version number. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Programmable Interrupt Controller registration structure.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsynctypedef struct PDMPICREG
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync /** Structure version number. PDM_PICREG_VERSION defines the current version. */
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Set the an IRQ.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns Device instance of the PIC.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param iIrq IRQ number to set.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @remarks Caller enters the PDM critical section.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Get a pending interrupt.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @returns Pending interrupt number.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @param pDevIns Device instance of the PIC.
a1df400bbe9d64aad400442e56eb637019300a5evboxsync * @param puTagSrc Where to return the IRQ tag and source.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * @remarks Caller enters the PDM critical section.
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync /** The name of the RC SetIrq entry point. */
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync /** The name of the RC GetInterrupt entry point. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync /** The name of the R0 SetIrq entry point. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync /** The name of the R0 GetInterrupt entry point. */
ad27e1d5e48ca41245120c331cc88b50464813cevboxsync/** Pointer to a PIC registration structure. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync/** Current PDMPICREG version number. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * PIC RC helpers.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsynctypedef struct PDMPICHLPRC
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Set the interrupt force action flag.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the PIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Clear the interrupt force action flag.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the PIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Acquires the PDM lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns VINF_SUCCESS on success.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns rc if we failed to acquire the lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns The PIC device instance.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param rc What to return if we fail to acquire the lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Releases the PDM lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns The PIC device instance.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync /** Just a safety precaution. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync/** Pointer to PIC RC helpers. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync/** Pointer to const PIC RC helpers. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsynctypedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
a1df400bbe9d64aad400442e56eb637019300a5evboxsync/** Current PDMPICHLPRC version number. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * PIC R0 helpers.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsynctypedef struct PDMPICHLPR0
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Set the interrupt force action flag.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the PIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Clear the interrupt force action flag.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the PIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Acquires the PDM lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns VINF_SUCCESS on success.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns rc if we failed to acquire the lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns The PIC device instance.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param rc What to return if we fail to acquire the lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Releases the PDM lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns The PCI device instance.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync /** Just a safety precaution. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync/** Pointer to PIC R0 helpers. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync/** Pointer to const PIC R0 helpers. */
ad27e1d5e48ca41245120c331cc88b50464813cevboxsynctypedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync/** Current PDMPICHLPR0 version number. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * PIC R3 helpers.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsynctypedef struct PDMPICHLPR3
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync /** Structure version. PDM_PICHLP_VERSION defines the current version. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Set the interrupt force action flag.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the PIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Clear the interrupt force action flag.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the PIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Acquires the PDM lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns VINF_SUCCESS on success.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns Fatal error on failure.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns The PIC device instance.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param rc Dummy for making the interface identical to the RC and R0 versions.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Releases the PDM lock.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns The PIC device instance.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Gets the address of the RC PIC helpers.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * This should be called at both construction and relocation time
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * to obtain the correct address of the RC helpers.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns RC pointer to the PIC helpers.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the PIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Gets the address of the R0 PIC helpers.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * This should be called at both construction and relocation time
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * to obtain the correct address of the R0 helpers.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns R0 pointer to the PIC helpers.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the PIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync /** Just a safety precaution. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync/** Pointer to PIC R3 helpers. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync/** Pointer to const PIC R3 helpers. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsynctypedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync/** Current PDMPICHLPR3 version number. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Advanced Programmable Interrupt Controller registration structure.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsynctypedef struct PDMAPICREG
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync /** Structure version number. PDM_APICREG_VERSION defines the current version. */
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Get a pending interrupt.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns Pending interrupt number.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param idCpu The VCPU Id.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param puTagSrc Where to return the tag source.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @remarks Caller enters the PDM critical section
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Check if the APIC has a pending interrupt/if a TPR change would active one
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns Pending interrupt yes/no
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param idCpu The VCPU Id.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @remarks Unlike the other callbacks, the PDM lock may not always be entered
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * prior to calling this method.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Set the APIC base.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param idCpu The VCPU Id.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u64Base The new base.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @remarks Caller enters the PDM critical section.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Get the APIC base.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns Current base.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param idCpu The VCPU Id.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @remarks Caller enters the PDM critical section.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Set the TPR (task priority register).
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param idCpu The VCPU id.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u8TPR The new TPR.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @remarks Caller enters the PDM critical section.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Get the TPR (task priority register).
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns The current TPR.
ad27e1d5e48ca41245120c331cc88b50464813cevboxsync * @param pDevIns Device instance of the APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param idCpu VCPU id
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @remarks Caller enters the PDM critical section.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Write to a MSR in APIC range.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns VBox status code.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param idCpu Target CPU.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u32Reg The MSR begin written to.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u64Value The value to write.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @remarks Unlike the other callbacks, the PDM lock is not taken before
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * calling this method.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Read from a MSR in APIC range.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns VBox status code.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param idCpu Target CPU.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u32Reg MSR to read.
ad27e1d5e48ca41245120c331cc88b50464813cevboxsync * @param pu64Value Where to return the read value.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @remarks Unlike the other callbacks, the PDM lock is not taken before
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * calling this method.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Private interface between the IOAPIC and APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * This is a low-level, APIC/IOAPIC implementation specific interface which
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * is registered with PDM only because it makes life so much simpler right
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * now (GC bits). This is a bad bad hack! The correct way of doing this
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * would involve some way of querying GC interfaces and relocating them.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * Perhaps doing some kind of device init in GC...
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @returns status code.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param pDevIns Device instance of the APIC.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u8Dest See APIC implementation.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u8DestMode See APIC implementation.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u8DeliveryMode See APIC implementation.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param iVector See APIC implementation.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u8Polarity See APIC implementation.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param u8TriggerMode See APIC implementation.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @param uTagSrc The IRQ tag and source (for tracing).
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @remarks Caller enters the PDM critical section
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
26645f447bb6a819f33492c84e03e364092ec600vboxsync uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
26645f447bb6a819f33492c84e03e364092ec600vboxsync * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
26645f447bb6a819f33492c84e03e364092ec600vboxsync * Used for virtual wire mode when interrupts from the PIC are passed through
26645f447bb6a819f33492c84e03e364092ec600vboxsync * @returns status code.
26645f447bb6a819f33492c84e03e364092ec600vboxsync * @param pDevIns Device instance of the APIC.
26645f447bb6a819f33492c84e03e364092ec600vboxsync * @param u8Pin Local pin number (0 or 1 for current CPUs).
26645f447bb6a819f33492c84e03e364092ec600vboxsync * @param u8Level The level.
26645f447bb6a819f33492c84e03e364092ec600vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
26645f447bb6a819f33492c84e03e364092ec600vboxsync * @remarks Caller enters the PDM critical section
26645f447bb6a819f33492c84e03e364092ec600vboxsync DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync /** The name of the RC GetInterrupt entry point. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync /** The name of the RC HasPendingIrq entry point. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync /** The name of the RC SetBase entry point. */
const char *pszSetBaseRC;
const char *pszGetBaseRC;
const char *pszSetTPRRC;
const char *pszGetTPRRC;
const char *pszWriteMSRRC;
const char *pszReadMSRRC;
const char *pszBusDeliverRC;
const char *pszLocalInterruptRC;
const char *pszGetInterruptR0;
const char *pszHasPendingIrqR0;
const char *pszSetBaseR0;
const char *pszGetBaseR0;
const char *pszSetTPRR0;
const char *pszGetTPRR0;
const char *pszWriteMSRR0;
const char *pszReadMSRR0;
const char *pszBusDeliverR0;
const char *pszLocalInterruptR0;
} PDMAPICREG;
typedef enum PDMAPICVERSION
typedef enum PDMAPICIRQ
PDMAPICIRQ_INVALID = 0,
} PDMAPICIRQ;
typedef struct PDMAPICHLPRC
DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
} PDMAPICHLPRC;
typedef struct PDMAPICHLPR0
DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
} PDMAPICHLPR0;
typedef struct PDMAPICHLPR3
DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
} PDMAPICHLPR3;
typedef struct PDMIOAPICREG
DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
const char *pszSetIrqRC;
const char *pszSetIrqR0;
DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
const char *pszSendMsiRC;
const char *pszSendMsiR0;
} PDMIOAPICREG;
typedef struct PDMIOAPICHLPRC
DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
typedef struct PDMIOAPICHLPR0
DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
typedef struct PDMIOAPICHLPR3
DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
typedef struct PDMHPETREG
} PDMHPETREG;
typedef struct PDMHPETHLPRC
} PDMHPETHLPRC;
typedef struct PDMHPETHLPR0
} PDMHPETHLPR0;
typedef struct PDMHPETHLPR3
} PDMHPETHLPR3;
typedef struct PDMPCIRAWREG
} PDMPCIRAWREG;
typedef struct PDMPCIRAWHLPRC
typedef struct PDMPCIRAWHLPR0
typedef struct PDMPCIRAWHLPR3
#ifdef IN_RING3
typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
typedef struct PDMDMAREG
* @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
} PDMDMACREG;
typedef struct PDMDMACHLP
} PDMDMACHLP;
typedef struct PDMRTCREG
} PDMRTCREG;
typedef struct PDMRTCHLP
} PDMRTCHLP;
#ifdef IN_RING3
typedef struct PDMDEVHLPR3
DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
* Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
* @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
* This is used by the macros found in VBox/vmm/dbgftrace.h and is not
DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
} PDMDEVHLPR3;
typedef struct PDMDEVHLPRC
DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
* This is used by the macros found in VBox/vmm/dbgftrace.h and is not
} PDMDEVHLPRC;
typedef struct PDMDEVHLPR0
DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
* This is used by the macros found in VBox/vmm/dbgftrace.h and is not
} PDMDEVHLPR0;
typedef struct PDMDEVINS
#ifdef PDMDEVINSINT_DECLARED
PDMDEVINSINT s;
} Internal;
} PDMDEVINS;
#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
return VERR_PDM_DEVINS_VERSION_MISMATCH; \
if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
return rcValCfg; \
#ifdef VBOX_STRICT
# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
#ifdef VBOX_STRICT
# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
#ifdef VBOX_STRICT
# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
return rc;
DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
int rc;
return rc;
#ifdef VBOX_STRICT
# ifdef IN_RING3
int rc;
return rc;
return VINF_EM_DBG_STOP;
return VINF_SUCCESS;
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
DECLINLINE(int) PDMDevHlpPCIDevPhysRead(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
#ifdef DEBUG
DECLINLINE(int) PDMDevHlpPCIDevPhysWrite(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
#ifdef DEBUG
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
int rc;
return rc;
DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
#ifdef IN_RING3
DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
#ifdef IN_RING0
typedef struct PDMDEVREGCB
} PDMDEVREGCB;