pdmdev.h revision 11923fc977be1686f5428c3e790c04d0701a074c
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync/** @file
11d3005e2935c925665896fa26fde09b3e656d70vboxsync * PDM - Pluggable Device Manager, Devices.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/*
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Copyright (C) 2006-2010 Oracle Corporation
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
cf5f6bf2704d4fff443139e10bccc6a0a7fa4b85vboxsync * available from http://www.virtualbox.org. This file is free software;
cf5f6bf2704d4fff443139e10bccc6a0a7fa4b85vboxsync * you can redistribute it and/or modify it under the terms of the GNU
cf5f6bf2704d4fff443139e10bccc6a0a7fa4b85vboxsync * General Public License (GPL) as published by the Free Software
cf5f6bf2704d4fff443139e10bccc6a0a7fa4b85vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
cf5f6bf2704d4fff443139e10bccc6a0a7fa4b85vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
cf5f6bf2704d4fff443139e10bccc6a0a7fa4b85vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
cf5f6bf2704d4fff443139e10bccc6a0a7fa4b85vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * The contents of this file may alternatively be used under the terms
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * of the Common Development and Distribution License Version 1.0
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync * VirtualBox OSE distribution, in which case the provisions of the
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync * CDDL are applicable instead of those of the GPL.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
43747b1f0bc8302a238fb35e55857a5e9aa1933dvboxsync * You may elect to license modified versions of this file under the
43747b1f0bc8302a238fb35e55857a5e9aa1933dvboxsync * terms and conditions of either the GPL or the CDDL or both.
43747b1f0bc8302a238fb35e55857a5e9aa1933dvboxsync */
43747b1f0bc8302a238fb35e55857a5e9aa1933dvboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#ifndef ___VBox_vmm_pdmdev_h
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define ___VBox_vmm_pdmdev_h
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/pdmqueue.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/pdmcritsect.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/pdmthread.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/pdmifs.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/pdmins.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/pdmcommon.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/iom.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/tm.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/ssm.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/cfgm.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/vmm/dbgf.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/err.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <VBox/pci.h>
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#include <iprt/stdarg.h>
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsyncRT_C_DECLS_BEGIN
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync/** @defgroup grp_pdm_device The PDM Devices API
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync * @ingroup grp_pdm
aef51041e0fe31e8ea903dd7e67fe12cef645654vboxsync * @{
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Construct a device instance for a VM.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
aef51041e0fe31e8ea903dd7e67fe12cef645654vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance data. If the registration structure
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * is needed, it can be accessed thru pDevIns->pReg.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iInstance Instance number. Use this to figure out which registers
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * and such to use. The instance number is also found in
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * pDevIns->iInstance, but since it's likely to be
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * frequently used PDM passes it as parameter.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pCfg Configuration node handle for the driver. This is
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * expected to be in high demand in the constructor and is
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * therefore passed as an argument. When using it at other
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * times, it can be found in pDrvIns->pCfg.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsynctypedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
79baed6836ae36c5f15b182292387484dcf7a752vboxsync/** Pointer to a FNPDMDEVCONSTRUCT() function. */
79baed6836ae36c5f15b182292387484dcf7a752vboxsynctypedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync/**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Destruct a device instance.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Most VM resources are freed by the VM. This callback is provided so that any non-VM
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * resources can be freed correctly.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @returns VBox status.
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync * @param pDevIns The device instance data.
aef51041e0fe31e8ea903dd7e67fe12cef645654vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVDESTRUCT() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync/**
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * Device relocation callback.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * This is called when the instance data has been relocated in raw-mode context
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * (RC). It is also called when the RC hypervisor selects changes. The device
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * must fixup all necessary pointers and re-query all interfaces to other RC
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync * devices and drivers.
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync *
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync * Before the RC code is executed the first time, this function will be called
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * with a 0 delta so RC pointer calculations can be one in one place.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Pointer to the device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param offDelta The relocation delta relative to the old location.
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @remark A relocation CANNOT fail.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVRELOCATE() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Device I/O Control interface.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This is used by external components, such as the COM interface, to
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * communicate with devices using a class wide interface or a device
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * specific interface.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Pointer to the device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param uFunction Function to perform.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvIn Pointer to input data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cbIn Size of input data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvOut Pointer to output data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cbOut Size of output data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pcbOut Where to store the actual size of the output data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync void *pvIn, RTUINT cbIn,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVIOCTL() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Power On notification.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVPOWERON() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Reset notification.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVRESET() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVRESET *PFNPDMDEVRESET;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Suspend notification.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT(0)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVSUSPEND() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Resume notification.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVRESUME() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Power Off notification.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This is only called when the VMR3PowerOff call is made on a running VM. This
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * means that there is no notification if the VM was suspended before being
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * powered of. There will also be no callback when hot plugging devices.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance data.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT(0)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVPOWEROFF() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Attach command.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This is called to let the device attach to a driver for a specified LUN
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * at runtime. This is not called during VM construction, the device
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * constructor have to attach to all the available drivers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * This is like plugging in the keyboard or mouse after turning on the PC.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * @returns VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * @param iLUN The logical unit which is being detached.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVATTACH() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * Detach notification.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This is called when a driver is detaching itself from a LUN of the device.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * The device should adjust it's state to reflect this.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This is like unplugging the network cable to use it for the laptop or
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * something while the PC is still running.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iLUN The logical unit which is being detached.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVDETACH() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Query the base interface of a logical unit.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBOX status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iLUN The logicial unit to query.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param ppBase Where to store the pointer to the base interface of the LUN.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Init complete notification.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This can be done to do communication with other devices and other
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * initialization which requires everything to be in place.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBOX status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
ad27e1d5e48ca41245120c331cc88b50464813cevboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * PDM Device Registration Structure.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This structure is used when registering a device from VBoxInitDevices() in HC
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Ring-3. PDM will continue use till the VM is terminated.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef struct PDMDEVREG
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync{
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Structure version. PDM_DEVREG_VERSION defines the current version. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t u32Version;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Device name. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync char szName[32];
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Name of the raw-mode context module (no path).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
ad27e1d5e48ca41245120c331cc88b50464813cevboxsync char szRCMod[32];
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Name of the ring-0 module (no path).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync char szR0Mod[32];
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** The description of the device. The UTF-8 string pointed to shall, like this structure,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * remain unchanged from registration till VM destruction. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync const char *pszDescription;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t fFlags;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t fClass;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Maximum number of instances (per VM). */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t cMaxInstances;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Size of the instance data. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t cbInstance;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Construct instance - required. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVCONSTRUCT pfnConstruct;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Destruct instance - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVDESTRUCT pfnDestruct;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Relocation command - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVRELOCATE pfnRelocate;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** I/O Control interface - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVIOCTL pfnIOCtl;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Power on notification - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVPOWERON pfnPowerOn;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Reset notification - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVRESET pfnReset;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Suspend notification - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVSUSPEND pfnSuspend;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Resume notification - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVRESUME pfnResume;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Attach command - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVATTACH pfnAttach;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Detach notification - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVDETACH pfnDetach;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Query a LUN base interface - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Init complete notification - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVINITCOMPLETE pfnInitComplete;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Power off notification - optional. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPDMDEVPOWEROFF pfnPowerOff;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** @todo */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNRT pfnSoftReset;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Initialization safty marker. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t u32VersionEnd;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync} PDMDEVREG;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a PDM Device Structure. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef PDMDEVREG *PPDMDEVREG;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Const pointer to a PDM Device Structure. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef PDMDEVREG const *PCPDMDEVREG;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Current DEVREG version number. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** PDM Device Flags.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @{ */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** This flag is used to indicate that the device has a RC component. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_RC 0x00000001
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** This flag is used to indicate that the device has a R0 component. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_R0 0x00000002
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * The bit count for the current host. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#if HC_ARCH_BITS == 32
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#elif HC_ARCH_BITS == 64
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#else
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync# error Unsupported HC_ARCH_BITS value.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#endif
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** The host bit count mask. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** The device support only 32-bit guests. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** The device support only 64-bit guests. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** The device support both 32-bit & 64-bit guests. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * The guest bit count for the current compilation. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#if GC_ARCH_BITS == 32
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#elif GC_ARCH_BITS == 64
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#else
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync# error Unsupported GC_ARCH_BITS value.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#endif
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** The guest bit count mask. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
58ab0ad45444e80bdd970ddeb468d0872dbbbb47vboxsync
11d3005e2935c925665896fa26fde09b3e656d70vboxsync/** A convenience. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
58ab0ad45444e80bdd970ddeb468d0872dbbbb47vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Indicates that the devices support PAE36 on a 32-bit guest. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_PAE36 0x00001000
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Indicates that the device needs to be notified before the drivers when suspending. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Indicates that the device needs to be notified before the drivers when powering off. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** @} */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** PDM Device Classes.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * The order is important, lower bit earlier instantiation.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @{ */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Architecture device. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Architecture BIOS device. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** PCI bus brigde. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** ISA bus brigde. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Input device (mouse, keyboard, joystick, HID, ...). */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Interrupt controller (PIC). */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Interval controoler (PIT). */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** RTC/CMOS. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** DMA controller. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** VMM Device. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Graphics device, like VGA. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Storage controller device. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Network interface controller. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
0440d9525af9b3ca795668ff408ac93ea6ca0249vboxsync/** Audio. */
0440d9525af9b3ca795668ff408ac93ea6ca0249vboxsync#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
0440d9525af9b3ca795668ff408ac93ea6ca0249vboxsync/** USB HIC. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** ACPI. */
58ab0ad45444e80bdd970ddeb468d0872dbbbb47vboxsync#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Serial controller device. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Parallel controller device */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Host PCI pass-through device */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
58ab0ad45444e80bdd970ddeb468d0872dbbbb47vboxsync/** Misc devices (always last). */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** @} */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** @name IRQ Level for use with the *SetIrq APIs.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @{
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Assert the IRQ (can assume value 1). */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Deassert the IRQ (can assume value 0). */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_IRQ_LEVEL_LOW 0
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** flip-flop - deassert and then assert the IRQ again immediately. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** @} */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Registration record for MSI.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef struct PDMMSIREG
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync{
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Number of MSI interrupt vectors, 0 if MSI not supported */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint16_t cMsiVectors;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Offset of MSI capability */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint8_t iMsiCapOffset;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Offset of next capability to MSI */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint8_t iMsiNextOffset;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** If we support 64-bit MSI addressing */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync bool fMsi64bit;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint16_t cMsixVectors;
58ab0ad45444e80bdd970ddeb468d0872dbbbb47vboxsync /** Offset of MSI-X capability */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint8_t iMsixCapOffset;
0440d9525af9b3ca795668ff408ac93ea6ca0249vboxsync /** Offset of next capability to MSI-X */
0440d9525af9b3ca795668ff408ac93ea6ca0249vboxsync uint8_t iMsixNextOffset;
0440d9525af9b3ca795668ff408ac93ea6ca0249vboxsync /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
0440d9525af9b3ca795668ff408ac93ea6ca0249vboxsync uint8_t iMsixBar;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync} PDMMSIREG;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef PDMMSIREG *PPDMMSIREG;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * PCI Bus registration structure.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef struct PDMPCIBUSREG
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync{
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t u32Version;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Registers the device with the default PCI bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the PCI Bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pPciDev The PCI device structure.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Any PCI enabled device must keep this in it's instance data!
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Fill in the PCI data config before registration, please.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * If negative, the pci bus device will assign one.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Initialize MSI support in a PCI device.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the PCI Bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pPciDev The PCI device structure.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pMsiReg MSI registration structure
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the PCI Bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pPciDev The PCI device structure.
11d3005e2935c925665896fa26fde09b3e656d70vboxsync * @param iRegion The region number.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cbRegion Size of the region.
11d3005e2935c925665896fa26fde09b3e656d70vboxsync * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnCallback Callback for doing the mapping.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Register PCI configuration space read/write callbacks.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the PCI Bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pPciDev The PCI device structure.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnRead Pointer to the user defined PCI config read function.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
befced03fd84a13590b8ce8be8c2480e9bc568c6vboxsync * PCI config read function. This way, user can decide when (and if)
befced03fd84a13590b8ce8be8c2480e9bc568c6vboxsync * to call default PCI config read function. Can be NULL.
befced03fd84a13590b8ce8be8c2480e9bc568c6vboxsync * @param pfnWrite Pointer to the user defined PCI config write function.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * PCI config write function. This way, user can decide when (and if)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * to call default PCI config write function. Can be NULL.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
befced03fd84a13590b8ce8be8c2480e9bc568c6vboxsync * Set the IRQ for a PCI device.
e6a3673a23c632af5208dcc8a37f45d7a20b0554vboxsync *
befced03fd84a13590b8ce8be8c2480e9bc568c6vboxsync * @param pDevIns Device instance of the PCI Bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pPciDev The PCI device structure.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * @param iIrq IRQ number to set.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync */
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync /**
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * Saves a state of the PCI device.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync *
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * @returns VBox status code.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * @param pDevIns Device instance of the PCI Bus.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * @param pPciDev Pointer to PCI device.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pSSMHandle The handle to save the state to.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
3d20ea012fb0f29408d877e71ba29d32b5677dc9vboxsync
3d20ea012fb0f29408d877e71ba29d32b5677dc9vboxsync /**
3d20ea012fb0f29408d877e71ba29d32b5677dc9vboxsync * Loads a saved PCI device state.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the PCI Bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pPciDev Pointer to PCI device.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pSSMHandle The handle to the saved state.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Called to perform the job of the bios.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This is only called for the first PCI Bus - it is expected to
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * service all the PCI buses.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
befced03fd84a13590b8ce8be8c2480e9bc568c6vboxsync * @param pDevIns Device instance of the first bus.
befced03fd84a13590b8ce8be8c2480e9bc568c6vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** The name of the SetIrq RC entry point. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync const char *pszSetIrqRC;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** The name of the SetIrq R0 entry point. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync const char *pszSetIrqR0;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync} PDMPCIBUSREG;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to a PCI bus registration structure. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef PDMPCIBUSREG *PPDMPCIBUSREG;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync/** Current PDMPCIBUSREG version number. */
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 2, 0)
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync/**
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync * PCI Bus RC helpers.
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync */
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsynctypedef struct PDMPCIHLPRC
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync{
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync uint32_t u32Version;
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync /**
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync * Set an ISA IRQ.
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync *
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync * @param pDevIns PCI device instance.
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync * @param iIrq IRQ number to set.
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync * @thread EMT only.
16d723d9d597f4872dd4c2c960af9cbca4ed63bdvboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Set an I/O-APIC IRQ.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pDevIns PCI device instance.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param iIrq IRQ number to set.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @thread EMT only.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Send an MSI.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pDevIns PCI device instance.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param GCAddr Physical address MSI request was written.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param uValue Value written.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @thread EMT only.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Acquires the PDM lock.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @returns VINF_SUCCESS on success.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @returns rc if we failed to acquire the lock.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pDevIns The PCI device instance.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param rc What to return if we fail to acquire the lock.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Releases the PDM lock.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pDevIns The PCI device instance.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /** Just a safety precaution. */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync uint32_t u32TheEnd;
79baed6836ae36c5f15b182292387484dcf7a752vboxsync} PDMPCIHLPRC;
79baed6836ae36c5f15b182292387484dcf7a752vboxsync/** Pointer to PCI helpers. */
79baed6836ae36c5f15b182292387484dcf7a752vboxsynctypedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
79baed6836ae36c5f15b182292387484dcf7a752vboxsync/** Pointer to const PCI helpers. */
79baed6836ae36c5f15b182292387484dcf7a752vboxsynctypedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync/** Current PDMPCIHLPRC version number. */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 2, 0)
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * PCI Bus R0 helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef struct PDMPCIHLPR0
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync{
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t u32Version;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
e3c7660d28e875017470cb35f5a0ef6eaf2965b0vboxsync * Set an ISA IRQ.
e3c7660d28e875017470cb35f5a0ef6eaf2965b0vboxsync *
e3c7660d28e875017470cb35f5a0ef6eaf2965b0vboxsync * @param pDevIns PCI device instance.
e3c7660d28e875017470cb35f5a0ef6eaf2965b0vboxsync * @param iIrq IRQ number to set.
e3c7660d28e875017470cb35f5a0ef6eaf2965b0vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
e3c7660d28e875017470cb35f5a0ef6eaf2965b0vboxsync * @thread EMT only.
e3c7660d28e875017470cb35f5a0ef6eaf2965b0vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
11d3005e2935c925665896fa26fde09b3e656d70vboxsync * Set an I/O-APIC IRQ.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns PCI device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iIrq IRQ number to set.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT only.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Send an MSI.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pDevIns PCI device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCAddr Physical address MSI request was written.
69c6eff4fcb6dc027e94a3e7908926c4e8ef5aefvboxsync * @param uValue Value written.
69c6eff4fcb6dc027e94a3e7908926c4e8ef5aefvboxsync * @thread EMT only.
69c6eff4fcb6dc027e94a3e7908926c4e8ef5aefvboxsync */
69c6eff4fcb6dc027e94a3e7908926c4e8ef5aefvboxsync DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
69c6eff4fcb6dc027e94a3e7908926c4e8ef5aefvboxsync
69c6eff4fcb6dc027e94a3e7908926c4e8ef5aefvboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Acquires the PDM lock.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @returns VINF_SUCCESS on success.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @returns rc if we failed to acquire the lock.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pDevIns The PCI device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param rc What to return if we fail to acquire the lock.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Releases the PDM lock.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pDevIns The PCI device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /** Just a safety precaution. */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync uint32_t u32TheEnd;
79baed6836ae36c5f15b182292387484dcf7a752vboxsync} PDMPCIHLPR0;
79baed6836ae36c5f15b182292387484dcf7a752vboxsync/** Pointer to PCI helpers. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
79baed6836ae36c5f15b182292387484dcf7a752vboxsync/** Pointer to const PCI helpers. */
79baed6836ae36c5f15b182292387484dcf7a752vboxsynctypedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync/** Current PDMPCIHLPR0 version number. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 2, 0)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync/**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * PCI device helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef struct PDMPCIHLPR3
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync{
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t u32Version;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Set an ISA IRQ.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The PCI device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iIrq IRQ number to set.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT only.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Set an I/O-APIC IRQ.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The PCI device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iIrq IRQ number to set.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT only.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
58461e707998a927c19da46b98748ee2b79f4190vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Send an MSI.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns PCI device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCAddr Physical address MSI request was written.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param uValue Value written.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT only.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Checks if the given address is an MMIO2 base address or not.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns true/false accordingly.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The PCI device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pOwner The owner of the memory, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCPhys The address to check.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Gets the address of the RC PCI Bus helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This should be called at both construction and relocation time
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * to obtain the correct address of the RC helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
11d3005e2935c925665896fa26fde09b3e656d70vboxsync * @returns RC pointer to the PCI Bus helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the PCI Bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT only.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Gets the address of the R0 PCI Bus helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This should be called at both construction and relocation time
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * to obtain the correct address of the R0 helpers.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @returns R0 pointer to the PCI Bus helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the PCI Bus.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT only.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Acquires the PDM lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VINF_SUCCESS on success.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns Fatal error on failure.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The PCI device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param rc Dummy for making the interface identical to the RC and R0 versions.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Releases the PDM lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The PCI device instance.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Just a safety precaution. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMPCIHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to PCI helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const PCI helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMPCIHLPR3 version number. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 2, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Programmable Interrupt Controller registration structure.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMPICREG
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Structure version number. PDM_PICREG_VERSION defines the current version. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t u32Version;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Set the an IRQ.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the PIC.
29e09f6b9a3b7489f54ed68a7198018d4c622c96vboxsync * @param iIrq IRQ number to set.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Get a pending interrupt.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns Pending interrupt number.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the PIC.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /** The name of the RC SetIrq entry point. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync const char *pszSetIrqRC;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /** The name of the RC GetInterrupt entry point. */
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync const char *pszGetInterruptRC;
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsync
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync /** The name of the R0 SetIrq entry point. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync const char *pszSetIrqR0;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /** The name of the R0 GetInterrupt entry point. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync const char *pszGetInterruptR0;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync} PDMPICREG;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/** Pointer to a PIC registration structure. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsynctypedef PDMPICREG *PPDMPICREG;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync/** Current PDMPICREG version number. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync/**
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsync * PIC RC helpers.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsynctypedef struct PDMPICHLPRC
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync{
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync uint32_t u32Version;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Set the interrupt force action flag.
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync *
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsync * @param pDevIns Device instance of the PIC.
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync * Clear the interrupt force action flag.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the PIC.
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync */
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsync DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Acquires the PDM lock.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns VINF_SUCCESS on success.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns rc if we failed to acquire the lock.
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync * @param pDevIns The PIC device instance.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param rc What to return if we fail to acquire the lock.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Releases the PDM lock.
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsync *
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync * @param pDevIns The PIC device instance.
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync */
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsync /** Just a safety precaution. */
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync uint32_t u32TheEnd;
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync} PDMPICHLPRC;
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsync
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync/** Pointer to PIC RC helpers. */
2b84e8395b8111251c409df711d4c1ec363d030bvboxsynctypedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/** Pointer to const PIC RC helpers. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsynctypedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/** Current PDMPICHLPRC version number. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * PIC R0 helpers.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsynctypedef struct PDMPICHLPR0
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync{
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync uint32_t u32Version;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Set the interrupt force action flag.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the PIC.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Clear the interrupt force action flag.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the PIC.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Acquires the PDM lock.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns VINF_SUCCESS on success.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns rc if we failed to acquire the lock.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns The PIC device instance.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param rc What to return if we fail to acquire the lock.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Releases the PDM lock.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns The PCI device instance.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /** Just a safety precaution. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync uint32_t u32TheEnd;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync} PDMPICHLPR0;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/** Pointer to PIC R0 helpers. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsynctypedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/** Pointer to const PIC R0 helpers. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsynctypedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/** Current PDMPICHLPR0 version number. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * PIC R3 helpers.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsynctypedef struct PDMPICHLPR3
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync{
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /** Structure version. PDM_PICHLP_VERSION defines the current version. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync uint32_t u32Version;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Set the interrupt force action flag.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the PIC.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Clear the interrupt force action flag.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the PIC.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Acquires the PDM lock.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns VINF_SUCCESS on success.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns Fatal error on failure.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns The PIC device instance.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param rc Dummy for making the interface identical to the RC and R0 versions.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Releases the PDM lock.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns The PIC device instance.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Gets the address of the RC PIC helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * This should be called at both construction and relocation time
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * to obtain the correct address of the RC helpers.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns RC pointer to the PIC helpers.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the PIC.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Gets the address of the R0 PIC helpers.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * This should be called at both construction and relocation time
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * to obtain the correct address of the R0 helpers.
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns R0 pointer to the PIC helpers.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the PIC.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsync
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync /** Just a safety precaution. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync uint32_t u32TheEnd;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync} PDMPICHLPR3;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync/** Pointer to PIC R3 helpers. */
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsynctypedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/** Pointer to const PIC R3 helpers. */
2b84e8395b8111251c409df711d4c1ec363d030bvboxsynctypedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/** Current PDMPICHLPR3 version number. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync/**
459b38316f81309fe908aa10e8abee332a6fdfd3vboxsync * Advanced Programmable Interrupt Controller registration structure.
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsynctypedef struct PDMAPICREG
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync{
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /** Structure version number. PDM_APICREG_VERSION defines the current version. */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync uint32_t u32Version;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Get a pending interrupt.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns Pending interrupt number.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the APIC.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Check if the APIC has a pending interrupt/if a TPR change would active one
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns Pending interrupt yes/no
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Set the APIC base.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u64Base The new base.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Get the APIC base.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns Current base.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Set the TPR (task priority register).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu VCPU id
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param u8TPR The new TPR.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Get the TPR (task priority register).
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns The current TPR.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu VCPU id
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
27152389a84c6dec057fba6fc21241991e079006vboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * Write MSR in APIC range.
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns VBox status code.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu Target CPU.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u32Reg MSR to write.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u64Value Value to write.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Read MSR in APIC range.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns VBox status code.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu Target CPU.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u32Reg MSR to read.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pu64Value Value read.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Private interface between the IOAPIC and APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This is a low-level, APIC/IOAPIC implementation specific interface
27152389a84c6dec057fba6fc21241991e079006vboxsync * which is registered with PDM only because it makes life so much
27152389a84c6dec057fba6fc21241991e079006vboxsync * simpler right now (GC bits). This is a bad bad hack! The correct
27152389a84c6dec057fba6fc21241991e079006vboxsync * way of doing this would involve some way of querying GC interfaces
27152389a84c6dec057fba6fc21241991e079006vboxsync * and relocating them. Perhaps doing some kind of device init in GC...
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns status code.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8Dest See APIC implementation.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param u8DestMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8DeliveryMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param iVector See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8Polarity See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8TriggerMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
27152389a84c6dec057fba6fc21241991e079006vboxsync uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
27152389a84c6dec057fba6fc21241991e079006vboxsync * virtual wire mode when interrupts from the PIC are passed through LAPIC.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8Pin Local pin number (0 or 1 for current CPUs).
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** The name of the RC GetInterrupt entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszGetInterruptRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the RC HasPendingIrq entry point. */
2b84e8395b8111251c409df711d4c1ec363d030bvboxsync const char *pszHasPendingIrqRC;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /** The name of the RC SetBase entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszSetBaseRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the RC GetBase entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszGetBaseRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the RC SetTPR entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszSetTPRRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the RC GetTPR entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszGetTPRRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the RC WriteMSR entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszWriteMSRRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the RC ReadMSR entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszReadMSRRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the RC BusDeliver entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszBusDeliverRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the RC LocalInterrupt entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszLocalInterruptRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 GetInterrupt entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszGetInterruptR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 HasPendingIrq entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszHasPendingIrqR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 SetBase entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszSetBaseR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 GetBase entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszGetBaseR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 SetTPR entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszSetTPRR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 GetTPR entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszGetTPRR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 WriteMSR entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszWriteMSRR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 ReadMSR entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszReadMSRR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 BusDeliver entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszBusDeliverR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 LocalInterrupt entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszLocalInterruptR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMAPICREG;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to an APIC registration structure. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef PDMAPICREG *PPDMAPICREG;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMAPICREG version number. */
27152389a84c6dec057fba6fc21241991e079006vboxsync#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * APIC version argument for pfnChangeFeature.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef enum PDMAPICVERSION
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Invalid 0 entry. */
27152389a84c6dec057fba6fc21241991e079006vboxsync PDMAPICVERSION_INVALID = 0,
27152389a84c6dec057fba6fc21241991e079006vboxsync /** No APIC. */
27152389a84c6dec057fba6fc21241991e079006vboxsync PDMAPICVERSION_NONE,
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
27152389a84c6dec057fba6fc21241991e079006vboxsync PDMAPICVERSION_APIC,
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
27152389a84c6dec057fba6fc21241991e079006vboxsync PDMAPICVERSION_X2APIC,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** The usual 32-bit paranoia. */
27152389a84c6dec057fba6fc21241991e079006vboxsync PDMAPICVERSION_32BIT_HACK = 0x7fffffff
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMAPICVERSION;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * APIC irq argument for SetInterruptFF.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsynctypedef enum PDMAPICIRQ
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Invalid 0 entry. */
27152389a84c6dec057fba6fc21241991e079006vboxsync PDMAPICIRQ_INVALID = 0,
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Normal hardware interrupt. */
27152389a84c6dec057fba6fc21241991e079006vboxsync PDMAPICIRQ_HARDWARE,
27152389a84c6dec057fba6fc21241991e079006vboxsync /** NMI. */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync PDMAPICIRQ_NMI,
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /** SMI. */
27152389a84c6dec057fba6fc21241991e079006vboxsync PDMAPICIRQ_SMI,
27152389a84c6dec057fba6fc21241991e079006vboxsync /** ExtINT (HW interrupt via PIC). */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PDMAPICIRQ_EXTINT,
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The usual 32-bit paranoia. */
27152389a84c6dec057fba6fc21241991e079006vboxsync PDMAPICIRQ_32BIT_HACK = 0x7fffffff
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMAPICIRQ;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * APIC RC helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMAPICHLPRC
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Set the interrupt force action flag.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param enmType IRQ type.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu Virtual CPU to set flag upon.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Clear the interrupt force action flag.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmType IRQ type.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu Virtual CPU to clear flag upon.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Modifies APIC-related bits in the CPUID feature mask.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param enmVersion Supported APIC version.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
29e09f6b9a3b7489f54ed68a7198018d4c622c96vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Acquires the PDM lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns VINF_SUCCESS on success.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns rc if we failed to acquire the lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The APIC device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param rc What to return if we fail to acquire the lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Releases the PDM lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Get the virtual CPU id corresponding to the current EMT.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Just a safety precaution. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMAPICHLPRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to APIC GC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const APIC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Current PDMAPICHLPRC version number. */
27152389a84c6dec057fba6fc21241991e079006vboxsync#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 1, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * APIC R0 helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef struct PDMAPICHLPR0
27152389a84c6dec057fba6fc21241991e079006vboxsync{
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Set the interrupt force action flag.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param enmType IRQ type.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu Virtual CPU to set flag upon.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
27152389a84c6dec057fba6fc21241991e079006vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Clear the interrupt force action flag.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param enmType IRQ type.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu Virtual CPU to clear flag upon.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Modifies APIC-related bits in the CPUID feature mask.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param enmVersion Supported APIC version.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Acquires the PDM lock.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns VINF_SUCCESS on success.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @returns rc if we failed to acquire the lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The APIC device instance.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param rc What to return if we fail to acquire the lock.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Releases the PDM lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Get the virtual CPU id corresponding to the current EMT.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Just a safety precaution. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMAPICHLPR0;
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync/** Pointer to APIC GC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/** Pointer to const APIC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMAPICHLPR0 version number. */
27152389a84c6dec057fba6fc21241991e079006vboxsync#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 1, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * APIC R3 helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef struct PDMAPICHLPR3
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Set the interrupt force action flag.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param enmType IRQ type.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param idCpu Virtual CPU to set flag upon.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Clear the interrupt force action flag.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the APIC.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmType IRQ type.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu Virtual CPU to clear flag upon.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Modifies APIC-related bits in the CPUID feature mask.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmVersion Supported APIC version.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Get the virtual CPU id corresponding to the current EMT.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
e66911cff9c18da76d9bddb0505ad329a9ccd795vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Sends SIPI to given virtual CPU.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu Virtual CPU to perform SIPI on
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param iVector SIPI vector
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Sends init IPI to given virtual CPU, should result in reset and
27152389a84c6dec057fba6fc21241991e079006vboxsync * halting till SIPI.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param idCpu Virtual CPU to perform SIPI on
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Gets the address of the RC APIC helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This should be called at both construction and relocation time
27152389a84c6dec057fba6fc21241991e079006vboxsync * to obtain the correct address of the RC helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns GC pointer to the APIC helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Gets the address of the R0 APIC helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * This should be called at both construction and relocation time
27152389a84c6dec057fba6fc21241991e079006vboxsync * to obtain the correct address of the R0 helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns R0 pointer to the APIC helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Get the critical section used to synchronize the PICs, PCI and stuff.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns Ring-3 pointer to the critical section.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync * Get the critical section used to synchronize the PICs, PCI and stuff.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns Raw-mode context pointer to the critical section.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Get the critical section used to synchronize the PICs, PCI and stuff.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns Ring-0 pointer to the critical section.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The APIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Just a safety precaution. */
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync uint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMAPICHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to APIC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const APIC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
c9a51cded51b8f691f24de730e190ef573344bfcvboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMAPICHLP version number. */
27152389a84c6dec057fba6fc21241991e079006vboxsync#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 1, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * I/O APIC registration structure.
c9a51cded51b8f691f24de730e190ef573344bfcvboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMIOAPICREG
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Set the an IRQ.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the I/O APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param iIrq IRQ number to set.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the GC SetIrq entry point. */
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync const char *pszSetIrqRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** The name of the R0 SetIrq entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszSetIrqR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Send a MSI.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the I/O APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param GCPhys Request address.
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync * @param uValue Request value.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
27152389a84c6dec057fba6fc21241991e079006vboxsync
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync /** The name of the GC SendMsi entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszSendMsiRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync /** The name of the R0 SendMsi entry point. */
27152389a84c6dec057fba6fc21241991e079006vboxsync const char *pszSendMsiR0;
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync} PDMIOAPICREG;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to an APIC registration structure. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef PDMIOAPICREG *PPDMIOAPICREG;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMAPICREG version number. */
27152389a84c6dec057fba6fc21241991e079006vboxsync#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 2, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * IOAPIC RC helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMIOAPICHLPRC
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Private interface between the IOAPIC and APIC.
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns status code.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the IOAPIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8Dest See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8DestMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8DeliveryMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param iVector See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8Polarity See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8TriggerMode See APIC implementation.
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
27152389a84c6dec057fba6fc21241991e079006vboxsync uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Acquires the PDM lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns VINF_SUCCESS on success.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns rc if we failed to acquire the lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The IOAPIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param rc What to return if we fail to acquire the lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Releases the PDM lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The IOAPIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Just a safety precaution. */
c9a51cded51b8f691f24de730e190ef573344bfcvboxsync uint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMIOAPICHLPRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to IOAPIC RC helpers. */
c9a51cded51b8f691f24de730e190ef573344bfcvboxsynctypedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const IOAPIC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMIOAPICHLPRC version number. */
27152389a84c6dec057fba6fc21241991e079006vboxsync#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * IOAPIC R0 helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMIOAPICHLPR0
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Private interface between the IOAPIC and APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns status code.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the IOAPIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8Dest See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8DestMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8DeliveryMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param iVector See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8Polarity See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8TriggerMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
5558d00238c7e019ef8c0803358fae6edeba394evboxsync uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
5558d00238c7e019ef8c0803358fae6edeba394evboxsync
5558d00238c7e019ef8c0803358fae6edeba394evboxsync /**
5558d00238c7e019ef8c0803358fae6edeba394evboxsync * Acquires the PDM lock.
5558d00238c7e019ef8c0803358fae6edeba394evboxsync *
5558d00238c7e019ef8c0803358fae6edeba394evboxsync * @returns VINF_SUCCESS on success.
5558d00238c7e019ef8c0803358fae6edeba394evboxsync * @returns rc if we failed to acquire the lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns The IOAPIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param rc What to return if we fail to acquire the lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
5558d00238c7e019ef8c0803358fae6edeba394evboxsync DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync /**
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * Releases the PDM lock.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pDevIns The IOAPIC device instance.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync */
09a18d0be605e90bdb7efe159b5f84afe2f69828vboxsync DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync /** Just a safety precaution. */
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync uint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMIOAPICHLPR0;
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync/** Pointer to IOAPIC R0 helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const IOAPIC helpers. */
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsynctypedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMIOAPICHLPR0 version number. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * IOAPIC R3 helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMIOAPICHLPR3
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t u32Version;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Private interface between the IOAPIC and APIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns status code
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the IOAPIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8Dest See APIC implementation.
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync * @param u8DestMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8DeliveryMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param iVector See APIC implementation.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param u8Polarity See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param u8TriggerMode See APIC implementation.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
27152389a84c6dec057fba6fc21241991e079006vboxsync uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Acquires the PDM lock.
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns VINF_SUCCESS on success.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns Fatal error on failure.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns The IOAPIC device instance.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param rc Dummy for making the interface identical to the GC and R0 versions.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
27152389a84c6dec057fba6fc21241991e079006vboxsync
895d68f6e6c15446ca98b8f6ec96ce19d7ea356fvboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Releases the PDM lock.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
c9a51cded51b8f691f24de730e190ef573344bfcvboxsync * @param pDevIns The IOAPIC device instance.
c9a51cded51b8f691f24de730e190ef573344bfcvboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
feef019e08ac3cead66d03feb9094cac75d9bc0dvboxsync
feef019e08ac3cead66d03feb9094cac75d9bc0dvboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Gets the address of the RC IOAPIC helpers.
feef019e08ac3cead66d03feb9094cac75d9bc0dvboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * This should be called at both construction and relocation time
feef019e08ac3cead66d03feb9094cac75d9bc0dvboxsync * to obtain the correct address of the RC helpers.
feef019e08ac3cead66d03feb9094cac75d9bc0dvboxsync *
feef019e08ac3cead66d03feb9094cac75d9bc0dvboxsync * @returns RC pointer to the IOAPIC helpers.
feef019e08ac3cead66d03feb9094cac75d9bc0dvboxsync * @param pDevIns Device instance of the IOAPIC.
feef019e08ac3cead66d03feb9094cac75d9bc0dvboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync /**
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync * Gets the address of the R0 IOAPIC helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
feef019e08ac3cead66d03feb9094cac75d9bc0dvboxsync * This should be called at both construction and relocation time
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * to obtain the correct address of the R0 helpers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns R0 pointer to the IOAPIC helpers.
f5b7890acb8ed84648facc56aa99ef3c6dbf90c7vboxsync * @param pDevIns Device instance of the IOAPIC.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Just a safety precaution. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32TheEnd;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync} PDMIOAPICHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to IOAPIC R3 helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const IOAPIC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMIOAPICHLPR3 version number. */
27152389a84c6dec057fba6fc21241991e079006vboxsync#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * HPET registration structure.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMHPETREG
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync{
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /** Struct version+magic number (PDM_HPETREG_VERSION). */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMHPETREG;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to an HPET registration structure. */
85e5ab5adbba74b522731762dd05ca88cb529140vboxsynctypedef PDMHPETREG *PPDMHPETREG;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMHPETREG version number. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * HPET RC helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @remarks Keep this around in case HPET will need PDM interaction in again RC
27152389a84c6dec057fba6fc21241991e079006vboxsync * at some later point.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMHPETHLPRC
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Just a safety precaution. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMHPETHLPRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to HPET RC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const HPET RC helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMHPETHLPRC version number. */
27152389a84c6dec057fba6fc21241991e079006vboxsync#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * HPET R0 helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @remarks Keep this around in case HPET will need PDM interaction in again R0
27152389a84c6dec057fba6fc21241991e079006vboxsync * at some later point.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMHPETHLPR0
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Just a safety precaution. */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync uint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMHPETHLPR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to HPET R0 helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const HPET R0 helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Current PDMHPETHLPR0 version number. */
27152389a84c6dec057fba6fc21241991e079006vboxsync#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * HPET R3 helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef struct PDMHPETHLPR3
27152389a84c6dec057fba6fc21241991e079006vboxsync{
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * Gets the address of the RC HPET helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * This should be called at both construction and relocation time
27152389a84c6dec057fba6fc21241991e079006vboxsync * to obtain the correct address of the RC helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns RC pointer to the HPET helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the HPET.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Gets the address of the R0 HPET helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * This should be called at both construction and relocation time
27152389a84c6dec057fba6fc21241991e079006vboxsync * to obtain the correct address of the R0 helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns R0 pointer to the HPET helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the HPET.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Set legacy mode on PIT and RTC.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns VINF_SUCCESS on success.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns rc if we failed to set legacy mode.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the HPET.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param fActivated Whether legacy mode is activated or deactivated.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * Set IRQ, bypassing ISA bus override rules.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * @returns VINF_SUCCESS on success.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns rc if we failed to set legacy mode.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the HPET.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param fActivate Activate or deactivate legacy mode.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync */
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /** Just a safety precaution. */
27152389a84c6dec057fba6fc21241991e079006vboxsync uint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMHPETHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to HPET R3 helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const HPET R3 helpers. */
5558d00238c7e019ef8c0803358fae6edeba394evboxsynctypedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
5558d00238c7e019ef8c0803358fae6edeba394evboxsync
5558d00238c7e019ef8c0803358fae6edeba394evboxsync/** Current PDMHPETHLPR3 version number. */
5558d00238c7e019ef8c0803358fae6edeba394evboxsync#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
5558d00238c7e019ef8c0803358fae6edeba394evboxsync
9821c67a0056dbb577486745d45cfd871f37d183vboxsynctypedef struct PDMPCIRAWREG
5558d00238c7e019ef8c0803358fae6edeba394evboxsync{
5558d00238c7e019ef8c0803358fae6edeba394evboxsync /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
5558d00238c7e019ef8c0803358fae6edeba394evboxsync uint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMPCIRAWREG;
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to a raw PCI registration structure. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef PDMPCIRAWREG *PPDMPCIRAWREG;
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync/** Current PDMPCIRAWREG version number. */
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsyncstruct PDMPCIRAWHLPRC
09a18d0be605e90bdb7efe159b5f84afe2f69828vboxsync{
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync uint32_t u32Version;
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync /** Just a safety precaution. */
09a18d0be605e90bdb7efe159b5f84afe2f69828vboxsync uint32_t u32TheEnd;
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync};
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsynctypedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsynctypedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsyncstruct PDMPCIRAWHLPR0
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync{
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsyncuint32_t u32Version;
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync/** Just a safety precaution. */
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsyncuint32_t u32TheEnd;
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync};
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsynctypedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsynctypedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync
8947eff3d23efd8b5f3b1735d3b934ce76904df9vboxsync
09a18d0be605e90bdb7efe159b5f84afe2f69828vboxsynctypedef struct PDMPCIRAWHLPR3
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync{
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsyncuint32_t u32Version;
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync* Gets the address of the RC PCI raw helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync*
27152389a84c6dec057fba6fc21241991e079006vboxsync* This should be called at both construction and relocation time
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync* to obtain the correct address of the RC helpers.
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsync*
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsync* @returns RC pointer to the PCI raw helpers.
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsync* @param pDevIns Device instance of the raw PCI device.
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsync*/
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsyncDECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsync
d4ac79d5b584e3571b550ba044f186da563445d9vboxsync/**
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsync* Gets the address of the R0 PCI raw helpers.
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsync*
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsync* This should be called at both construction and relocation time
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsync* to obtain the correct address of the R0 helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync*
27152389a84c6dec057fba6fc21241991e079006vboxsync* @returns R0 pointer to the PCI raw helpers.
27152389a84c6dec057fba6fc21241991e079006vboxsync* @param pDevIns Device instance of the raw PCI device.
27152389a84c6dec057fba6fc21241991e079006vboxsync*/
27152389a84c6dec057fba6fc21241991e079006vboxsyncDECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Just a safety precaution. */
27152389a84c6dec057fba6fc21241991e079006vboxsyncuint32_t u32TheEnd;
27152389a84c6dec057fba6fc21241991e079006vboxsync} PDMPCIRAWHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to raw PCI R3 helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
27152389a84c6dec057fba6fc21241991e079006vboxsync/** Pointer to const raw PCI R3 helpers. */
27152389a84c6dec057fba6fc21241991e079006vboxsynctypedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync/** Current PDMPCIRAWHLPRC version number. */
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync/** Current PDMPCIRAWHLPR0 version number. */
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync/** Current PDMPCIRAWHLPR3 version number. */
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xfff2, 1, 0)
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync#ifdef IN_RING3
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync/**
27152389a84c6dec057fba6fc21241991e079006vboxsync * DMA Transfer Handler.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync * @returns Number of bytes transferred.
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync * @param pDevIns Device instance of the DMA.
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync * @param pvUser User pointer.
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync * @param uChannel Channel number.
8976d66efc882b97785822fb26ac488dba6d71e6vboxsync * @param off DMA position.
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync * @param cb Block size.
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync */
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsynctypedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync/** Pointer to a FNDMATRANSFERHANDLER(). */
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsynctypedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync/**
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync * DMA Controller registration structure.
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync */
1fb6eee38911d0dac0cec5cbcec2702628a42b95vboxsynctypedef struct PDMDMAREG
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync{
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync uint32_t u32Version;
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync
9ad97ffb68ce694c73137eae82e8a071ab9d9aa2vboxsync /**
9ad97ffb68ce694c73137eae82e8a071ab9d9aa2vboxsync * Execute pending transfers.
9ad97ffb68ce694c73137eae82e8a071ab9d9aa2vboxsync *
9ad97ffb68ce694c73137eae82e8a071ab9d9aa2vboxsync * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
9ad97ffb68ce694c73137eae82e8a071ab9d9aa2vboxsync * @param pDevIns Device instance of the DMAC.
45afcc40bbf641d3dc10d85acbdf48b67b46aed4vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Register transfer function for DMA channel.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the DMAC.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param uChannel Channel number.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnTransferHandler Device specific transfer function.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pvUSer User pointer to be passed to the callback.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Read memory
27152389a84c6dec057fba6fc21241991e079006vboxsync *
27152389a84c6dec057fba6fc21241991e079006vboxsync * @returns Number of bytes read.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pDevIns Device instance of the DMAC.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param pvBuffer Pointer to target buffer.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param off DMA position.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param cbBlock Block size.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Write memory
27152389a84c6dec057fba6fc21241991e079006vboxsync *
648e22edef0d6e2e0573a96fc77b09003675f6a4vboxsync * @returns Number of bytes written.
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * @param pDevIns Device instance of the DMAC.
648e22edef0d6e2e0573a96fc77b09003675f6a4vboxsync * @param pvBuffer Memory to write.
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync * @param off DMA position.
27152389a84c6dec057fba6fc21241991e079006vboxsync * @param cbBlock Block size.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
27152389a84c6dec057fba6fc21241991e079006vboxsync
27152389a84c6dec057fba6fc21241991e079006vboxsync /**
27152389a84c6dec057fba6fc21241991e079006vboxsync * Set the DREQ line.
27152389a84c6dec057fba6fc21241991e079006vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the DMAC.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param uChannel Channel number.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param uLevel Level of the line.
27152389a84c6dec057fba6fc21241991e079006vboxsync */
27152389a84c6dec057fba6fc21241991e079006vboxsync DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync /**
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync * Get channel mode
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync *
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync * @returns Channel mode.
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync * @param pDevIns Device instance of the DMAC.
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync * @param uChannel Channel number.
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync */
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2f0e6b8d79026c7efad10a34945eb120097d7f54vboxsync
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync} PDMDMACREG;
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync/** Pointer to a DMAC registration structure. */
333691af03965f6009137429427d69047046e5cbvboxsynctypedef PDMDMACREG *PPDMDMACREG;
d16692c6ba83a5fa6bb4dd44652002a64e2bf70avboxsync
333691af03965f6009137429427d69047046e5cbvboxsync/** Current PDMDMACREG version number. */
333691af03965f6009137429427d69047046e5cbvboxsync#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
333691af03965f6009137429427d69047046e5cbvboxsync
d16692c6ba83a5fa6bb4dd44652002a64e2bf70avboxsync
333691af03965f6009137429427d69047046e5cbvboxsync/**
333691af03965f6009137429427d69047046e5cbvboxsync * DMA Controller device helpers.
333691af03965f6009137429427d69047046e5cbvboxsync */
333691af03965f6009137429427d69047046e5cbvboxsynctypedef struct PDMDMACHLP
333691af03965f6009137429427d69047046e5cbvboxsync{
333691af03965f6009137429427d69047046e5cbvboxsync /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
333691af03965f6009137429427d69047046e5cbvboxsync uint32_t u32Version;
333691af03965f6009137429427d69047046e5cbvboxsync
d16692c6ba83a5fa6bb4dd44652002a64e2bf70avboxsync /* to-be-defined */
d16692c6ba83a5fa6bb4dd44652002a64e2bf70avboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync} PDMDMACHLP;
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync/** Pointer to DMAC helpers. */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsynctypedef PDMDMACHLP *PPDMDMACHLP;
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync/** Pointer to const DMAC helpers. */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsynctypedef const PDMDMACHLP *PCPDMDMACHLP;
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync/** Current PDMDMACHLP version number. */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync#endif /* IN_RING3 */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync/**
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * RTC registration structure.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsynctypedef struct PDMRTCREG
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync{
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync uint32_t u32Version;
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync uint32_t u32Alignment; /**< structure size alignment. */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync /**
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * Write to a CMOS register and update the checksum if necessary.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync *
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @returns VBox status code.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @param pDevIns Device instance of the RTC.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @param iReg The CMOS register index.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @param u8Value The CMOS register value.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync /**
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * Read a CMOS register.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync *
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @returns VBox status code.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @param pDevIns Device instance of the RTC.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @param iReg The CMOS register index.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @param pu8Value Where to store the CMOS register value.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync} PDMRTCREG;
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync/** Pointer to a RTC registration structure. */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsynctypedef PDMRTCREG *PPDMRTCREG;
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync/** Pointer to a const RTC registration structure. */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsynctypedef const PDMRTCREG *PCPDMRTCREG;
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync/** Current PDMRTCREG version number. */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync/**
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * RTC device helpers.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsynctypedef struct PDMRTCHLP
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync{
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
359416647a711739d1b14addbf399178949a1a60vboxsync uint32_t u32Version;
359416647a711739d1b14addbf399178949a1a60vboxsync
359416647a711739d1b14addbf399178949a1a60vboxsync /* to-be-defined */
359416647a711739d1b14addbf399178949a1a60vboxsync
359416647a711739d1b14addbf399178949a1a60vboxsync} PDMRTCHLP;
359416647a711739d1b14addbf399178949a1a60vboxsync/** Pointer to RTC helpers. */
359416647a711739d1b14addbf399178949a1a60vboxsynctypedef PDMRTCHLP *PPDMRTCHLP;
359416647a711739d1b14addbf399178949a1a60vboxsync/** Pointer to const RTC helpers. */
359416647a711739d1b14addbf399178949a1a60vboxsynctypedef const PDMRTCHLP *PCPDMRTCHLP;
359416647a711739d1b14addbf399178949a1a60vboxsync
359416647a711739d1b14addbf399178949a1a60vboxsync/** Current PDMRTCHLP version number. */
359416647a711739d1b14addbf399178949a1a60vboxsync#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
359416647a711739d1b14addbf399178949a1a60vboxsync
359416647a711739d1b14addbf399178949a1a60vboxsync
359416647a711739d1b14addbf399178949a1a60vboxsync
359416647a711739d1b14addbf399178949a1a60vboxsync#ifdef IN_RING3
359416647a711739d1b14addbf399178949a1a60vboxsync
d16692c6ba83a5fa6bb4dd44652002a64e2bf70avboxsync/**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * PDM Device API.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsynctypedef struct PDMDEVHLPR3
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync{
6370aaf3748669b056c6ede9b64ff5f837a17820vboxsync /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
6370aaf3748669b056c6ede9b64ff5f837a17820vboxsync uint32_t u32Version;
6370aaf3748669b056c6ede9b64ff5f837a17820vboxsync
6370aaf3748669b056c6ede9b64ff5f837a17820vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Register a number of I/O ports with a device.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * These callbacks are of course for the host context (HC).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Register HC handlers before guest context (GC) handlers! There must be a
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * HC handler for every GC handler!
e50527359fb17a5127ef6291e691c8f09d726157vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
ed92a11f76c2c5e4a9a7cf51a376d0ddb5443bb4vboxsync * @param pDevIns The device instance to register the ports with.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param Port First port number in the range.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cPorts Number of ports to register.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvUser User argument.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnOut Pointer to function which is gonna handle OUT operations.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnIn Pointer to function which is gonna handle IN operations.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Pointer to description string. This must not be freed.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Register a number of I/O ports with a device for RC.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * These callbacks are for the raw-mode context (RC). Register ring-3 context
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * for every RC handler!
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @returns VBox status.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param pDevIns The device instance to register the ports with
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * and which RC module to resolve the names
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * against.
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * @param Port First port number in the range.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param cPorts Number of ports to register.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param pvUser User argument.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param pszOut Name of the RC function which is gonna handle OUT operations.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param pszIn Name of the RC function which is gonna handle IN operations.
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param pszInStr Name of the RC function which is gonna handle string IN operations.
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * @param pszDesc Pointer to description string. This must not be freed.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync */
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync const char *pszOut, const char *pszIn,
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync const char *pszOutStr, const char *pszInStr, const char *pszDesc));
ad290511521ce8388a9926b165241ecf83c330a7vboxsync
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync /**
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * Register a number of I/O ports with a device.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync *
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * These callbacks are of course for the ring-0 host context (R0).
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync *
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @returns VBox status.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param pDevIns The device instance to register the ports with.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param Port First port number in the range.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param cPorts Number of ports to register.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param pvUser User argument. (if pointer, then it must be in locked memory!)
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * @param pszOut Name of the R0 function which is gonna handle OUT operations.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param pszIn Name of the R0 function which is gonna handle IN operations.
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
e50527359fb17a5127ef6291e691c8f09d726157vboxsync * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
e68a2ad82506ee1197ef0a520d7ffebca1e33a0cvboxsync * @param pszDesc Pointer to description string. This must not be freed.
4d6b317d67ba577744e53cdfa0c7472d4223db5avboxsync */
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync const char *pszOut, const char *pszIn,
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync const char *pszOutStr, const char *pszInStr, const char *pszDesc));
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync /**
4d6b317d67ba577744e53cdfa0c7472d4223db5avboxsync * Deregister I/O ports.
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync *
4d6b317d67ba577744e53cdfa0c7472d4223db5avboxsync * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
4d6b317d67ba577744e53cdfa0c7472d4223db5avboxsync *
4d6b317d67ba577744e53cdfa0c7472d4223db5avboxsync * @returns VBox status.
e68a2ad82506ee1197ef0a520d7ffebca1e33a0cvboxsync * @param pDevIns The device instance owning the ports.
4d6b317d67ba577744e53cdfa0c7472d4223db5avboxsync * @param Port First port number in the range.
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync * @param cPorts Number of ports to deregister.
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync */
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync /**
4d6b317d67ba577744e53cdfa0c7472d4223db5avboxsync * Register a Memory Mapped I/O (MMIO) region.
dee9595a04fb1bd1908a48bd602fa1ed0b6967f9vboxsync *
e68a2ad82506ee1197ef0a520d7ffebca1e33a0cvboxsync * These callbacks are of course for the ring-3 context (R3). Register HC
e68a2ad82506ee1197ef0a520d7ffebca1e33a0cvboxsync * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4d6b317d67ba577744e53cdfa0c7472d4223db5avboxsync * must be a R3 handler for every RC and R0 handler!
e68a2ad82506ee1197ef0a520d7ffebca1e33a0cvboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance to register the MMIO with.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCPhysStart First physical address in the range.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cbRange The size of the range (in bytes).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvUser User argument.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnWrite Pointer to function which is gonna handle Write operations.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnRead Pointer to function which is gonna handle Read operations.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Pointer to description string. This must not be freed.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync const char *pszDesc));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Register a Memory Mapped I/O (MMIO) region for GC.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * These callbacks are for the raw-mode context (RC). Register ring-3 context
ad27e1d5e48ca41245120c331cc88b50464813cevboxsync * (R3) handlers before guest context handlers! There must be a R3 handler for
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * every RC handler!
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @returns VBox status.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pDevIns The device instance to register the MMIO with.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param GCPhysStart First physical address in the range.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param cbRange The size of the range (in bytes).
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pvUser User argument.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pszWrite Name of the RC function which is gonna handle Write operations.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pszRead Name of the RC function which is gonna handle Read operations.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pszDesc Obsolete. NULL is fine.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync const char *pszWrite, const char *pszRead, const char *pszFill,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync const char *pszDesc));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Register a Memory Mapped I/O (MMIO) region for R0.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * These callbacks are for the ring-0 host context (R0). Register ring-3
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * every R0 handler!
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance to register the MMIO with.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCPhysStart First physical address in the range.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cbRange The size of the range (in bytes).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszWrite Name of the RC function which is gonna handle Write operations.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszRead Name of the RC function which is gonna handle Read operations.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Obsolete. NULL is fine.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync const char *pszWrite, const char *pszRead, const char *pszFill,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync const char *pszDesc));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Deregister a Memory Mapped I/O (MMIO) region.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance owning the MMIO region(s).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCPhysStart First physical address in the range.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cbRange The size of the range (in bytes).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
648e22edef0d6e2e0573a96fc77b09003675f6a4vboxsync DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync /**
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * Allocate and register a MMIO2 region.
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync *
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * RAM associated with a device. It is also non-shared memory with a
648e22edef0d6e2e0573a96fc77b09003675f6a4vboxsync * permanent ring-3 mapping and page backing (presently).
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iRegion The region number. Use the PCI region number as
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * this must be known to the PCI bus device too. If
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * it's not associated with the PCI device, then
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * any number up to UINT8_MAX is fine.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cb The size (in bytes) of the region.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param fFlags Reserved for future use, must be zero.
11d3005e2935c925665896fa26fde09b3e656d70vboxsync * @param ppv Where to store the address of the ring-3 mapping
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * of the memory.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Pointer to description string. This must not be
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * freed.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync */
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Deregisters and frees a MMIO2 region.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Any physical (and virtual) access handlers registered for the region must
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * be deregistered before calling this function.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iRegion The region number used during registration.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Maps a MMIO2 region into the physical memory space.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * A MMIO2 range may overlap with base memory if a lot of RAM
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * is configured for the VM, in which case we'll drop the base
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * memory pages. Presently we will make no attempt to preserve
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * anything that happens to be present in the base memory that
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * is replaced, this is of course incorrectly but it's too much
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * effort.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iRegion The region number used during registration.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCPhys The physical address to map it at.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iRegion The region number used during registration.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCPhys The physical address it's currently mapped at.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread EMT.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
648e22edef0d6e2e0573a96fc77b09003675f6a4vboxsync /**
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * Maps a portion of an MMIO2 region into the hypervisor region.
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync *
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * Callers of this API must never deregister the MMIO2 region before the
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * VM is powered off.
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync *
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * @return VBox status code.
648e22edef0d6e2e0573a96fc77b09003675f6a4vboxsync * @param pDevIns The device owning the MMIO2 memory.
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * @param iRegion The region.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param off The offset into the region. Will be rounded down
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * to closest page boundary.
bdbed0b8e7fb553d01417fdc976a76f3b287dbe2vboxsync * @param cb The number of bytes to map. Will be rounded up
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * to the closest page boundary.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Mapping description.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pRCPtr Where to store the RC address.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
648e22edef0d6e2e0573a96fc77b09003675f6a4vboxsync DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync const char *pszDesc, PRTRCPTR pRCPtr));
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync /**
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * Maps a portion of an MMIO2 region into kernel space (host).
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync *
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync * The kernel mapping will become invalid when the MMIO2 memory is deregistered
648e22edef0d6e2e0573a96fc77b09003675f6a4vboxsync * or the VM is terminated.
47b6f2e161ff99e6ab1b4f6090798276954b4a78vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @return VBox status code.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device owning the MMIO2 memory.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param iRegion The region.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param off The offset into the region. Must be page
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * aligned.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cb The number of bytes to map. Must be page
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * aligned.
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * @param pszDesc Mapping description.
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * @param pR0Ptr Where to store the R0 address.
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync */
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync const char *pszDesc, PRTR0PTR pR0Ptr));
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync /**
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * Register a ROM (BIOS) region.
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync *
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * It goes without saying that this is read-only memory. The memory region must be
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * in unassigned memory. I.e. from the top of the address space or on the PC in
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * the 0xa0000-0xfffff range.
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync *
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * @returns VBox status.
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * @param pDevIns The device instance owning the ROM region.
bd88a03fe4f970611c171f081be318fcd74e85e8vboxsync * @param GCPhysStart First physical address in the range.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Must be page aligned!
58461e707998a927c19da46b98748ee2b79f4190vboxsync * @param cbRange The size of the range (in bytes).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Must be page aligned!
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvBinary Pointer to the binary data backing the ROM image.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cbBinary The size of the binary pointer. This must
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * be equal or smaller than @a cbRange.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Pointer to description string. This must not be freed.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @remark There is no way to remove the rom, automatically on device cleanup or
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * manually from the device yet. At present I doubt we need such features...
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange,
e6b70a63c722fdf132fdf96257aa00a1e0e37e3dvboxsync const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
e6b70a63c722fdf132fdf96257aa00a1e0e37e3dvboxsync
e6b70a63c722fdf132fdf96257aa00a1e0e37e3dvboxsync /**
e6b70a63c722fdf132fdf96257aa00a1e0e37e3dvboxsync * Changes the protection of shadowed ROM mapping.
e6b70a63c722fdf132fdf96257aa00a1e0e37e3dvboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This is intented for use by the system BIOS, chipset or device in question to
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * change the protection of shadowed ROM code after init and on reset.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCPhysStart Where the mapping starts.
e8d309b9da17d55dbaf8de632612470b4f16d926vboxsync * @param cbRange The size of the mapping.
e8d309b9da17d55dbaf8de632612470b4f16d926vboxsync * @param enmProt The new protection type.
e8d309b9da17d55dbaf8de632612470b4f16d926vboxsync */
178b942cb42a13f3bca0f99a1bca1311ae190ffdvboxsync DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Register a save state data unit.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszName Data unit name.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param uInstance The instance identifier of the data unit.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * This must together with the name be unique.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param uVersion Data layout version number.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cbGuess The approximate amount of data in the unit.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Only for progress indicators.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszBefore Name of data unit which we should be put in
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * front of. Optional (NULL).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnLivePrep Prepare live save callback, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnLiveExec Execute live save callback, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnLiveVote Vote live save callback, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnSavePrep Prepare save callback, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnSaveExec Execute save callback, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnSaveDone Done save callback, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnLoadPrep Prepare load callback, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnLoadExec Execute load callback, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnLoadDone Done load callback, optional.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Creates a timer.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmClock The clock to use on this timer.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pfnCallback Callback function.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvUser User argument for the callback.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param fFlags Flags, see TMTIMER_FLAGS_*.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Pointer to description string which must stay around
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param ppTimer Where to store the timer on success.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync *
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @returns pTime.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pDevIns The device instance.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync * @param pTime Where to store the time.
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync */
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync
ccbb9941eeafd9ec56b8ed048910198240e6caaavboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Read physical memory.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VINF_SUCCESS (for now).
e068057c82b010bc7cc663e8f57ac3ef1890a33cvboxsync * @param pDevIns The device instance.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * @param GCPhys Physical address start reading from.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * @param pvBuf Where to put the read bits.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * @param cbRead How many bytes to read.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * @thread Any thread, but the call may involve the emulation thread.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync */
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync /**
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * Write to physical memory.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pDevIns The device instance.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * @param GCPhys Physical address to write to.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * @param pvBuf What to write.
85e5ab5adbba74b522731762dd05ca88cb529140vboxsync * @param cbWrite How many bytes to write.
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync * @thread Any thread, but the call may involve the emulation thread.
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync */
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync /**
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync * Requests the mapping of a guest page into ring-3.
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync *
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync * release it.
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync *
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync * This API will assume your intention is to write to the page, and will
e637cb22e348f5665d5473dae55ed785aa7b6e9avboxsync * therefore replace shared and zero pages. If you do not intend to modify the
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @returns VBox status code.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @retval VINF_SUCCESS on success.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * backing or if the page has any active access handlers. The caller
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * must fall back on using PGMR3PhysWriteExternal.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pVM The VM handle.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param GCPhys The guest physical address of the page that
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * should be mapped.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param fFlags Flags reserved for future use, MBZ.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param ppv Where to store the address corresponding to
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * GCPhys.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pLock Where to store the lock information that
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * pfnPhysReleasePageMappingLock needs.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @remark Avoid calling this API from within critical sections (other than the
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * PGM one) because of the deadlock risk when we have to delegating the
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * task to an EMT.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @thread Any.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync */
92d84c75b62dc832264bed9dfdb1cf00d7988078vboxsync DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
92d84c75b62dc832264bed9dfdb1cf00d7988078vboxsync
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync /**
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * Requests the mapping of a guest page into ring-3, external threads.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * release it.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @returns VBox status code.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @retval VINF_SUCCESS on success.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * backing or if the page as an active ALL access handler. The caller
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * must fall back on using PGMPhysRead.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync *
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pDevIns The device instance.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param GCPhys The guest physical address of the page that
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * should be mapped.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param fFlags Flags reserved for future use, MBZ.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param ppv Where to store the address corresponding to
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * GCPhys.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pLock Where to store the lock information that
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * pfnPhysReleasePageMappingLock needs.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync *
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @remark Avoid calling this API from within critical sections.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @thread Any.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync */
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync /**
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * Release the mapping of a guest page.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync *
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * This is the counter part of pfnPhysGCPhys2CCPtr and
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * pfnPhysGCPhys2CCPtrReadOnly.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync *
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pDevIns The device instance.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pLock The lock structure initialized by the mapping
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * function.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync */
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync /**
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * Read guest physical memory by virtual address.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvDst Where to put the read bits.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param GCVirtSrc Guest virtual address to start reading from.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cb How many bytes to read.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread The emulation thread.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * Write to guest physical memory by virtual address.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync *
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param pDevIns The device instance.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param GCVirtDst Guest virtual address to write to.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param pvSrc What to write.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param cb How many bytes to write.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @thread The emulation thread.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync */
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync /**
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * Convert a guest virtual address to a guest physical address.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync *
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @returns VBox status code.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param pDevIns The device instance.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param GCPtr Guest virtual address.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param pGCPhys Where to store the GC physical address
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * corresponding to GCPtr.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread The emulation thread.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @remark Careful with page boundaries.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Allocate memory which is associated with current VM instance
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * and automatically freed on it's destruction.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync * @param pDevIns The device instance.
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync * @param cb Number of bytes to allocate.
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync */
64e889d83afc98d310a0c40fb458d23733b73b03vboxsync DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
64e889d83afc98d310a0c40fb458d23733b73b03vboxsync
64e889d83afc98d310a0c40fb458d23733b73b03vboxsync /**
64e889d83afc98d310a0c40fb458d23733b73b03vboxsync * Allocate memory which is associated with current VM instance
64e889d83afc98d310a0c40fb458d23733b73b03vboxsync * and automatically freed on it's destruction. The memory is ZEROed.
64e889d83afc98d310a0c40fb458d23733b73b03vboxsync *
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param cb Number of bytes to allocate.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pv Pointer to the memory to free.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Gets the VM state.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VM state.
ce9015004a47e95eb75e047ba42f2d3200d2d222vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread Any thread (just keep in mind that it's volatile info).
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Checks if the VM was teleported and hasn't been fully resumed yet.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns true / false.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns The device instance.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @thread Any thread.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync /**
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * Set the VM error message
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @returns rc.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param pDevIns The device instance.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param rc VBox status code.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param RT_SRC_POS_DECL Use RT_SRC_POS.
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * @param pszFormat Error message format string.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param ... Error message arguments.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Set the VM error message
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @returns rc.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pDevIns The device instance.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param rc VBox status code.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param RT_SRC_POS_DECL Use RT_SRC_POS.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pszFormat Error message format string.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param va Error message arguments.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync */
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync /**
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * Set the VM runtime error message
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @returns VBox status code.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pDevIns The device instance.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pszErrorId Error ID string.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pszFormat Error message format string.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param ... Error message arguments.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync */
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync /**
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * Set the VM runtime error message
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @returns VBox status code.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pDevIns The device instance.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pszErrorId Error ID string.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pszFormat Error message format string.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param va Error message arguments.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync */
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync /**
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * Stops the VM and enters the debugger to look at the guest state.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * invoking this function directly.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @returns VBox status code which must be passed up to the VMM.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pDevIns The device instance.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pszFile Filename of the assertion location.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param iLine The linenumber of the assertion location.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync * @param pszFunction Function of the assertion location.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pszFormat Message. (optional)
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param args Message parameters.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync */
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync /**
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * Register a info handler with DBGF,
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync *
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @returns VBox status code.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pDevIns The device instance.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pszName The identifier of the info.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pszDesc The description of the info and any arguments
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * the handler may take.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pfnHandler The handler function to be called to display the
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * info.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync */
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync /**
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * Registers a statistics sample if statistics are enabled.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync *
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pDevIns Device instance of the DMA.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param pvSample Pointer to the sample.
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @param enmType Sample type. This indicates what pvSample is
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * pointing at.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszName Sample name. The name is on this form
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * "/<component>/<sample>". Further nesting is
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * possible.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmUnit Sample unit.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Sample description.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Same as pfnSTAMRegister except that the name is specified in a
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * RTStrPrintf like fashion.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync *
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the DMA.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvSample Pointer to the sample.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmType Sample type. This indicates what pvSample is
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * pointing at.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmVisibility Visibility type specifying whether unused
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * statistics should be visible or not.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmUnit Sample unit.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Sample description.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszName The sample name format string.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param ... Arguments to the format string.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync */
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync /**
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Same as pfnSTAMRegister except that the name is specified in a
388f65e835e6a1dde31e13590eb32681819a2c23vboxsync * RTStrPrintfV like fashion.
1a57f94c99b4728b6529213cfea99938b2c75c15vboxsync *
3357eeed76d19616f784af90f42755da2b54bc4dvboxsync * @returns VBox status.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pDevIns Device instance of the DMA.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pvSample Pointer to the sample.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmType Sample type. This indicates what pvSample is
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * pointing at.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmVisibility Visibility type specifying whether unused
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * statistics should be visible or not.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param enmUnit Sample unit.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszDesc Sample description.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @param pszName The sample name format string.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param args Arguments to the format string.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync */
79baed6836ae36c5f15b182292387484dcf7a752vboxsync DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
79baed6836ae36c5f15b182292387484dcf7a752vboxsync STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
79baed6836ae36c5f15b182292387484dcf7a752vboxsync
79baed6836ae36c5f15b182292387484dcf7a752vboxsync /**
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * Registers the device with the default PCI bus.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync *
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @returns VBox status code.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pDevIns The device instance.
79baed6836ae36c5f15b182292387484dcf7a752vboxsync * @param pPciDev The PCI device structure.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Any PCI enabled device must keep this in it's instance data!
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * Fill in the PCI data config before registration, please.
2ca380caf80f0dacc65f8c996077e827318f1c69vboxsync * @remark This is the simple interface, a Ex interface will be created if
* more features are needed later.
*/
DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
/**
* Initialize MSI support in a PCI device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pMsiReg MSI registartion structure.
*/
DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
/**
* Registers a I/O region (memory mapped or I/O ports) for a PCI device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param iRegion The region number.
* @param cbRegion Size of the region.
* @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
* @param pfnCallback Callback for doing the mapping.
*/
DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
/**
* Register PCI configuration space read/write callbacks.
*
* @param pDevIns The device instance.
* @param pPciDev The PCI device structure.
* If NULL the default PCI device for this device instance is used.
* @param pfnRead Pointer to the user defined PCI config read function.
* @param ppfnReadOld Pointer to function pointer which will receive the old (default)
* PCI config read function. This way, user can decide when (and if)
* to call default PCI config read function. Can be NULL.
* @param pfnWrite Pointer to the user defined PCI config write function.
* @param pfnWriteOld Pointer to function pointer which will receive the old (default)
* PCI config write function. This way, user can decide when (and if)
* to call default PCI config write function. Can be NULL.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
/**
* Set the IRQ for a PCI device.
*
* @param pDevIns The device instance.
* @param iIrq IRQ number to set.
* @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
* @thread Any thread, but will involve the emulation thread.
*/
DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
/**
* Set the IRQ for a PCI device, but don't wait for EMT to process
* the request when not called from EMT.
*
* @param pDevIns The device instance.
* @param iIrq IRQ number to set.
* @param iLevel IRQ level.
* @thread Any thread, but will involve the emulation thread.
*/
DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
/**
* Set ISA IRQ for a device.
*
* @param pDevIns The device instance.
* @param iIrq IRQ number to set.
* @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
* @thread Any thread, but will involve the emulation thread.
*/
DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
/**
* Set the ISA IRQ for a device, but don't wait for EMT to process
* the request when not called from EMT.
*
* @param pDevIns The device instance.
* @param iIrq IRQ number to set.
* @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
* @thread Any thread, but will involve the emulation thread.
*/
DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
/**
* Attaches a driver (chain) to the device.
*
* The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
* the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param iLun The logical unit to attach.
* @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
* @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
* @param pszDesc Pointer to a string describing the LUN. This string must remain valid
* for the live of the device instance.
*/
DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
/**
* Create a queue.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param cbItem The size of a queue item.
* @param cItems The number of items in the queue.
* @param cMilliesInterval The number of milliseconds between polling the queue.
* If 0 then the emulation thread will be notified whenever an item arrives.
* @param pfnCallback The consumer function.
* @param fRZEnabled Set if the queue should work in RC and R0.
* @param pszName The queue base name. The instance number will be
* appended automatically.
* @param ppQueue Where to store the queue handle on success.
* @thread The emulation thread.
*/
DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
/**
* Initializes a PDM critical section.
*
* The PDM critical sections are derived from the IPRT critical sections, but
* works in RC and R0 as well.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pCritSect Pointer to the critical section.
* @param RT_SRC_POS_DECL Use RT_SRC_POS.
* @param pszNameFmt Format string for naming the critical section.
* For statistics and lock validation.
* @param va Arguments for the format string.
*/
DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
const char *pszNameFmt, va_list va));
/**
* Creates a PDM thread.
*
* This differs from the RTThreadCreate() API in that PDM takes care of suspending,
* resuming, and destroying the thread as the VM state changes.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param ppThread Where to store the thread 'handle'.
* @param pvUser The user argument to the thread function.
* @param pfnThread The thread function.
* @param pfnWakeup The wakup callback. This is called on the EMT
* thread when a state change is pending.
* @param cbStack See RTThreadCreate.
* @param enmType See RTThreadCreate.
* @param pszName See RTThreadCreate.
*/
DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
/**
* Set up asynchronous handling of a suspend, reset or power off notification.
*
* This shall only be called when getting the notification. It must be called
* for each one.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pfnAsyncNotify The callback.
* @thread EMT(0)
*/
DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
/**
* Notify EMT(0) that the device has completed the asynchronous notification
* handling.
*
* This can be called at any time, spurious calls will simply be ignored.
*
* @param pDevIns The device instance.
* @thread Any
*/
DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
/**
* Register the RTC device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pRtcReg Pointer to a RTC registration structure.
* @param ppRtcHlp Where to store the pointer to the helper
* functions.
*/
DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
/**
* Register the PCI Bus.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pPciBusReg Pointer to PCI bus registration structure.
* @param ppPciHlpR3 Where to store the pointer to the PCI Bus
* helpers.
*/
DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
/**
* Register the PIC device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pPicReg Pointer to a PIC registration structure.
* @param ppPicHlpR3 Where to store the pointer to the PIC HC
* helpers.
*/
DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
/**
* Register the APIC device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pApicReg Pointer to a APIC registration structure.
* @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
*/
DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
/**
* Register the I/O APIC device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pIoApicReg Pointer to a I/O APIC registration structure.
* @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
* helpers.
*/
DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
/**
* Register the HPET device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pHpetReg Pointer to a HPET registration structure.
* @param ppHpetHlpR3 Where to store the pointer to the HPET
* helpers.
*/
DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
/**
* Register the raw PCI device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pHpetReg Pointer to a raw PCI registration structure.
* @param ppHpetHlpR3 Where to store the pointer to the raw PCI
* helpers.
*/
DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
/**
* Register the DMA device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pDmacReg Pointer to a DMAC registration structure.
* @param ppDmacHlp Where to store the pointer to the DMA helpers.
*/
DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
/**
* Register transfer function for DMA channel.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param uChannel Channel number.
* @param pfnTransferHandler Device specific transfer callback function.
* @param pvUser User pointer to pass to the callback.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
/**
* Read memory.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param uChannel Channel number.
* @param pvBuffer Pointer to target buffer.
* @param off DMA position.
* @param cbBlock Block size.
* @param pcbRead Where to store the number of bytes which was
* read. optional.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
/**
* Write memory.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param uChannel Channel number.
* @param pvBuffer Memory to write.
* @param off DMA position.
* @param cbBlock Block size.
* @param pcbWritten Where to store the number of bytes which was
* written. optional.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
/**
* Set the DREQ line.
*
* @returns VBox status code.
* @param pDevIns Device instance.
* @param uChannel Channel number.
* @param uLevel Level of the line.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
/**
* Get channel mode.
*
* @returns Channel mode. See specs.
* @param pDevIns The device instance.
* @param uChannel Channel number.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
/**
* Schedule DMA execution.
*
* @param pDevIns The device instance.
* @thread Any thread.
*/
DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
/**
* Write CMOS value and update the checksum(s).
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param iReg The CMOS register index.
* @param u8Value The CMOS register value.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
/**
* Read CMOS value.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param iReg The CMOS register index.
* @param pu8Value Where to store the CMOS register value.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
/**
* Assert that the current thread is the emulation thread.
*
* @returns True if correct.
* @returns False if wrong.
* @param pDevIns The device instance.
* @param pszFile Filename of the assertion location.
* @param iLine The linenumber of the assertion location.
* @param pszFunction Function of the assertion location.
*/
DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
/**
* Assert that the current thread is NOT the emulation thread.
*
* @returns True if correct.
* @returns False if wrong.
* @param pDevIns The device instance.
* @param pszFile Filename of the assertion location.
* @param iLine The linenumber of the assertion location.
* @param pszFunction Function of the assertion location.
*/
DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
/**
* Resolves the symbol for a raw-mode context interface.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pvInterface The interface structure.
* @param cbInterface The size of the interface structure.
* @param pszSymPrefix What to prefix the symbols in the list with
* before resolving them. This must start with
* 'dev' and contain the driver name.
* @param pszSymList List of symbols corresponding to the interface.
* There is generally a there is generally a define
* holding this list associated with the interface
* definition (INTERFACE_SYM_LIST). For more
* details see PDMR3LdrGetInterfaceSymbols.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
const char *pszSymPrefix, const char *pszSymList));
/**
* Resolves the symbol for a ring-0 context interface.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pvInterface The interface structure.
* @param cbInterface The size of the interface structure.
* @param pszSymPrefix What to prefix the symbols in the list with
* before resolving them. This must start with
* 'dev' and contain the driver name.
* @param pszSymList List of symbols corresponding to the interface.
* There is generally a there is generally a define
* holding this list associated with the interface
* definition (INTERFACE_SYM_LIST). For more
* details see PDMR3LdrGetInterfaceSymbols.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
const char *pszSymPrefix, const char *pszSymList));
/**
* Call the ring-0 request handler routine of the device.
*
* For this to work, the device must be ring-0 enabled and export a request
* handler function. The name of the function must be the device name in
* the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
* 'ReqHandler'. The device name will be captialized. It shall take the
* exact same arguments as this function and be declared using
* PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
*
* Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
* or two as the handler address will be resolved on each invocation. This
* is the reason for the EMT only restriction as well.
*
* @returns VBox status code.
* @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
* handler function.
* @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
*
* @param pDevIns The device instance.
* @param uOperation The operation to perform.
* @param u64Arg 64-bit integer argument.
* @thread EMT
*/
DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
/** Space reserved for future members.
* @{ */
DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
/** @} */
/** API available to trusted devices only.
*
* These APIs are providing unrestricted access to the guest and the VM,
* or they are interacting intimately with PDM.
*
* @{
*/
/**
* Gets the VM handle. Restricted API.
*
* @returns VM Handle.
* @param pDevIns The device instance.
*/
DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
/**
* Gets the VMCPU handle. Restricted API.
*
* @returns VMCPU Handle.
* @param pDevIns The device instance.
*/
DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
/**
* Registers the VMM device heap
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param GCPhys The physical address.
* @param pvHeap Ring 3 heap pointer.
* @param cbSize Size of the heap.
* @thread EMT.
*/
DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
/**
* Unregisters the VMM device heap
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param GCPhys The physical address.
* @thread EMT.
*/
DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
/**
* Resets the VM.
*
* @returns The appropriate VBox status code to pass around on reset.
* @param pDevIns The device instance.
* @thread The emulation thread.
*/
DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
/**
* Suspends the VM.
*
* @returns The appropriate VBox status code to pass around on suspend.
* @param pDevIns The device instance.
* @thread The emulation thread.
*/
DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
/**
* Suspends, saves and powers off the VM.
*
* @returns The appropriate VBox status code to pass around.
* @param pDevIns The device instance.
* @thread An emulation thread.
*/
DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
/**
* Power off the VM.
*
* @returns The appropriate VBox status code to pass around on power off.
* @param pDevIns The device instance.
* @thread The emulation thread.
*/
DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
/**
* Checks if the Gate A20 is enabled or not.
*
* @returns true if A20 is enabled.
* @returns false if A20 is disabled.
* @param pDevIns The device instance.
* @thread The emulation thread.
*/
DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
/**
* Enables or disables the Gate A20.
*
* @param pDevIns The device instance.
* @param fEnable Set this flag to enable the Gate A20; clear it
* to disable.
* @thread The emulation thread.
*/
DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
/**
* Get the specified CPUID leaf for the virtual CPU associated with the calling
* thread.
*
* @param pDevIns The device instance.
* @param iLeaf The CPUID leaf to get.
* @param pEax Where to store the EAX value.
* @param pEbx Where to store the EBX value.
* @param pEcx Where to store the ECX value.
* @param pEdx Where to store the EDX value.
* @thread EMT.
*/
DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
/**
* Get the current virtual clock time in a VM. The clock frequency must be
* queried separately.
*
* @returns Current clock time.
* @param pDevIns The device instance.
*/
DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
/**
* Get the frequency of the virtual clock.
*
* @returns The clock frequency (not variable at run-time).
* @param pDevIns The device instance.
*/
DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
/**
* Get the current virtual clock time in a VM, in nanoseconds.
*
* @returns Current clock time (in ns).
* @param pDevIns The device instance.
*/
DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
/** @} */
/** Just a safety precaution. (PDM_DEVHLP_VERSION) */
uint32_t u32TheEnd;
} PDMDEVHLPR3;
#endif /* !IN_RING3 */
/** Pointer to the R3 PDM Device API. */
typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
/** Pointer to the R3 PDM Device API, const variant. */
typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
/** Current PDMDEVHLPR3 version number. */
#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 3, 0)
/**
* PDM Device API - RC Variant.
*/
typedef struct PDMDEVHLPRC
{
/** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
uint32_t u32Version;
/**
* Set the IRQ for a PCI device.
*
* @param pDevIns Device instance.
* @param iIrq IRQ number to set.
* @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
* @thread Any thread, but will involve the emulation thread.
*/
DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
/**
* Set ISA IRQ for a device.
*
* @param pDevIns Device instance.
* @param iIrq IRQ number to set.
* @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
* @thread Any thread, but will involve the emulation thread.
*/
DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
/**
* Read physical memory.
*
* @returns VINF_SUCCESS (for now).
* @param pDevIns Device instance.
* @param GCPhys Physical address start reading from.
* @param pvBuf Where to put the read bits.
* @param cbRead How many bytes to read.
*/
DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
/**
* Write to physical memory.
*
* @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
* @param pDevIns Device instance.
* @param GCPhys Physical address to write to.
* @param pvBuf What to write.
* @param cbWrite How many bytes to write.
*/
DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
/**
* Checks if the Gate A20 is enabled or not.
*
* @returns true if A20 is enabled.
* @returns false if A20 is disabled.
* @param pDevIns Device instance.
* @thread The emulation thread.
*/
DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
/**
* Gets the VM state.
*
* @returns VM state.
* @param pDevIns The device instance.
* @thread Any thread (just keep in mind that it's volatile info).
*/
DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
/**
* Set the VM error message
*
* @returns rc.
* @param pDrvIns Driver instance.
* @param rc VBox status code.
* @param RT_SRC_POS_DECL Use RT_SRC_POS.
* @param pszFormat Error message format string.
* @param ... Error message arguments.
*/
DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
/**
* Set the VM error message
*
* @returns rc.
* @param pDrvIns Driver instance.
* @param rc VBox status code.
* @param RT_SRC_POS_DECL Use RT_SRC_POS.
* @param pszFormat Error message format string.
* @param va Error message arguments.
*/
DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
/**
* Set the VM runtime error message
*
* @returns VBox status code.
* @param pDevIns Device instance.
* @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
* @param pszErrorId Error ID string.
* @param pszFormat Error message format string.
* @param ... Error message arguments.
*/
DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
/**
* Set the VM runtime error message
*
* @returns VBox status code.
* @param pDevIns Device instance.
* @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
* @param pszErrorId Error ID string.
* @param pszFormat Error message format string.
* @param va Error message arguments.
*/
DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
/**
* Set parameters for pending MMIO patch operation
*
* @returns VBox status code.
* @param pDevIns Device instance.
* @param GCPhys MMIO physical address
* @param pCachedData GC pointer to cached data
*/
DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
/**
* Gets the VM handle. Restricted API.
*
* @returns VM Handle.
* @param pDevIns Device instance.
*/
DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
/**
* Gets the VMCPU handle. Restricted API.
*
* @returns VMCPU Handle.
* @param pDevIns The device instance.
*/
DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
/**
* Get the current virtual clock time in a VM. The clock frequency must be
* queried separately.
*
* @returns Current clock time.
* @param pDevIns The device instance.
*/
DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
/**
* Get the frequency of the virtual clock.
*
* @returns The clock frequency (not variable at run-time).
* @param pDevIns The device instance.
*/
DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
/**
* Get the current virtual clock time in a VM, in nanoseconds.
*
* @returns Current clock time (in ns).
* @param pDevIns The device instance.
*/
DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
/** Just a safety precaution. */
uint32_t u32TheEnd;
} PDMDEVHLPRC;
/** Pointer PDM Device RC API. */
typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
/** Pointer PDM Device RC API. */
typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
/** Current PDMDEVHLP version number. */
#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 1, 0)
/**
* PDM Device API - R0 Variant.
*/
typedef struct PDMDEVHLPR0
{
/** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
uint32_t u32Version;
/**
* Set the IRQ for a PCI device.
*
* @param pDevIns Device instance.
* @param iIrq IRQ number to set.
* @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
* @thread Any thread, but will involve the emulation thread.
*/
DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
/**
* Set ISA IRQ for a device.
*
* @param pDevIns Device instance.
* @param iIrq IRQ number to set.
* @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
* @thread Any thread, but will involve the emulation thread.
*/
DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
/**
* Read physical memory.
*
* @returns VINF_SUCCESS (for now).
* @param pDevIns Device instance.
* @param GCPhys Physical address start reading from.
* @param pvBuf Where to put the read bits.
* @param cbRead How many bytes to read.
*/
DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
/**
* Write to physical memory.
*
* @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
* @param pDevIns Device instance.
* @param GCPhys Physical address to write to.
* @param pvBuf What to write.
* @param cbWrite How many bytes to write.
*/
DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
/**
* Checks if the Gate A20 is enabled or not.
*
* @returns true if A20 is enabled.
* @returns false if A20 is disabled.
* @param pDevIns Device instance.
* @thread The emulation thread.
*/
DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
/**
* Gets the VM state.
*
* @returns VM state.
* @param pDevIns The device instance.
* @thread Any thread (just keep in mind that it's volatile info).
*/
DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
/**
* Set the VM error message
*
* @returns rc.
* @param pDrvIns Driver instance.
* @param rc VBox status code.
* @param RT_SRC_POS_DECL Use RT_SRC_POS.
* @param pszFormat Error message format string.
* @param ... Error message arguments.
*/
DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
/**
* Set the VM error message
*
* @returns rc.
* @param pDrvIns Driver instance.
* @param rc VBox status code.
* @param RT_SRC_POS_DECL Use RT_SRC_POS.
* @param pszFormat Error message format string.
* @param va Error message arguments.
*/
DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
/**
* Set the VM runtime error message
*
* @returns VBox status code.
* @param pDevIns Device instance.
* @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
* @param pszErrorId Error ID string.
* @param pszFormat Error message format string.
* @param ... Error message arguments.
*/
DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
/**
* Set the VM runtime error message
*
* @returns VBox status code.
* @param pDevIns Device instance.
* @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
* @param pszErrorId Error ID string.
* @param pszFormat Error message format string.
* @param va Error message arguments.
*/
DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
/**
* Set parameters for pending MMIO patch operation
*
* @returns rc.
* @param pDevIns Device instance.
* @param GCPhys MMIO physical address
* @param pCachedData GC pointer to cached data
*/
DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
/**
* Gets the VM handle. Restricted API.
*
* @returns VM Handle.
* @param pDevIns Device instance.
*/
DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
/**
* Checks if our current CPU state allows for IO block emulation fallback to the recompiler
*
* @returns true = yes, false = no
* @param pDevIns Device instance.
*/
DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
/**
* Gets the VMCPU handle. Restricted API.
*
* @returns VMCPU Handle.
* @param pDevIns The device instance.
*/
DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
/**
* Get the current virtual clock time in a VM. The clock frequency must be
* queried separately.
*
* @returns Current clock time.
* @param pDevIns The device instance.
*/
DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
/**
* Get the frequency of the virtual clock.
*
* @returns The clock frequency (not variable at run-time).
* @param pDevIns The device instance.
*/
DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
/**
* Get the current virtual clock time in a VM, in nanoseconds.
*
* @returns Current clock time (in ns).
* @param pDevIns The device instance.
*/
DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
/** Just a safety precaution. */
uint32_t u32TheEnd;
} PDMDEVHLPR0;
/** Pointer PDM Device R0 API. */
typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
/** Pointer PDM Device GC API. */
typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
/** Current PDMDEVHLP version number. */
#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 1, 0)
/**
* PDM Device Instance.
*/
typedef struct PDMDEVINS
{
/** Structure version. PDM_DEVINS_VERSION defines the current version. */
uint32_t u32Version;
/** Device instance number. */
uint32_t iInstance;
/** Pointer the GC PDM Device API. */
PCPDMDEVHLPRC pHlpRC;
/** Pointer to device instance data. */
RTRCPTR pvInstanceDataRC;
/** The critical section for the device, see pCritSectR3.
* This is automatically resolved by PDM when pCritSectR3 is set by the
* constructor. */
RCPTRTYPE(PPDMCRITSECT) pCritSectRC;
/** Alignment padding. */
RTRCPTR pAlignmentRC;
/** Pointer the R0 PDM Device API. */
PCPDMDEVHLPR0 pHlpR0;
/** Pointer to device instance data (R0). */
RTR0PTR pvInstanceDataR0;
/** The critical section for the device, see pCritSectR3.
* This is automatically resolved by PDM when pCritSectR3 is set by the
* constructor. */
R0PTRTYPE(PPDMCRITSECT) pCritSectR0;
/** Pointer the HC PDM Device API. */
PCPDMDEVHLPR3 pHlpR3;
/** Pointer to device instance data. */
RTR3PTR pvInstanceDataR3;
/** The critical section for the device. (Optional)
*
* The device constructor initializes this if it has a critical section for
* the device and desires it to be taken automatically by MMIO, I/O port
* and timer callbacks to the device. The advantages using this locking
* approach is both less code and avoiding the global IOM lock.
*
* @remarks Will not yet be taken by SSM.
*/
R3PTRTYPE(PPDMCRITSECT) pCritSectR3;
/** Pointer to device registration structure. */
R3PTRTYPE(PCPDMDEVREG) pReg;
/** Configuration handle. */
R3PTRTYPE(PCFGMNODE) pCfg;
/** The base interface of the device.
*
* The device constructor initializes this if it has any
* device level interfaces to export. To obtain this interface
* call PDMR3QueryDevice(). */
PDMIBASE IBase;
/** Align the internal data more naturally. */
RTR3PTR R3PtrPadding;
/** Internal data. */
union
{
#ifdef PDMDEVINSINT_DECLARED
PDMDEVINSINT s;
#endif
uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 0 : 112 + 0x28];
} Internal;
/** Device instance data. The size of this area is defined
* in the PDMDEVREG::cbInstanceData field. */
char achInstanceData[8];
} PDMDEVINS;
/** Current PDMDEVINS version number. */
#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 2, 0)
/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
/**
* Checks the structure versions of the device instance and device helpers,
* returning if they are incompatible.
*
* This is for use in the constructor.
*
* @param pDevIns The device instance pointer.
*/
#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
do \
{ \
PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
VERR_VERSION_MISMATCH); \
AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
VERR_VERSION_MISMATCH); \
} while (0)
/**
* Quietly checks the structure versions of the device instance and device
* helpers, returning if they are incompatible.
*
* This is for use in the destructor.
*
* @param pDevIns The device instance pointer.
*/
#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
do \
{ \
PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
if (RT_UNLIKELY( !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) \
|| !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
return VERR_VERSION_MISMATCH; \
} while (0)
/**
* Wrapper around CFGMR3ValidateConfig for the root config for use in the
* constructor - returns on failure.
*
* This should be invoked after having initialized the instance data
* sufficiently for the correct operation of the destructor. The destructor is
* always called!
*
* @param pDevIns Pointer to the PDM device instance.
* @param pszValidValues Patterns describing the valid value names. See
* RTStrSimplePatternMultiMatch for details on the
* pattern syntax.
* @param pszValidNodes Patterns describing the valid node (key) names.
* Pass empty string if no valid nodess.
*/
#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
do \
{ \
int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
(pDevIns)->pReg->szName, (pDevIns)->iInstance); \
if (RT_FAILURE(rcValCfg)) \
return rcValCfg; \
} while (0)
/** @def PDMDEV_ASSERT_EMT
* Assert that the current thread is the emulation thread.
*/
#ifdef VBOX_STRICT
# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
#else
# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
#endif
/** @def PDMDEV_ASSERT_OTHER
* Assert that the current thread is NOT the emulation thread.
*/
#ifdef VBOX_STRICT
# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
#else
# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
#endif
/** @def PDMDEV_ASSERT_VMLOCK_OWNER
* Assert that the current thread is owner of the VM lock.
*/
#ifdef VBOX_STRICT
# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
#else
# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
#endif
/** @def PDMDEV_SET_ERROR
* Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
*/
#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
/** @def PDMDEV_SET_RUNTIME_ERROR
* Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
*/
#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
/** @def PDMDEVINS_2_RCPTR
* Converts a PDM Device instance pointer a RC PDM Device instance pointer.
*/
#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
/** @def PDMDEVINS_2_R3PTR
* Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
*/
#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
/** @def PDMDEVINS_2_R0PTR
* Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
*/
#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
#ifdef IN_RING3
/**
* @copydoc PDMDEVHLPR3::pfnIOPortRegister
*/
DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
{
return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
}
/**
* @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
*/
DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
const char *pszOut, const char *pszIn, const char *pszOutStr,
const char *pszInStr, const char *pszDesc)
{
return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
}
/**
* @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
*/
DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
const char *pszOut, const char *pszIn, const char *pszOutStr,
const char *pszInStr, const char *pszDesc)
{
return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
}
/**
* @copydoc PDMDEVHLPR3::pfnIOPortDeregister
*/
DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
{
return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMIORegister
*/
DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
const char *pszDesc)
{
return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
*/
DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
const char *pszWrite, const char *pszRead, const char *pszFill)
{
return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
*/
DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
const char *pszWrite, const char *pszRead, const char *pszFill)
{
return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMIODeregister
*/
DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
{
return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMIO2Register
*/
DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
{
return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
*/
DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
{
return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMIO2Map
*/
DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
{
return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
*/
DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
{
return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
*/
DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
const char *pszDesc, PRTRCPTR pRCPtr)
{
return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
*/
DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
const char *pszDesc, PRTR0PTR pR0Ptr)
{
return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
}
/**
* @copydoc PDMDEVHLPR3::pfnROMRegister
*/
DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange,
const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
{
return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
}
/**
* @copydoc PDMDEVHLPR3::pfnROMProtectShadow
*/
DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
{
return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
}
/**
* Register a save state data unit.
*
* @returns VBox status.
* @param pDevIns The device instance.
* @param uVersion Data layout version number.
* @param cbGuess The approximate amount of data in the unit.
* Only for progress indicators.
* @param pfnSaveExec Execute save callback, optional.
* @param pfnLoadExec Execute load callback, optional.
*/
DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
{
return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
}
/**
* Register a save state data unit with a live save callback as well.
*
* @returns VBox status.
* @param pDevIns The device instance.
* @param uVersion Data layout version number.
* @param cbGuess The approximate amount of data in the unit.
* Only for progress indicators.
* @param pfnLiveExec Execute live callback, optional.
* @param pfnSaveExec Execute save callback, optional.
* @param pfnLoadExec Execute load callback, optional.
*/
DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
{
return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
}
/**
* @copydoc PDMDEVHLPR3::pfnSSMRegister
*/
DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
{
return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
pfnLivePrep, pfnLiveExec, pfnLiveVote,
pfnSavePrep, pfnSaveExec, pfnSaveDone,
pfnLoadPrep, pfnLoadExec, pfnLoadDone);
}
/**
* @copydoc PDMDEVHLPR3::pfnTMTimerCreate
*/
DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
const char *pszDesc, PPTMTIMERR3 ppTimer)
{
return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
}
/**
* @copydoc PDMDEVHLPR3::pfnTMUtcNow
*/
DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
{
return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
}
#endif /* IN_RING3 */
/**
* @copydoc PDMDEVHLPR3::pfnPhysRead
*/
DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
{
return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
}
/**
* @copydoc PDMDEVHLPR3::pfnPhysWrite
*/
DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
{
return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
}
#ifdef IN_RING3
/**
* @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
*/
DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
{
return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
}
/**
* @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
*/
DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
{
return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
}
/**
* @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
*/
DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
{
pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
}
/**
* @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
*/
DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
{
return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
}
/**
* @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
*/
DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
{
return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
}
/**
* @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
*/
DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
{
return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
*/
DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
{
return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
*/
DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
{
return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
}
/**
* @copydoc PDMDEVHLPR3::pfnMMHeapFree
*/
DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
{
pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
}
#endif /* IN_RING3 */
/**
* @copydoc PDMDEVHLPR3::pfnVMState
*/
DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
{
return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
}
#ifdef IN_RING3
/**
* @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
*/
DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
{
return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
}
#endif /* IN_RING3 */
/**
* @copydoc PDMDEVHLPR3::pfnVMSetError
*/
DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
{
va_list va;
va_start(va, pszFormat);
pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
va_end(va);
return rc;
}
/**
* @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
*/
DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
{
va_list va;
int rc;
va_start(va, pszFormat);
rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
va_end(va);
return rc;
}
/**
* VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
*
* @returns VBox status code which must be passed up to the VMM. This will be
* VINF_SUCCESS in non-strict builds.
* @param pDevIns The device instance.
* @param RT_SRC_POS_DECL Use RT_SRC_POS.
* @param pszFormat Message. (optional)
* @param ... Message parameters.
*/
DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
{
#ifdef VBOX_STRICT
# ifdef IN_RING3
int rc;
va_list args;
va_start(args, pszFormat);
rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
va_end(args);
return rc;
# else
return VINF_EM_DBG_STOP;
# endif
#else
NOREF(pDevIns);
NOREF(pszFile);
NOREF(iLine);
NOREF(pszFunction);
NOREF(pszFormat);
return VINF_SUCCESS;
#endif
}
#ifdef IN_RING3
/**
* @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
*/
DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
{
return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
}
/**
* @copydoc PDMDEVHLPR3::pfnSTAMRegister
*/
DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
{
pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
}
/**
* @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
*/
DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
const char *pszDesc, const char *pszName, ...)
{
va_list va;
va_start(va, pszName);
pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
va_end(va);
}
/**
* @copydoc PDMDEVHLPR3::pfnPCIRegister
*/
DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
{
return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
}
/**
* @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
*/
DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
{
return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
}
/**
* @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
*/
DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
{
return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
}
/**
* @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
*/
DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
{
pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
}
#endif /* IN_RING3 */
/**
* @copydoc PDMDEVHLPR3::pfnPCISetIrq
*/
DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
{
pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
}
/**
* @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
*/
DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
{
pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
}
/**
* @copydoc PDMDEVHLPR3::pfnISASetIrq
*/
DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
{
pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
}
/**
* @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
*/
DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
{
pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
}
#ifdef IN_RING3
/**
* @copydoc PDMDEVHLPR3::pfnDriverAttach
*/
DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
{
return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
}
/**
* @copydoc PDMDEVHLPR3::pfnQueueCreate
*/
DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
{
return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
}
/**
* Initializes a PDM critical section.
*
* The PDM critical sections are derived from the IPRT critical sections, but
* works in RC and R0 as well.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pCritSect Pointer to the critical section.
* @param RT_SRC_POS_DECL Use RT_SRC_POS.
* @param pszNameFmt Format string for naming the critical section.
* For statistics and lock validation.
* @param ... Arguments for the format string.
*/
DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
{
int rc;
va_list va;
va_start(va, pszNameFmt);
rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
va_end(va);
return rc;
}
/**
* @copydoc PDMDEVHLPR3::pfnThreadCreate
*/
DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
{
return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
}
/**
* @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
*/
DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
{
return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
}
/**
* @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
*/
DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
{
pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
}
/**
* @copydoc PDMDEVHLPR3::pfnA20Set
*/
DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
{
pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
}
/**
* @copydoc PDMDEVHLPR3::pfnRTCRegister
*/
DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
{
return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
}
/**
* @copydoc PDMDEVHLPR3::pfnPCIBusRegister
*/
DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
{
return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
}
/**
* @copydoc PDMDEVHLPR3::pfnPICRegister
*/
DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
{
return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
}
/**
* @copydoc PDMDEVHLPR3::pfnAPICRegister
*/
DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
{
return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
}
/**
* @copydoc PDMDEVHLPR3::pfn
*/
DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
{
return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
}
/**
* @copydoc PDMDEVHLPR3::pfnHPETRegister
*/
DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
{
return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
}
/**
* @copydoc PDMDEVHLPR3::pfnPciRawRegister
*/
DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
{
return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
}
/**
* @copydoc PDMDEVHLPR3::pfnDMACRegister
*/
DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
{
return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
}
/**
* @copydoc PDMDEVHLPR3::pfnDMARegister
*/
DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
{
return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
}
/**
* @copydoc PDMDEVHLPR3::pfnDMAReadMemory
*/
DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
{
return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
}
/**
* @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
*/
DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
{
return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
}
/**
* @copydoc PDMDEVHLPR3::pfnDMASetDREQ
*/
DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
{
return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
}
/**
* @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
*/
DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
{
return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
}
/**
* @copydoc PDMDEVHLPR3::pfnDMASchedule
*/
DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
{
pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
}
/**
* @copydoc PDMDEVHLPR3::pfnCMOSWrite
*/
DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
{
return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
}
/**
* @copydoc PDMDEVHLPR3::pfnCMOSRead
*/
DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
{
return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
}
/**
* @copydoc PDMDEVHLP::pfnCallR0
*/
DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
{
return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
}
#endif /* IN_RING3 */
/**
* @copydoc PDMDEVHLPR3::pfnGetVM
*/
DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
{
return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
}
/**
* @copydoc PDMDEVHLPR3::pfnGetVMCPU
*/
DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
{
return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
}
/**
* @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
*/
DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
{
return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
}
/**
* @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
*/
DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
{
return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
}
/**
* @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
*/
DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
{
return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
}
#ifdef IN_RING3
/**
* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
*/
DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
{
return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
}
/**
* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
*/
DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
{
return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
}
/**
* @copydoc PDMDEVHLPR3::pfnVMReset
*/
DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
{
return pDevIns->pHlpR3->pfnVMReset(pDevIns);
}
/**
* @copydoc PDMDEVHLPR3::pfnVMSuspend
*/
DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
{
return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
}
/**
* @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
*/
DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
{
return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
}
/**
* @copydoc PDMDEVHLPR3::pfnVMPowerOff
*/
DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
{
return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
}
#endif /* IN_RING3 */
/**
* @copydoc PDMDEVHLPR3::pfnA20IsEnabled
*/
DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
{
return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
}
#ifdef IN_RING3
/**
* @copydoc PDMDEVHLPR3::pfnGetCpuId
*/
DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
{
pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
}
#endif /* IN_RING3 */
#ifdef IN_RING0
/**
* @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
*/
DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
{
return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
}
#endif /* IN_RING0 */
/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
typedef struct PDMDEVREGCB *PPDMDEVREGCB;
/**
* Callbacks for VBoxDeviceRegister().
*/
typedef struct PDMDEVREGCB
{
/** Interface version.
* This is set to PDM_DEVREG_CB_VERSION. */
uint32_t u32Version;
/**
* Registers a device with the current VM instance.
*
* @returns VBox status code.
* @param pCallbacks Pointer to the callback table.
* @param pReg Pointer to the device registration record.
* This data must be permanent and readonly.
*/
DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
} PDMDEVREGCB;
/** Current version of the PDMDEVREGCB structure. */
#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
/**
* The VBoxDevicesRegister callback function.
*
* PDM will invoke this function after loading a device module and letting
* the module decide which devices to register and how to handle conflicts.
*
* @returns VBox status code.
* @param pCallbacks Pointer to the callback table.
* @param u32Version VBox version number.
*/
typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
/** @} */
RT_C_DECLS_END
#endif