pdmdev.h revision 21e3c13c566c3687cba3ac7ccf8c9c85e8a08708
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * PDM - Pluggable Device Manager, Devices.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Copyright (C) 2006-2013 Oracle Corporation
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * available from http://www.virtualbox.org. This file is free software;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * you can redistribute it and/or modify it under the terms of the GNU
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * General Public License (GPL) as published by the Free Software
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * The contents of this file may alternatively be used under the terms
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * of the Common Development and Distribution License Version 1.0
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * VirtualBox OSE distribution, in which case the provisions of the
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * CDDL are applicable instead of those of the GPL.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * You may elect to license modified versions of this file under the
43747b1f0bc8302a238fb35e55857a5e9aa1933dvboxsync * terms and conditions of either the GPL or the CDDL or both.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** @defgroup grp_pdm_device The PDM Devices API
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @ingroup grp_pdm
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Construct a device instance for a VM.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @returns VBox status.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns The device instance data. If the registration structure
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * is needed, it can be accessed thru pDevIns->pReg.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param iInstance Instance number. Use this to figure out which registers
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * and such to use. The instance number is also found in
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * pDevIns->iInstance, but since it's likely to be
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * frequently used PDM passes it as parameter.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pCfg Configuration node handle for the driver. This is
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * expected to be in high demand in the constructor and is
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * therefore passed as an argument. When using it at other
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * times, it can be found in pDrvIns->pCfg.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsynctypedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** Pointer to a FNPDMDEVCONSTRUCT() function. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Destruct a device instance.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Most VM resources are freed by the VM. This callback is provided so that any non-VM
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * resources can be freed correctly.
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync * @returns VBox status.
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync * @param pDevIns The device instance data.
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync * @remarks The device critical section is not entered. The routine may delete
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * the critical section, so the caller cannot exit it.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Pointer to a FNPDMDEVDESTRUCT() function. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * Device relocation callback.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * This is called when the instance data has been relocated in raw-mode context
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * (RC). It is also called when the RC hypervisor selects changes. The device
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * must fixup all necessary pointers and re-query all interfaces to other RC
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * devices and drivers.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * Before the RC code is executed the first time, this function will be called
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * with a 0 delta so RC pointer calculations can be one in one place.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param pDevIns Pointer to the device instance.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param offDelta The relocation delta relative to the old location.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @remarks A relocation CANNOT fail.
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync * @remarks The device critical section is not entered. The relocations should
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync * not normally require any locking.
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsynctypedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
65697a26b524640b83828b715160c798c43a0424vboxsync/** Pointer to a FNPDMDEVRELOCATE() function. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * Power On notification.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @returns VBox status.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param pDevIns The device instance data.
cab115cfa31c584def7069312a1e23c3fc88533bvboxsync * @remarks Caller enters the device critical section.
0381007ae929f1a0885e69644b7d586a1dbb3a2avboxsynctypedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync/** Pointer to a FNPDMDEVPOWERON() function. */
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync * Reset notification.
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync * @returns VBox status.
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync * @param pDevIns The device instance data.
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync * @remarks Caller enters the device critical section.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsynctypedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Pointer to a FNPDMDEVRESET() function. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Suspend notification.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @returns VBox status.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param pDevIns The device instance data.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @thread EMT(0)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @remarks Caller enters the device critical section.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Pointer to a FNPDMDEVSUSPEND() function. */
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync * Resume notification.
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync * @returns VBox status.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns The device instance data.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @remarks Caller enters the device critical section.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsynctypedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Pointer to a FNPDMDEVRESUME() function. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * Power Off notification.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * This is only called when the VMR3PowerOff call is made on a running VM. This
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * means that there is no notification if the VM was suspended before being
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * powered of. There will also be no callback when hot plugging devices.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param pDevIns The device instance data.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @thread EMT(0)
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync * @remarks Caller enters the device critical section.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Pointer to a FNPDMDEVPOWEROFF() function. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * Attach command.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * This is called to let the device attach to a driver for a specified LUN
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync * at runtime. This is not called during VM construction, the device
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * constructor have to attach to all the available drivers.
93f91841f87620d1cb6d0238b3d0d5e52cd3b9a4vboxsync * This is like plugging in the keyboard or mouse after turning on the PC.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @returns VBox status code.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param pDevIns The device instance.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param iLUN The logical unit which is being detached.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @remarks Caller enters the device critical section.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
65697a26b524640b83828b715160c798c43a0424vboxsync/** Pointer to a FNPDMDEVATTACH() function. */
65697a26b524640b83828b715160c798c43a0424vboxsync * Detach notification.
65697a26b524640b83828b715160c798c43a0424vboxsync * This is called when a driver is detaching itself from a LUN of the device.
65697a26b524640b83828b715160c798c43a0424vboxsync * The device should adjust it's state to reflect this.
65697a26b524640b83828b715160c798c43a0424vboxsync * This is like unplugging the network cable to use it for the laptop or
65697a26b524640b83828b715160c798c43a0424vboxsync * something while the PC is still running.
65697a26b524640b83828b715160c798c43a0424vboxsync * @param pDevIns The device instance.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param iLUN The logical unit which is being detached.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @remarks Caller enters the device critical section.
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsynctypedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync/** Pointer to a FNPDMDEVDETACH() function. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Query the base interface of a logical unit.
65697a26b524640b83828b715160c798c43a0424vboxsync * @returns VBOX status code.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns The device instance.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param iLUN The logicial unit to query.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param ppBase Where to store the pointer to the base interface of the LUN.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @remarks The device critical section is not entered.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsynctypedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
f687f34bd232be13744edbc0cc5155fa5d4540edvboxsynctypedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * Init complete notification.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * This can be done to do communication with other devices and other
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * initialization which requires everything to be in place.
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync * @returns VBOX status code.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @param pDevIns The device instance.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @remarks Caller enters the device critical section.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
ead016c68c61b5f2e1fe4d237054eebea9327d4bvboxsync/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsynctypedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
7ccfefe49db4cd93c3701d7b60873ebf404b5b87vboxsync * PDM Device Registration Structure.
7ccfefe49db4cd93c3701d7b60873ebf404b5b87vboxsync * This structure is used when registering a device from VBoxInitDevices() in HC
7ccfefe49db4cd93c3701d7b60873ebf404b5b87vboxsync * Ring-3. PDM will continue use till the VM is terminated.
7ccfefe49db4cd93c3701d7b60873ebf404b5b87vboxsynctypedef struct PDMDEVREG
64f58e4154eaa20c47782b429eeaff09070369bfvboxsync /** Structure version. PDM_DEVREG_VERSION defines the current version. */
64f58e4154eaa20c47782b429eeaff09070369bfvboxsync /** Device name. */
64f58e4154eaa20c47782b429eeaff09070369bfvboxsync /** Name of the raw-mode context module (no path).
64f58e4154eaa20c47782b429eeaff09070369bfvboxsync * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
64f58e4154eaa20c47782b429eeaff09070369bfvboxsync /** Name of the ring-0 module (no path).
64f58e4154eaa20c47782b429eeaff09070369bfvboxsync * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
7ccfefe49db4cd93c3701d7b60873ebf404b5b87vboxsync /** The description of the device. The UTF-8 string pointed to shall, like this structure,
7ccfefe49db4cd93c3701d7b60873ebf404b5b87vboxsync * remain unchanged from registration till VM destruction. */
7ccfefe49db4cd93c3701d7b60873ebf404b5b87vboxsync /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
64f58e4154eaa20c47782b429eeaff09070369bfvboxsync /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync /** Maximum number of instances (per VM). */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Size of the instance data. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Construct instance - required. */
65697a26b524640b83828b715160c798c43a0424vboxsync /** Destruct instance - optional.
65697a26b524640b83828b715160c798c43a0424vboxsync * Critical section NOT entered (will be destroyed). */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** Relocation command - optional.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * Critical section NOT entered. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** Unused member. (Was pfnIOCtl.) */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync /** Power on notification - optional.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * Critical section is entered. */
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync /** Reset notification - optional.
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync * Critical section is entered. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Suspend notification - optional.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * Critical section is entered. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** Resume notification - optional.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Critical section is entered. */
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync /** Attach command - optional.
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync * Critical section is entered. */
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync /** Detach notification - optional.
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync * Critical section is entered. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Query a LUN base interface - optional.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * Critical section is NOT entered. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Init complete notification - optional.
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync * Critical section is entered. */
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync /** Power off notification - optional.
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync * Critical section is entered. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** @todo */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** Initialization safty marker. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Pointer to a PDM Device Structure. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Const pointer to a PDM Device Structure. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Current DEVREG version number. */
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** PDM Device Flags.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** This flag is used to indicate that the device has a RC component. */
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync/** This flag is used to indicate that the device has a R0 component. */
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync * The bit count for the current host. */
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync/** The host bit count mask. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** The device support only 32-bit guests. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** The device support only 64-bit guests. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** The device support both 32-bit & 64-bit guests. */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync * The guest bit count for the current compilation. */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync/** The guest bit count mask. */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync/** A convenience. */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync/** Indicates that the devices support PAE36 on a 32-bit guest. */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync/** Indicates that the device needs to be notified before the drivers when suspending. */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync/** Indicates that the device needs to be notified before the drivers when powering off. */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync/** Indicates that the device needs to be notified before the drivers when resetting. */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** PDM Device Classes.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * The order is important, lower bit earlier instantiation.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Architecture device. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Architecture BIOS device. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** PCI bus brigde. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** ISA bus brigde. */
65697a26b524640b83828b715160c798c43a0424vboxsync/** Input device (mouse, keyboard, joystick, HID, ...). */
65697a26b524640b83828b715160c798c43a0424vboxsync/** Interrupt controller (PIC). */
65697a26b524640b83828b715160c798c43a0424vboxsync/** Interval controoler (PIT). */
65697a26b524640b83828b715160c798c43a0424vboxsync/** DMA controller. */
65697a26b524640b83828b715160c798c43a0424vboxsync/** VMM Device. */
65697a26b524640b83828b715160c798c43a0424vboxsync/** Graphics device, like VGA. */
65697a26b524640b83828b715160c798c43a0424vboxsync/** Storage controller device. */
65697a26b524640b83828b715160c798c43a0424vboxsync/** Network interface controller. */
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync/** Audio. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** USB HIC. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** ACPI. */
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync/** Serial controller device. */
96a7e06717e2d7398642eadb5ebab1bf13fbe2dbvboxsync/** Parallel controller device */
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync/** Host PCI pass-through device */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** Misc devices (always last). */
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync/** @name IRQ Level for use with the *SetIrq APIs.
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync/** Assert the IRQ (can assume value 1). */
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync/** Deassert the IRQ (can assume value 0). */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync/** flip-flop - deassert and then assert the IRQ again immediately. */
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Registration record for MSI.
ad27e1d5e48ca41245120c331cc88b50464813cevboxsynctypedef struct PDMMSIREG
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Number of MSI interrupt vectors, 0 if MSI not supported */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Offset of MSI capability */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync /** Offset of next capability to MSI */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** If we support 64-bit MSI addressing */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Offset of MSI-X capability */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Offset of next capability to MSI-X */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * PCI Bus registration structure.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsynctypedef struct PDMPCIBUSREG
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Registers the device with the default PCI bus.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @returns VBox status code.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns Device instance of the PCI Bus.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pPciDev The PCI device structure.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * Any PCI enabled device must keep this in it's instance data!
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * Fill in the PCI data config before registration, please.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * If negative, the pci bus device will assign one.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @remarks Caller enters the PDM critical section.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
8a339f91959bb7a3315b51a23461b68c7b0cb50evboxsync * Initialize MSI support in a PCI device.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @returns VBox status code.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pDevIns Device instance of the PCI Bus.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pPciDev The PCI device structure.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pMsiReg MSI registration structure
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @remarks Caller enters the PDM critical section.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @returns VBox status code.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns Device instance of the PCI Bus.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pPciDev The PCI device structure.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param iRegion The region number.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param cbRegion Size of the region.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pfnCallback Callback for doing the mapping.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @remarks Caller enters the PDM critical section.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync * Register PCI configuration space read/write callbacks.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pDevIns Device instance of the PCI Bus.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pPciDev The PCI device structure.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pfnRead Pointer to the user defined PCI config read function.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * PCI config read function. This way, user can decide when (and if)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * to call default PCI config read function. Can be NULL.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pfnWrite Pointer to the user defined PCI config write function.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * PCI config write function. This way, user can decide when (and if)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * to call default PCI config write function. Can be NULL.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @remarks Caller enters the PDM critical section.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @thread EMT
b0db50948c349fa76655abf252f7946b515e8204vboxsync DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
b0db50948c349fa76655abf252f7946b515e8204vboxsync PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
b0db50948c349fa76655abf252f7946b515e8204vboxsync * Set the IRQ for a PCI device.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @param pDevIns Device instance of the PCI Bus.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @param pPciDev The PCI device structure.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @param iIrq IRQ number to set.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @remarks Caller enters the PDM critical section.
b0db50948c349fa76655abf252f7946b515e8204vboxsync DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
b0db50948c349fa76655abf252f7946b515e8204vboxsync * Called to perform the job of the bios.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * This is only called for the first PCI Bus - it is expected to
b0db50948c349fa76655abf252f7946b515e8204vboxsync * service all the PCI buses.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @returns VBox status.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @param pDevIns Device instance of the first bus.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @remarks Caller enters the PDM critical section.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** The name of the SetIrq RC entry point. */
b0db50948c349fa76655abf252f7946b515e8204vboxsync /** The name of the SetIrq R0 entry point. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Pointer to a PCI bus registration structure. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Current PDMPCIBUSREG version number. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * PCI Bus RC helpers.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef struct PDMPCIHLPRC
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Set an ISA IRQ.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns PCI device instance.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param iIrq IRQ number to set.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync * @thread EMT only.
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Set an I/O-APIC IRQ.
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync * @param pDevIns PCI device instance.
a39ea3668b7019c23a68936259545f9b71bce1aavboxsync * @param iIrq IRQ number to set.
0db6a029780d9f9b347500e117320a8d5661efe5vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
da3503c04ce76e653401396fe2795a9bc2427a1dvboxsync * @param uTagSrc The IRQ tag and source (for tracing).
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * @thread EMT only.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
cab115cfa31c584def7069312a1e23c3fc88533bvboxsync * Send an MSI.
cab115cfa31c584def7069312a1e23c3fc88533bvboxsync * @param pDevIns PCI device instance.
cab115cfa31c584def7069312a1e23c3fc88533bvboxsync * @param GCPhys Physical address MSI request was written.
cab115cfa31c584def7069312a1e23c3fc88533bvboxsync * @param uValue Value written.
cab115cfa31c584def7069312a1e23c3fc88533bvboxsync * @param uTagSrc The IRQ tag and source (for tracing).
cab115cfa31c584def7069312a1e23c3fc88533bvboxsync * @thread EMT only.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * Acquires the PDM lock.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @returns VINF_SUCCESS on success.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @returns rc if we failed to acquire the lock.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param pDevIns The PCI device instance.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param rc What to return if we fail to acquire the lock.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * Releases the PDM lock.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param pDevIns The PCI device instance.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync /** Just a safety precaution. */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync/** Pointer to PCI helpers. */
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync/** Pointer to const PCI helpers. */
71f6a34b72f9cc873da208630959de49df1a28a5vboxsynctypedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync/** Current PDMPCIHLPRC version number. */
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * PCI Bus R0 helpers.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsynctypedef struct PDMPCIHLPR0
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * Set an ISA IRQ.
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync * @param pDevIns PCI device instance.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param iIrq IRQ number to set.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @thread EMT only.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * Set an I/O-APIC IRQ.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param pDevIns PCI device instance.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param iIrq IRQ number to set.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @thread EMT only.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * Send an MSI.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param pDevIns PCI device instance.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param GCPhys Physical address MSI request was written.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param uValue Value written.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @thread EMT only.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * Acquires the PDM lock.
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * @returns VINF_SUCCESS on success.
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * @returns rc if we failed to acquire the lock.
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * @param pDevIns The PCI device instance.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param rc What to return if we fail to acquire the lock.
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * Releases the PDM lock.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync * @param pDevIns The PCI device instance.
0c4004948fca34f2db87e7b38013137e9472c306vboxsync DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
0c4004948fca34f2db87e7b38013137e9472c306vboxsync /** Just a safety precaution. */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync/** Pointer to PCI helpers. */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync/** Pointer to const PCI helpers. */
0c4004948fca34f2db87e7b38013137e9472c306vboxsynctypedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync/** Current PDMPCIHLPR0 version number. */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * PCI device helpers.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsynctypedef struct PDMPCIHLPR3
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * Set an ISA IRQ.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param pDevIns The PCI device instance.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param iIrq IRQ number to set.
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * Set an I/O-APIC IRQ.
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * @param pDevIns The PCI device instance.
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * @param iIrq IRQ number to set.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Send an MSI.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns PCI device instance.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param GCPhys Physical address MSI request was written.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param uValue Value written.
e74eef731a813e4e06680c587a6759b9974b29c9vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
8cd2f2e64725096acb682f34a5568b7fb816eda7vboxsync * Checks if the given address is an MMIO2 base address or not.
e74eef731a813e4e06680c587a6759b9974b29c9vboxsync * @returns true/false accordingly.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns The PCI device instance.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pOwner The owner of the memory, optional.
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync * @param GCPhys The address to check.
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync * Gets the address of the RC PCI Bus helpers.
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync * This should be called at both construction and relocation time
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync * to obtain the correct address of the RC helpers.
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync * @returns RC pointer to the PCI Bus helpers.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns Device instance of the PCI Bus.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @thread EMT only.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Gets the address of the R0 PCI Bus helpers.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * This should be called at both construction and relocation time
4c42ef40805493bd6d76103b90f71bcd6dbc0f00vboxsync * to obtain the correct address of the R0 helpers.
c28fa006ba669ad8f26ae31d00a338379c04ea1bvboxsync * @returns R0 pointer to the PCI Bus helpers.
e74eef731a813e4e06680c587a6759b9974b29c9vboxsync * @param pDevIns Device instance of the PCI Bus.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @thread EMT only.
65697a26b524640b83828b715160c798c43a0424vboxsync DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
65697a26b524640b83828b715160c798c43a0424vboxsync * Acquires the PDM lock.
65697a26b524640b83828b715160c798c43a0424vboxsync * @returns VINF_SUCCESS on success.
65697a26b524640b83828b715160c798c43a0424vboxsync * @returns Fatal error on failure.
65697a26b524640b83828b715160c798c43a0424vboxsync * @param pDevIns The PCI device instance.
65697a26b524640b83828b715160c798c43a0424vboxsync * @param rc Dummy for making the interface identical to the RC and R0 versions.
65697a26b524640b83828b715160c798c43a0424vboxsync DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Releases the PDM lock.
a8139954a84d6e9090dd3a8371aa788351d45bc3vboxsync * @param pDevIns The PCI device instance.
a8139954a84d6e9090dd3a8371aa788351d45bc3vboxsync DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
cab115cfa31c584def7069312a1e23c3fc88533bvboxsync /** Just a safety precaution. */
4c42ef40805493bd6d76103b90f71bcd6dbc0f00vboxsync/** Pointer to PCI helpers. */
4c42ef40805493bd6d76103b90f71bcd6dbc0f00vboxsync/** Pointer to const PCI helpers. */
4c42ef40805493bd6d76103b90f71bcd6dbc0f00vboxsynctypedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
4c42ef40805493bd6d76103b90f71bcd6dbc0f00vboxsync/** Current PDMPCIHLPR3 version number. */
4c42ef40805493bd6d76103b90f71bcd6dbc0f00vboxsync#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
4c42ef40805493bd6d76103b90f71bcd6dbc0f00vboxsync * Programmable Interrupt Controller registration structure.
4c42ef40805493bd6d76103b90f71bcd6dbc0f00vboxsynctypedef struct PDMPICREG
4c42ef40805493bd6d76103b90f71bcd6dbc0f00vboxsync /** Structure version number. PDM_PICREG_VERSION defines the current version. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Set the an IRQ.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns Device instance of the PIC.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param iIrq IRQ number to set.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param uTagSrc The IRQ tag and source (for tracing).
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @remarks Caller enters the PDM critical section.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Get a pending interrupt.
da3503c04ce76e653401396fe2795a9bc2427a1dvboxsync * @returns Pending interrupt number.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns Device instance of the PIC.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param puTagSrc Where to return the IRQ tag and source.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @remarks Caller enters the PDM critical section.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
da3503c04ce76e653401396fe2795a9bc2427a1dvboxsync /** The name of the RC SetIrq entry point. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** The name of the RC GetInterrupt entry point. */
cba6719bd64ec749967bbe931230452664109857vboxsync /** The name of the R0 SetIrq entry point. */
9b789c281103a2489742bf32f6ab500e38b2ecd5vboxsync /** The name of the R0 GetInterrupt entry point. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Pointer to a PIC registration structure. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync/** Current PDMPICREG version number. */
65697a26b524640b83828b715160c798c43a0424vboxsync#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync * PIC RC helpers.
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef struct PDMPICHLPRC
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
9b789c281103a2489742bf32f6ab500e38b2ecd5vboxsync * Set the interrupt force action flag.
9b789c281103a2489742bf32f6ab500e38b2ecd5vboxsync * @param pDevIns Device instance of the PIC.
c91345f92b829d3fba05ce7a97206d83c5183ce0vboxsync DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Clear the interrupt force action flag.
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync * @param pDevIns Device instance of the PIC.
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * Acquires the PDM lock.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @returns VINF_SUCCESS on success.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @returns rc if we failed to acquire the lock.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param pDevIns The PIC device instance.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * @param rc What to return if we fail to acquire the lock.
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync * Releases the PDM lock.
b0db50948c349fa76655abf252f7946b515e8204vboxsync * @param pDevIns The PIC device instance.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Just a safety precaution. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** Pointer to PIC RC helpers. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** Pointer to const PIC RC helpers. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsynctypedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** Current PDMPICHLPRC version number. */
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * PIC R0 helpers.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsynctypedef struct PDMPICHLPR0
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Set the interrupt force action flag.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns Device instance of the PIC.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync * Clear the interrupt force action flag.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param pDevIns Device instance of the PIC.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * Acquires the PDM lock.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @returns VINF_SUCCESS on success.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @returns rc if we failed to acquire the lock.
cba6719bd64ec749967bbe931230452664109857vboxsync * @param pDevIns The PIC device instance.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * @param rc What to return if we fail to acquire the lock.
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
cba6719bd64ec749967bbe931230452664109857vboxsync * Releases the PDM lock.
cba6719bd64ec749967bbe931230452664109857vboxsync * @param pDevIns The PCI device instance.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
} PDMPICHLPR0;
typedef struct PDMPICHLPR3
} PDMPICHLPR3;
typedef struct PDMAPICREG
DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
const char *pszGetInterruptRC;
const char *pszHasPendingIrqRC;
const char *pszSetBaseRC;
const char *pszGetBaseRC;
const char *pszSetTPRRC;
const char *pszGetTPRRC;
const char *pszWriteMSRRC;
const char *pszReadMSRRC;
const char *pszBusDeliverRC;
const char *pszLocalInterruptRC;
const char *pszGetInterruptR0;
const char *pszHasPendingIrqR0;
const char *pszSetBaseR0;
const char *pszGetBaseR0;
const char *pszSetTPRR0;
const char *pszGetTPRR0;
const char *pszWriteMSRR0;
const char *pszReadMSRR0;
const char *pszBusDeliverR0;
const char *pszLocalInterruptR0;
} PDMAPICREG;
typedef enum PDMAPICVERSION
typedef enum PDMAPICIRQ
PDMAPICIRQ_INVALID = 0,
} PDMAPICIRQ;
typedef struct PDMAPICHLPRC
DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
} PDMAPICHLPRC;
typedef struct PDMAPICHLPR0
DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
} PDMAPICHLPR0;
typedef struct PDMAPICHLPR3
DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
} PDMAPICHLPR3;
typedef struct PDMIOAPICREG
DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
const char *pszSetIrqRC;
const char *pszSetIrqR0;
DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
const char *pszSendMsiRC;
const char *pszSendMsiR0;
} PDMIOAPICREG;
typedef struct PDMIOAPICHLPRC
DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
typedef struct PDMIOAPICHLPR0
DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
typedef struct PDMIOAPICHLPR3
DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
typedef struct PDMHPETREG
} PDMHPETREG;
typedef struct PDMHPETHLPRC
} PDMHPETHLPRC;
typedef struct PDMHPETHLPR0
} PDMHPETHLPR0;
typedef struct PDMHPETHLPR3
} PDMHPETHLPR3;
typedef struct PDMPCIRAWREG
} PDMPCIRAWREG;
typedef struct PDMPCIRAWHLPRC
typedef struct PDMPCIRAWHLPR0
typedef struct PDMPCIRAWHLPR3
#ifdef IN_RING3
typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
typedef struct PDMDMAREG
* @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
} PDMDMACREG;
typedef struct PDMDMACHLP
} PDMDMACHLP;
typedef struct PDMRTCREG
} PDMRTCREG;
typedef struct PDMRTCHLP
} PDMRTCHLP;
#ifdef IN_RING3
typedef struct PDMDEVHLPR3
DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
* Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
* @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
* This is used by the macros found in VBox/vmm/dbgftrace.h and is not
DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
} PDMDEVHLPR3;
typedef struct PDMDEVHLPRC
DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
* This is used by the macros found in VBox/vmm/dbgftrace.h and is not
} PDMDEVHLPRC;
typedef struct PDMDEVHLPR0
DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
* This is used by the macros found in VBox/vmm/dbgftrace.h and is not
} PDMDEVHLPR0;
typedef struct PDMDEVINS
#ifdef PDMDEVINSINT_DECLARED
PDMDEVINSINT s;
} Internal;
} PDMDEVINS;
#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
return VERR_PDM_DEVINS_VERSION_MISMATCH; \
if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
return rcValCfg; \
#ifdef VBOX_STRICT
# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
#ifdef VBOX_STRICT
# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
#ifdef VBOX_STRICT
# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
return rc;
DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
int rc;
return rc;
#ifdef VBOX_STRICT
# ifdef IN_RING3
int rc;
return rc;
return VINF_EM_DBG_STOP;
return VINF_SUCCESS;
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
DECLINLINE(int) PDMDevHlpPCIDevPhysRead(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
#ifdef DEBUG
DECLINLINE(int) PDMDevHlpPCIDevPhysWrite(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
#ifdef DEBUG
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
int rc;
return rc;
DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
#ifdef IN_RING3
DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
#ifdef IN_RING3
DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
#ifdef IN_RING0
typedef struct PDMDEVREGCB
} PDMDEVREGCB;