0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * EM - Execution Monitor.
c1d279fc0865b91a40b30eda02ed14f6533fe1a4vboxsync * Copyright (C) 2006-2015 Oracle Corporation
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * available from http://www.virtualbox.org. This file is free software;
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * you can redistribute it and/or modify it under the terms of the GNU
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * General Public License (GPL) as published by the Free Software
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * The contents of this file may alternatively be used under the terms
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * of the Common Development and Distribution License Version 1.0
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * VirtualBox OSE distribution, in which case the provisions of the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * CDDL are applicable instead of those of the GPL.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * You may elect to license modified versions of this file under the
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * terms and conditions of either the GPL or the CDDL or both.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/** @defgroup grp_em The Execution Monitor / Manager API
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/** Enable to allow V86 code to run in raw mode. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * The Execution Manager State.
78dea6229e0025891612cc52f77bf0b2beb7c46dvboxsync * @remarks This is used in the saved state!
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Not yet started. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Raw-mode execution. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Hardware accelerated raw-mode execution. */
0b413931f58fa8e259fdf0348aca9059f58eb620vboxsync /** Executing in IEM. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Recompiled mode execution. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Execution is halted. (waiting for interrupt) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Application processor execution is halted. (waiting for startup IPI (SIPI)) */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Execution is suspended. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The VM is terminating. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Guest debug event from raw-mode is being processed. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Guest debug event from hardware accelerated mode is being processed. */
3b1bcdfd121ea207827a9bbc4a29199676882ceavboxsync /** Guest debug event from interpreted execution mode is being processed. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Guest debug event from recompiled-mode is being processed. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Hypervisor debug event being processed. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** The VM has encountered a fatal error. (And everyone is panicing....) */
07af2710544be54d6d50a952fd3f1e19b8fe59a8vboxsync /** Executing in IEM, falling back on REM if we cannot switch back to HM or
07af2710544be54d6d50a952fd3f1e19b8fe59a8vboxsync * RAW after a short while. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Just a hack to ensure that we get a 32-bit integer. */
754dd50dc28fdae60c11ade3b41cec99a027696dvboxsync * EMInterpretInstructionCPU execution modes.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef enum
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Only supervisor code (CPL=0). */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** User-level code only. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Supervisor and user-level code (use with great care!). */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync /** Just a hack to ensure that we get a 32-bit integer. */
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(void) EMSetState(PVMCPU pVCpu, EMSTATE enmNewState);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/** @name Callback handlers for instruction emulation functions.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * These are placed here because IOM wants to use them as well.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2UINT32(void *pvParam1, uint64_t val2);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef FNEMULATEPARAM2UINT32 *PFNEMULATEPARAM2UINT32;
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2(void *pvParam1, size_t val2);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef DECLCALLBACK(uint32_t) FNEMULATEPARAM3(void *pvParam1, uint64_t val2, size_t val3);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef DECLCALLBACK(int) FNEMULATELOCKPARAM2(void *pvParam1, uint64_t val2, RTGCUINTREG32 *pf);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsynctypedef DECLCALLBACK(int) FNEMULATELOCKPARAM3(void *pvParam1, uint64_t val2, size_t cb, RTGCUINTREG32 *pf);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * Checks if raw ring-3 execute mode is enabled.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * @returns true if enabled.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * @returns false if disabled.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * @param pVM The VM to operate on.
7847c123aebebc6d3d5c1406619cfba1ab6457c1vboxsync#define EMIsRawRing3Enabled(pVM) (!(pVM)->fRecompileUser)
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * Checks if raw ring-0 execute mode is enabled.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * @returns true if enabled.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * @returns false if disabled.
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * @param pVM The VM to operate on.
7847c123aebebc6d3d5c1406619cfba1ab6457c1vboxsync#define EMIsRawRing0Enabled(pVM) (!(pVM)->fRecompileSupervisor)
7ce6e7e8fb0eddb176361a49f53fa1bd15eaab4evboxsync * Checks if raw ring-1 execute mode is enabled.
7ce6e7e8fb0eddb176361a49f53fa1bd15eaab4evboxsync * @returns true if enabled.
7ce6e7e8fb0eddb176361a49f53fa1bd15eaab4evboxsync * @returns false if disabled.
7ce6e7e8fb0eddb176361a49f53fa1bd15eaab4evboxsync * @param pVM The VM to operate on.
7847c123aebebc6d3d5c1406619cfba1ab6457c1vboxsync# define EMIsRawRing1Enabled(pVM) ((pVM)->fRawRing1Enabled)
bb36345fae5a2e5fec487b9c9934b64797e31ac0vboxsync * Checks if execution with hardware assisted virtualization is enabled.
bb36345fae5a2e5fec487b9c9934b64797e31ac0vboxsync * @returns true if enabled.
bb36345fae5a2e5fec487b9c9934b64797e31ac0vboxsync * @returns false if disabled.
bb36345fae5a2e5fec487b9c9934b64797e31ac0vboxsync * @param pVM The VM to operate on.
7847c123aebebc6d3d5c1406619cfba1ab6457c1vboxsync#define EMIsHwVirtExecutionEnabled(pVM) (!(pVM)->fRecompileSupervisor && !(pVM)->fRecompileUser)
ae82af535a3425a343289a639468f832ec316deevboxsync * Checks if execution of supervisor code should be done in the
ae82af535a3425a343289a639468f832ec316deevboxsync * recompiler or not.
689e5df8e240bb8b9cda08de045d5b0e9ffda618vboxsync * @returns true if enabled.
689e5df8e240bb8b9cda08de045d5b0e9ffda618vboxsync * @returns false if disabled.
689e5df8e240bb8b9cda08de045d5b0e9ffda618vboxsync * @param pVM The VM to operate on.
689e5df8e240bb8b9cda08de045d5b0e9ffda618vboxsync#define EMIsSupervisorCodeRecompiled(pVM) ((pVM)->fRecompileSupervisor)
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMMDECL(void) EMSetInhibitInterruptsPC(PVMCPU pVCpu, RTGCUINTPTR PC);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVMCPU pVCpu);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretDisasCurrent(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pCpu, unsigned *pcbInstr);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretDisasOneEx(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPU pVCpu, PCPUMCTXCORE pCoreCtx, RTGCPTR pvFault);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionEx(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbWritten);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pCoreCtx,
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretIretV86ForPatm(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretCpuId(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretRdtsc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretRdtscp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(VBOXSTRICTRC) EMInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(VBOXSTRICTRC) EMInterpretMWait(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretMonitor(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretDRxWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretDRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretRdmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMInterpretWrmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(bool) EMShouldContinueAfterHalt(PVMCPU pVCpu, PCPUMCTX pCtx);
5d21962ea83b65ab66187dd4334ff231f379338cvboxsyncVMM_INT_DECL(bool) EMMonitorWaitShouldContinue(PVMCPU pVCpu, PCPUMCTX pCtx);
1f99e2fdf4c3c62af970234bef6de703148f3bfcvboxsyncVMM_INT_DECL(int) EMMonitorWaitPrepare(PVMCPU pVCpu, uint64_t rax, uint64_t rcx, uint64_t rdx, RTGCPHYS GCPhys);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMM_INT_DECL(int) EMMonitorWaitPerform(PVMCPU pVCpu, uint64_t rax, uint64_t rcx);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/** @name Assembly routines
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateCmp(uint32_t u32Param1, uint64_t u64Param2, size_t cb);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateAnd(void *pvParam1, uint64_t u64Param2, size_t cb);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateInc(void *pvParam1, size_t cb);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateDec(void *pvParam1, size_t cb);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateOr(void *pvParam1, uint64_t u64Param2, size_t cb);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(int) EMEmulateLockOr(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateXor(void *pvParam1, uint64_t u64Param2, size_t cb);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(int) EMEmulateLockXor(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateAdd(void *pvParam1, uint64_t u64Param2, size_t cb);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(int) EMEmulateLockAnd(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateSub(void *pvParam1, uint64_t u64Param2, size_t cb);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateAdcWithCarrySet(void *pvParam1, uint64_t u64Param2, size_t cb);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateBtr(void *pvParam1, uint64_t u64Param2);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(int) EMEmulateLockBtr(void *pvParam1, uint64_t u64Param2, RTGCUINTREG32 *pf);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateBts(void *pvParam1, uint64_t u64Param2);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateBtc(void *pvParam1, uint64_t u64Param2);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateCmpXchg(void *pvParam1, uint64_t *pu32Param2, uint64_t u32Param3, size_t cbSize);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateLockCmpXchg(void *pvParam1, uint64_t *pu64Param2, uint64_t u64Param3, size_t cbSize);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateCmpXchg8b(void *pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateLockCmpXchg8b(void *pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateXAdd(void *pvParam1, void *pvParam2, size_t cbOp);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsyncVMMDECL(uint32_t) EMEmulateLockXAdd(void *pvParam1, void *pvParam2, size_t cbOp);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/** @name REM locking routines
51a4e22c9ddfd1190ac1b07e07ff8653fdbc8ae5vboxsync/** @name EM_ONE_INS_FLAGS_XXX - flags for EMR3HmSingleInstruction (et al).
51a4e22c9ddfd1190ac1b07e07ff8653fdbc8ae5vboxsync/** Return when CS:RIP changes or some other important event happens.
51a4e22c9ddfd1190ac1b07e07ff8653fdbc8ae5vboxsync * This means running whole REP and LOOP $ sequences for instance. */
51a4e22c9ddfd1190ac1b07e07ff8653fdbc8ae5vboxsync/** Mask of valid flags. */
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync/** @defgroup grp_em_r3 The EM Host Context Ring-3 API
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * Command argument for EMR3RawSetMode().
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * It's possible to extend this interface to change several
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync * execution modes at once should the need arise.
dc61e6a1868aeec0d6b981e824b5cd8bf32e6b42vboxsync /** The customary invalid zero entry. */
dc61e6a1868aeec0d6b981e824b5cd8bf32e6b42vboxsync /** Whether to recompile ring-0 code or execute it in raw/hm. */
dc61e6a1868aeec0d6b981e824b5cd8bf32e6b42vboxsync /** Whether to recompile ring-3 code or execute it in raw/hm. */
0b413931f58fa8e259fdf0348aca9059f58eb620vboxsync /** Whether to only use IEM for execution. */
dc61e6a1868aeec0d6b981e824b5cd8bf32e6b42vboxsync /** End of valid value (not included). */
dc61e6a1868aeec0d6b981e824b5cd8bf32e6b42vboxsync /** The customary 32-bit type blowup. */
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMMR3DECL(int) EMR3SetExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool fEnforce);
0b413931f58fa8e259fdf0348aca9059f58eb620vboxsyncVMMR3DECL(int) EMR3QueryExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool *pfEnforced);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVMCPU pVCpu, int rc);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMMR3_INT_DECL(int) EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu);
c458d2ddeb0af8a96ea6ee8f157a9731fad2ec70vboxsyncVMMR3_INT_DECL(int) EMR3CheckRawForcedActions(PVM pVM, PVMCPU pVCpu);
51a4e22c9ddfd1190ac1b07e07ff8653fdbc8ae5vboxsyncVMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);
0b74a2f80aba476dc8be8bc1c63891fc53945986vboxsync#endif /* IN_RING3 */