vm.h revision be1bd0c05f628ebba9567d1958c164af655764ce
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * VM - The Virtual Machine, data. (VMM)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Copyright (C) 2006-2007 Sun Microsystems, Inc.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
78f327ee942771169c65c91baf789fd10e72b01avboxsync * available from http://www.virtualbox.org. This file is free software;
78f327ee942771169c65c91baf789fd10e72b01avboxsync * you can redistribute it and/or modify it under the terms of the GNU
78f327ee942771169c65c91baf789fd10e72b01avboxsync * General Public License (GPL) as published by the Free Software
78f327ee942771169c65c91baf789fd10e72b01avboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
78f327ee942771169c65c91baf789fd10e72b01avboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
78f327ee942771169c65c91baf789fd10e72b01avboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * The contents of this file may alternatively be used under the terms
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * of the Common Development and Distribution License Version 1.0
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * VirtualBox OSE distribution, in which case the provisions of the
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * CDDL are applicable instead of those of the GPL.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * You may elect to license modified versions of this file under the
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * terms and conditions of either the GPL or the CDDL or both.
dcd01485c22687cd874d69a566131b4a6a82e54bvboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * additional information or have any questions.
e24bfeec424d0e6481eccbe85ffde550384b6364vboxsync/** @defgroup grp_vm The Virtual Machine
dcd01485c22687cd874d69a566131b4a6a82e54bvboxsync * The state of a Virtual CPU.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * The basic state indicated here is whether the CPU has been started or not. In
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * addition, there are sub-states when started for assisting scheduling (GVMM
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * The transision out of the STOPPED state is done by a vmR3PowerOn.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * The transision back to the STOPPED state is done by vmR3PowerOff.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
1f2b5fc378de7ce78fee422ffb66635630f23016vboxsync * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
1f2b5fc378de7ce78fee422ffb66635630f23016vboxsync /** The customary invalid zero. */
1f2b5fc378de7ce78fee422ffb66635630f23016vboxsync /** Virtual CPU has not yet been started. */
1f2b5fc378de7ce78fee422ffb66635630f23016vboxsync /** CPU started. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Executing guest code and can be poked. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Executing guest code in the recompiler. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Halted. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** The end of valid virtual CPU states. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Ensure 32-bit type. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Per virtual CPU data.
3b3bc8a9383a065307e540b83fc3a3d6c548a082vboxsynctypedef struct VMCPU
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Per CPU forced action.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * See the VMCPU_FF_* \#defines. Updated atomically. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** The CPU state. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Pointer to the ring-3 UVMCPU structure. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Ring-3 Host Context VM Pointer. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Ring-0 Host Context VM Pointer. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Raw-mode Context VM Pointer. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** The CPU ID.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * This is the index into the VM::aCpu array. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** The native thread handle. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Which host CPU ID is this EMT running on.
d97357e2036109245c83ba553d0290212e28ea40vboxsync * Only valid when in RC or HWACCMR0 with scheduling disabled. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Align the next bit on a 64-byte boundary and make sure it starts at the same
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * offset in both 64-bit and 32-bit builds.
3b3bc8a9383a065307e540b83fc3a3d6c548a082vboxsync * @remarks The aligments of the members that are larger than 48 bytes should be
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * 64-byte for cache line reasons. structs containing small amounts of
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * data could be lumped together at the end with a < 64 byte padding
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * following it (to grow into and align the struct size).
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync uint8_t abAlignment1[HC_ARCH_BITS == 32 ? 28 : 12];
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** CPUM part. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** HWACCM part. */
3b3bc8a9383a065307e540b83fc3a3d6c548a082vboxsync /** EM part. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync /** TRPM part. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** TM part. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** VMM part. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** PDM part. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** IOM part. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** DBGF part.
2868a4e01e366cc5b7228503675dbbf3ecdeba2cvboxsync * @todo Combine this with other tiny structures. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** Align the following members on page boundrary. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync /** PGM part. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @name Operations on VMCPU::enmState
1f2b5fc378de7ce78fee422ffb66635630f23016vboxsync/** Gets the VMCPU state. */
3b3bc8a9383a065307e540b83fc3a3d6c548a082vboxsync#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
1f2b5fc378de7ce78fee422ffb66635630f23016vboxsync/** Sets the VMCPU state. */
1f2b5fc378de7ce78fee422ffb66635630f23016vboxsync ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Cmpares and sets the VMCPU state. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Checks the VMCPU state. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync } while (0)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Tests if the state means that the CPU is started. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Tests if the state means that the CPU is stopped. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** The name of the Guest Context VMM Core module. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** The name of the Ring 0 Context VMM Core module. */
3c3d0383bb6ce1db26a5d4ca83da998bbac6eeb5vboxsync/** VM Forced Action Flags.
d97357e2036109245c83ba553d0290212e28ea40vboxsync * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
d97357e2036109245c83ba553d0290212e28ea40vboxsync * action mask of a VM.
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** The virtual sync clock has been stopped, go to TM until it has been
d97357e2036109245c83ba553d0290212e28ea40vboxsync * restarted... */
ebc7c1b822f7cde4e2ed4c54da127eb7a3a28e7dvboxsync/** PDM Queues are pending. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** The bit number for VM_FF_PDM_QUEUES. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** PDM DMA transfers are pending. */
26809165876a75147696a496b69185a6aecbb8b0vboxsync/** The bit number for VM_FF_PDM_DMA. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** This action forces the VM to call DBGF so DBGF can service debugger
26809165876a75147696a496b69185a6aecbb8b0vboxsync * requests in the emulation thread.
d97357e2036109245c83ba553d0290212e28ea40vboxsync * This action flag stays asserted till DBGF clears it.*/
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** The bit number for VM_FF_DBGF. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** This action forces the VM to service pending requests from other
d97357e2036109245c83ba553d0290212e28ea40vboxsync * thread or requests which must be executed in another context. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** Terminate the VM immediately. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Reset the VM. (postponed) */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** The bit number for VM_FF_RESET. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** EMT rendezvous in VMM. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** PGM needs to allocate handy pages. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** PGM is out of memory.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Abandon all loops and code paths which can be resumed and get up to the EM
3b3bc8a9383a065307e540b83fc3a3d6c548a082vboxsync * loops. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** REM needs to be informed about handler changes. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Suspend the VM - debug only. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** This action forces the VM to check any pending interrups on the APIC. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** This action forces the VM to check any pending interrups on the PIC. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** This action forces the VM to schedule and run pending timer (TM).
d97357e2036109245c83ba553d0290212e28ea40vboxsync * @remarks Don't move - PATM compatability. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** This action forces the VM to check any pending NMIs. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** This action forces the VM to check any pending SMIs. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** PDM critical section unlocking is pending, process promptly upon return to R3. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** This action forces the VM to service pending requests from other
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * thread or requests which must be executed in another context. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** This action forces the VM to resync the page tables before going
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * back to execute guest code. (GLOBAL FLUSH) */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * (NON-GLOBAL FLUSH) */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Check for pending TLB shootdown actions. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Check for pending TLB flush action. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** The bit number for VMCPU_FF_TLB_FLUSH. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Check the interupt and trap gates */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Check Guest's TSS ring 0 stack */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Check Guest's GDT table */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Check Guest's LDT table */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** CSAM needs to scan the page that's being executed */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** CSAM needs to do some homework. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** Force return to Ring-3. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** Externally VM forced actions. Used to quit the idle/wait loop. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** Externally forced VM actions. Used to quit the idle/wait loop. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST | VMCPU_FF_TIMER)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** High priority VM pre-execution actions. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC | VM_FF_DEBUG_SUSPEND \
d97357e2036109245c83ba553d0290212e28ea40vboxsync | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** High priority VMCPU pre-execution actions. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 \
d97357e2036109245c83ba553d0290212e28ea40vboxsync | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
d97357e2036109245c83ba553d0290212e28ea40vboxsync | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** High priority VM pre raw-mode execution mask. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** High priority VMCPU pre raw-mode execution mask. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
d97357e2036109245c83ba553d0290212e28ea40vboxsync | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** High priority post-execution actions. */
d97357e2036109245c83ba553d0290212e28ea40vboxsync#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** High priority post-execution actions. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT|VMCPU_FF_CSAM_PENDING_ACTION)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Normal priority VM post-execution actions. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_RESET | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Normal priority VMCPU post-execution actions. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Normal priority VM actions. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY | VM_FF_EMT_RENDEZVOUS)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** Normal priority VMCPU actions. */
e4e2d49b574b44c06b923b86fbfc12253d58e310vboxsync#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
e4e2d49b574b44c06b923b86fbfc12253d58e310vboxsync/** Flags to clear before resuming guest execution. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** VM Flags that cause the HWACCM loops to go back to ring-3. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
e4e2d49b574b44c06b923b86fbfc12253d58e310vboxsync/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** All the forced VM flags. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** All the forced VMCPU flags. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** All the forced VM flags. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NO_MEMORY)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** All the forced VMCPU flags. */
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_PDM_CRITSECT))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_FF_SET
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Sets a force action flag.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVM VM Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlag The flag to set.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync } while (0)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VMCPU_FF_SET
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Sets a force action flag for the given VCPU.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVCpu VMCPU Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlag The flag to set.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_FF_CLEAR
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Clears a force action flag.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVM VM Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlag The flag to clear.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
945e2415c4f3b92c25b27f5568cd94e281353e5fvboxsync do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
945e2415c4f3b92c25b27f5568cd94e281353e5fvboxsync } while (0)
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VMCPU_FF_CLEAR
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Clears a force action flag for the given VCPU.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVCpu VMCPU Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlag The flag to clear.
945e2415c4f3b92c25b27f5568cd94e281353e5fvboxsync#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_FF_ISSET
2bb528b255ed2d743bb36b48b400447012e8f6dbvboxsync * Checks if a force action flag is set.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVM VM Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlag The flag to check.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
d97357e2036109245c83ba553d0290212e28ea40vboxsync/** @def VMCPU_FF_ISSET
d97357e2036109245c83ba553d0290212e28ea40vboxsync * Checks if a force action flag is set for the given VCPU.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVCpu VMCPU Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlag The flag to check.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_FF_ISPENDING
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Checks if one or more force action in the specified set is pending.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVM VM Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlags The flags to check for.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_FF_TESTANDCLEAR
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Checks if one (!) force action in the specified set is pending and clears it atomically
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @returns true if the bit was set.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @returns false if the bit was clear.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVM VM Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param iBit Bit position to check and clear
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VMCPU_FF_TESTANDCLEAR
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Checks if one (!) force action in the specified set is pending and clears it atomically
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @returns true if the bit was set.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @returns false if the bit was clear.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVCpu VMCPU Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param iBit Bit position to check and clear
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VMCPU_FF_ISPENDING
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Checks if one or more force action in the specified set is pending for the given VCPU.
d97357e2036109245c83ba553d0290212e28ea40vboxsync * @param pVCpu VMCPU Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlags The flags to check for.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_FF_ISPENDING
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Checks if one or more force action in the specified set is pending while one
85668909c68b5d0e67c89d6042535b41c4bffeccvboxsync * or more other ones are not.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVM VM Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlags The flags to check for.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fExcpt The flags that should not be set.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VMCPU_FF_IS_PENDING_EXCEPT
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Checks if one or more force action in the specified set is pending for the given
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * VCPU while one or more other ones are not.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param pVCpu VMCPU Handle.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fFlags The flags to check for.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @param fExcpt The flags that should not be set.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_IS_EMT
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Checks if the current thread is the emulation thread (EMT).
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * @remark The ring-0 variation will need attention if we expand the ring-0
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * code to let threads other than EMT mess around with the VM.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VMCPU_IS_EMT
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Checks if the current thread is the emulation thread (EMT) for the specified
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * virtual CPU.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_ASSERT_EMT
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Asserts that the current thread IS the emulation thread (EMT).
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
3b3bc8a9383a065307e540b83fc3a3d6c548a082vboxsync/** @def VMCPU_ASSERT_EMT
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Asserts that the current thread IS the emulation thread (EMT) of the
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * specified virtual CPU.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_ASSERT_EMT_RETURN
a6fc0ecba4e98bb619fc1d42bcdb4c37353ebf8evboxsync * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VMCPU_ASSERT_EMT_RETURN
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
3b3bc8a9383a065307e540b83fc3a3d6c548a082vboxsync# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
3b3bc8a9383a065307e540b83fc3a3d6c548a082vboxsync/** @def VM_ASSERT_EMT0
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Asserts that the current thread IS emulation thread \#0 (EMT0).
3b3bc8a9383a065307e540b83fc3a3d6c548a082vboxsync#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_ASSERT_EMT0_RETURN
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * it isn't.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Asserts that the current thread is NOT the emulation thread.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_ASSERT_STATE_RETURN
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Asserts a certain VM state.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_ASSERT_STATE_RETURN
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync * Asserts a certain VM state and returns if it doesn't match.
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync AssertMsgReturn((pVM)->enmVMState == (_enmState), \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
dee9e52b1688c0617890cbbd8a8488f9f315d1b7vboxsync/** @def VM_ASSERT_VALID_EXT_RETURN
(rc))
("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
(rc))
typedef struct VM
bool fRawR3Enabled;
bool fRawR0Enabled;
bool fPATMEnabled;
bool fCSAMEnabled;
bool fHWACCMEnabled;
bool fHwVirtExtForced;
bool fPARAVEnabled;
#ifdef ___CPUMInternal_h
struct CPUM s;
} cpum;
#ifdef ___VMMInternal_h
struct VMM s;
} vmm;
#ifdef ___PGMInternal_h
struct PGM s;
} pgm;
#ifdef ___HWACCMInternal_h
struct HWACCM s;
} hwaccm;
#ifdef ___TRPMInternal_h
struct TRPM s;
} trpm;
#ifdef ___SELMInternal_h
struct SELM s;
} selm;
#ifdef ___MMInternal_h
struct MM s;
} mm;
#ifdef ___PDMInternal_h
struct PDM s;
} pdm;
#ifdef ___IOMInternal_h
struct IOM s;
} iom;
#ifdef ___PATMInternal_h
struct PATM s;
} patm;
#ifdef ___CSAMInternal_h
struct CSAM s;
} csam;
#ifdef ___EMInternal_h
struct EM s;
} em;
#ifdef ___TMInternal_h
struct TM s;
} tm;
#ifdef ___DBGFInternal_h
struct DBGF s;
} dbgf;
#ifdef ___SSMInternal_h
struct SSM s;
} ssm;
#ifdef ___REMInternal_h
struct REM s;
* Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
} rem;
#ifdef ___VMInternal_h
struct VMINT s;
} vm;
#ifdef ___CFGMInternal_h
struct CFGM s;
} cfgm;
#ifdef ___PARAVInternal_h
struct PARAV s;
} parav;
} VM;
#ifdef IN_RC