; $Id$

;; @file

; SUP - Support Library, assembly definitions.

;

;

; Copyright (C) 2006-2014 Oracle Corporation

;

; This file is part of VirtualBox Open Source Edition (OSE), as

; available from http://www.virtualbox.org. This file is free software;

; you can redistribute it and/or modify it under the terms of the GNU

; General Public License (GPL) as published by the Free Software

; Foundation, in version 2 as it comes in the "COPYING" file of the

; VirtualBox OSE distribution. VirtualBox OSE is distributed in the

; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.

;

; The contents of this file may alternatively be used under the terms

; of the Common Development and Distribution License Version 1.0

; (CDDL) only, as it comes in the "COPYING.CDDL" file of the

; VirtualBox OSE distribution, in which case the provisions of the

; CDDL are applicable instead of those of the GPL.

;

; You may elect to license modified versions of this file under the

; terms and conditions of either the GPL or the CDDL or both.

;

%ifndef ___VBox_sup_mac

%define ___VBox_sup_mac

struc SUPGIPCPU

.u32TransactionId resd 1

.u32UpdateIntervalTSC resd 1

.u64NanoTS resq 1

.u64TSC resq 1

.u64CpuHz resq 1

.i64TSCDelta resq 1

.cErrors resd 1

.iTSCHistoryHead resd 1

.au32TSCHistory resd 8

.u32PrevUpdateIntervalNS resd 1

.au32Reserved0 resd (5)

.u64TSCSample resq 1

.au32Reserved1 resd (1)

.enmState resd 1

.idCpu resd 1

.iCpuSet resw 1

.idApic resw 1

endstruc

%define SUPGLOBALINFOPAGE_MAGIC 0x19590106

struc SUPGLOBALINFOPAGE

.u32Magic resd 1

.u32Version resd 1

.u32Mode resd 1

.cCpus resw 1

.cPages resw 1

.u32UpdateHz resd 1

.u32UpdateIntervalNS resd 1

.u64NanoTSLastUpdateHz resq 1

.u64CpuHz resq 1

.OnlineCpuSet resq 4

.PresentCpuSet resq 4

.PossibleCpuSet resq 4

.cOnlineCpus resw 1

.cPresentCpus resw 1

.cPossibleCpus resw 1

.u16Padding0 resw 1

.idCpuMax resd 1

.fOsTscDeltasInSync resb 1

.au8Padding0 resb 3

.au32Padding1 resd 26

.aiCpuFromApicId resw 256

.aiCpuFromCpuSetIdx resw 256

.aCPUs resb SUPGIPCPU_size

endstruc

struc SUPDRVTRACERUSRCTX32

.idProbe resd 1

.cBits resb 1

.abReserved resb 3

.u.X86.uVtgProbeLoc resd 1

.u.X86.aArgs resd 20

.u.X86.eip resd 1

.u.X86.eflags resd 1

.u.X86.eax resd 1

.u.X86.ecx resd 1

.u.X86.edx resd 1

.u.X86.ebx resd 1

.u.X86.esp resd 1

.u.X86.ebp resd 1

.u.X86.esi resd 1

.u.X86.edi resd 1

.u.X86.cs resw 1

.u.X86.ss resw 1

.u.X86.ds resw 1

.u.X86.es resw 1

.u.X86.fs resw 1

.u.X86.gs resw 1

endstruc

struc SUPDRVTRACERUSRCTX64

.idProbe resd 1

.cBits resb 1

.abReserved resb 3

.u.Amd64.uVtgProbeLoc resq 1

.u.Amd64.aArgs resq 10

.u.Amd64.rip resq 1

.u.Amd64.rflags resq 1

.u.Amd64.rax resq 1

.u.Amd64.rcx resq 1

.u.Amd64.rdx resq 1

.u.Amd64.rbx resq 1

.u.Amd64.rsp resq 1

.u.Amd64.rbp resq 1

.u.Amd64.rsi resq 1

.u.Amd64.rdi resq 1

.u.Amd64.r8 resq 1

.u.Amd64.r9 resq 1

.u.Amd64.r10 resq 1

.u.Amd64.r11 resq 1

.u.Amd64.r12 resq 1

.u.Amd64.r13 resq 1

.u.Amd64.r14 resq 1

.u.Amd64.r15 resq 1

endstruc

;;

; Macro to apply per-CPU TSC delta to the TSC value read in through rdtsc.

;

; @param %1 The pSupGipCpu pointer

; @remarks edx:eax contains the 64-bit TSC value to apply the delta to.

%macro SUPTscDeltaApply 1

; Check if we have a valid TSC-delta, i.e. != INT64_MAX.

cmp dword [%1 + SUPGIPCPU.i64TSCDelta], 0xffffffff

jne %%valid_delta

cmp dword [%1 + SUPGIPCPU.i64TSCDelta + 4], 0x7fffffff

je %%done

%%valid_delta:

; Subtract the delta from edx:eax

sub eax, dword [%1 + SUPGIPCPU.i64TSCDelta]

sbb edx, dword [%1 + SUPGIPCPU.i64TSCDelta + 4]

%%done:

%endmacro

%endif