pgm.h revision 13b9db9ae2c12b6c4e00eda5c79772d57a0d29e1
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** @file
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * PGM - Page Monitor / Monitor. (VMM)
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/*
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
b52c24239bed9dc9f284d829b6059073afcb1894vboxsync * available from http://www.virtualbox.org. This file is free software;
b52c24239bed9dc9f284d829b6059073afcb1894vboxsync * you can redistribute it and/or modify it under the terms of the GNU
b52c24239bed9dc9f284d829b6059073afcb1894vboxsync * General Public License (GPL) as published by the Free Software
b52c24239bed9dc9f284d829b6059073afcb1894vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
b52c24239bed9dc9f284d829b6059073afcb1894vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
b52c24239bed9dc9f284d829b6059073afcb1894vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
b52c24239bed9dc9f284d829b6059073afcb1894vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * The contents of this file may alternatively be used under the terms
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * of the Common Development and Distribution License Version 1.0
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * VirtualBox OSE distribution, in which case the provisions of the
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * CDDL are applicable instead of those of the GPL.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * You may elect to license modified versions of this file under the
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * terms and conditions of either the GPL or the CDDL or both.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * additional information or have any questions.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#ifndef ___VBox_pgm_h
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#define ___VBox_pgm_h
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#include <VBox/cdefs.h>
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#include <VBox/types.h>
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#include <VBox/sup.h>
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#include <VBox/vmapi.h>
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#include <VBox/x86.h>
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#include <VBox/hwacc_vmx.h>
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncRT_C_DECLS_BEGIN
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** @defgroup grp_pgm The Page Monitor / Manager API
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @{
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Chunk size for dynamically allocated physical memory. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#define PGM_DYNAMIC_CHUNK_SIZE (1*1024*1024)
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Shift GC physical address by 20 bits to get the offset into the pvHCChunkHC array. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#define PGM_DYNAMIC_CHUNK_SHIFT 20
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Dynamic chunk offset mask. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#define PGM_DYNAMIC_CHUNK_OFFSET_MASK 0xfffff
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Dynamic chunk base mask. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#define PGM_DYNAMIC_CHUNK_BASE_MASK (~(RTGCPHYS)PGM_DYNAMIC_CHUNK_OFFSET_MASK)
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * FNPGMRELOCATE callback mode.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef enum PGMRELOCATECALL
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync{
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** The callback is for checking if the suggested address is suitable. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMRELOCATECALL_SUGGEST = 1,
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** The callback is for executing the relocation. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMRELOCATECALL_RELOCATE
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync} PGMRELOCATECALL;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * Callback function which will be called when PGM is trying to find
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * a new location for the mapping.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * The callback is called in two modes, 1) the check mode and 2) the relocate mode.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * In 1) the callback should say if it objects to a suggested new location. If it
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * accepts the new location, it is called again for doing it's relocation.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @returns true if the location is ok.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @returns false if another location should be found.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param GCPtrOld The old virtual address.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param GCPtrNew The new virtual address.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param enmMode Used to indicate the callback mode.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvUser User argument.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @remark The return value is no a failure indicator, it's an acceptance
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * indicator. Relocation can not fail!
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef DECLCALLBACK(bool) FNPGMRELOCATE(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Pointer to a relocation callback function. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef FNPGMRELOCATE *PFNPGMRELOCATE;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * Physical page access handler type.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef enum PGMPHYSHANDLERTYPE
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync{
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** MMIO range. Pages are not present, all access is done in interpreter or recompiler. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMPHYSHANDLERTYPE_MMIO = 1,
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** Handler all write access to a physical page range. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMPHYSHANDLERTYPE_PHYSICAL_WRITE,
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** Handler all access to a physical page range. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMPHYSHANDLERTYPE_PHYSICAL_ALL
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync} PGMPHYSHANDLERTYPE;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * \#PF Handler callback for physical access handler ranges in RC.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @returns VBox status code (appropriate for RC return).
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pVM VM Handle.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param uErrorCode CPU Error code.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pRegFrame Trap register frame.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * NULL on DMA and other non CPU access.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvFault The fault address (cr2).
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvUser User argument.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef DECLCALLBACK(int) FNPGMRCPHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Pointer to PGM access callback. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef FNPGMRCPHYSHANDLER *PFNPGMRCPHYSHANDLER;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * \#PF Handler callback for physical access handler ranges in R0.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @returns VBox status code (appropriate for R0 return).
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pVM VM Handle.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param uErrorCode CPU Error code.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pRegFrame Trap register frame.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * NULL on DMA and other non CPU access.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvFault The fault address (cr2).
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvUser User argument.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef DECLCALLBACK(int) FNPGMR0PHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Pointer to PGM access callback. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef FNPGMR0PHYSHANDLER *PFNPGMR0PHYSHANDLER;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * Guest Access type
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef enum PGMACCESSTYPE
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync{
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** Read access. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMACCESSTYPE_READ = 1,
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** Write access. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMACCESSTYPE_WRITE
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync} PGMACCESSTYPE;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * \#PF Handler callback for physical access handler ranges (MMIO among others) in HC.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * The handler can not raise any faults, it's mainly for monitoring write access
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * to certain pages.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @returns VINF_SUCCESS if the handler have carried out the operation.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pVM VM Handle.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param GCPhys The physical address the guest is writing to.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvPhys The HC mapping of that address.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvBuf What the guest is reading/writing.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param cbBuf How much it's reading/writing.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param enmAccessType The access type.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvUser User argument.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef DECLCALLBACK(int) FNPGMR3PHYSHANDLER(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Pointer to PGM access callback. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef FNPGMR3PHYSHANDLER *PFNPGMR3PHYSHANDLER;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * Virtual access handler type.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsynctypedef enum PGMVIRTHANDLERTYPE
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync{
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** Write access handled. */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMVIRTHANDLERTYPE_WRITE = 1,
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** All access handled. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMVIRTHANDLERTYPE_ALL,
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** Hypervisor write access handled.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * This is used to catch the guest trying to write to LDT, TSS and any other
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * system structure which the brain dead intel guys let unprivilegde code find. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMVIRTHANDLERTYPE_HYPERVISOR
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync} PGMVIRTHANDLERTYPE;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * \#PF Handler callback for virtual access handler ranges, RC.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * Important to realize that a physical page in a range can have aliases, and
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * for ALL and WRITE handlers these will also trigger.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @returns VBox status code (appropriate for GC return).
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pVM VM Handle.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param uErrorCode CPU Error code.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @param pRegFrame Trap register frame.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvFault The fault address (cr2).
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param pvRange The base address of the handled virtual range.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @param offRange The offset of the access into this range.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * (If it's a EIP range this's the EIP, if not it's pvFault.)
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef DECLCALLBACK(int) FNPGMRCVIRTHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Pointer to PGM access callback. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef FNPGMRCVIRTHANDLER *PFNPGMRCVIRTHANDLER;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * \#PF Handler callback for virtual access handler ranges, R3.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * Important to realize that a physical page in a range can have aliases, and
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * for ALL and WRITE handlers these will also trigger.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @returns VINF_SUCCESS if the handler have carried out the operation.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
dcc837f3a6f10996beb8aa7965f67f7f6c273fb4vboxsync * @param pVM VM Handle.
dcc837f3a6f10996beb8aa7965f67f7f6c273fb4vboxsync * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @param pvPtr The HC mapping of that address.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @param pvBuf What the guest is reading/writing.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @param cbBuf How much it's reading/writing.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @param enmAccessType The access type.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @param pvUser User argument.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsynctypedef DECLCALLBACK(int) FNPGMR3VIRTHANDLER(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync/** Pointer to PGM access callback. */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsynctypedef FNPGMR3VIRTHANDLER *PFNPGMR3VIRTHANDLER;
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * \#PF Handler callback for invalidation of virtual access handler ranges.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync *
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @param pVM VM Handle.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * @param GCPtr The virtual address the guest has changed.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsynctypedef DECLCALLBACK(int) FNPGMR3VIRTINVALIDATE(PVM pVM, RTGCPTR GCPtr);
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync/** Pointer to PGM invalidation callback. */
dcc837f3a6f10996beb8aa7965f67f7f6c273fb4vboxsynctypedef FNPGMR3VIRTINVALIDATE *PFNPGMR3VIRTINVALIDATE;
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync/**
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync * Paging mode.
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsynctypedef enum PGMMODE
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync{
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** The usual invalid value. */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_INVALID = 0,
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** Real mode. */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_REAL,
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** Protected mode, no paging. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMMODE_PROTECTED,
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync /** 32-bit paging. */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync PGMMODE_32_BIT,
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** PAE paging. */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_PAE,
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** PAE paging with NX enabled. */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_PAE_NX,
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** 64-bit AMD paging (long mode). */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_AMD64,
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** 64-bit AMD paging (long mode) with NX enabled. */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_AMD64_NX,
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** Nested paging mode (shadow only; guest physical to host physical). */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_NESTED,
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** Extended paging (Intel) mode. */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_EPT,
2782c227354d0c29f08a7933a07f8aa9b30e010dvboxsync /** The max number of modes */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_MAX,
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync /** 32bit hackishness. */
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync PGMMODE_32BIT_HACK = 0x7fffffff
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync} PGMMODE;
8c1c3e6cfb2f0d0c4656d1d03ada68a8318ca11fvboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Macro for checking if the guest is using paging.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param enmMode PGMMODE_*.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @remark ASSUMES certain order of the PGMMODE_* values.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#define PGMMODE_WITH_PAGING(enmMode) ((enmMode) >= PGMMODE_32_BIT)
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/** Macro for checking if it's one of the long mode modes.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param enmMode PGMMODE_*.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#define PGMMODE_IS_LONG_MODE(enmMode) ((enmMode) == PGMMODE_AMD64_NX || (enmMode) == PGMMODE_AMD64)
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync/**
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * Is the ROM mapped (true) or is the shadow RAM mapped (false).
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync *
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @returns boolean.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync * @param enmProt The PGMROMPROT value, must be valid.
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync */
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#define PGMROMPROT_IS_ROM(enmProt) \
ad27e1d5e48ca41245120c331cc88b50464813cevboxsync ( (enmProt) == PGMROMPROT_READ_ROM_WRITE_IGNORE \
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync || (enmProt) == PGMROMPROT_READ_ROM_WRITE_RAM )
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(bool) PGMIsLocked(PVM pVM);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(bool) PGMIsLockOwner(PVM pVM);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMRegisterStringFormatTypes(void);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(void) PGMDeregisterStringFormatTypes(void);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(RTHCPHYS) PGMGetHyperCR3(PVMCPU pVCpu);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(RTHCPHYS) PGMGetNestedCR3(PVMCPU pVCpu, PGMMODE enmShadowMode);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(RTHCPHYS) PGMGetInterHCCR3(PVM pVM);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(RTHCPHYS) PGMGetInterRCCR3(PVM pVM, PVMCPU pVCpu);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(RTHCPHYS) PGMGetInter32BitCR3(PVM pVM);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(RTHCPHYS) PGMGetInterPaeCR3(PVM pVM);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(RTHCPHYS) PGMGetInterAmd64CR3(PVM pVM);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMTrap0eHandler(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMPrefetchPage(PVMCPU pVCpu, RTGCPTR GCPtrPage);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMVerifyAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMIsValidAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMInterpretInstruction(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMMap(PVM pVM, RTGCPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags);
dcc837f3a6f10996beb8aa7965f67f7f6c273fb4vboxsyncVMMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags);
dcc837f3a6f10996beb8aa7965f67f7f6c273fb4vboxsyncVMMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#ifndef IN_RING0
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(bool) PGMMapHasConflicts(PVM pVM);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMMapResolveConflicts(PVM pVM);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#endif
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#ifdef VBOX_STRICT
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(void) PGMMapCheck(PVM pVM);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync#endif
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMShwGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMShwSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMShwModifyPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMGstGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(bool) PGMGstIsPagePresent(PVMCPU pVCpu, RTGCPTR GCPtr);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMGstSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMGstModifyPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(X86PDPE) PGMGstGetPaePDPtr(PVMCPU pVCpu, unsigned iPdPt);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsync
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCPtrPage);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMFlushTLB(PVMCPU pVCpu, uint64_t cr3, bool fGlobal);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMSyncCR3(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMUpdateCR3(PVMCPU pVCpu, uint64_t cr3);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(int) PGMChangeMode(PVMCPU pVCpu, uint64_t cr0, uint64_t cr4, uint64_t efer);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(PGMMODE) PGMGetGuestMode(PVMCPU pVCpu);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(PGMMODE) PGMGetShadowMode(PVMCPU pVCpu);
730b109e93240f48a2fc4ca97c05e5f347f71ec9vboxsyncVMMDECL(PGMMODE) PGMGetHostMode(PVM pVM);
VMMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
R3PTRTYPE(const char *) pszDesc);
VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast);
VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys);
VMMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
R3PTRTYPE(const char *) pszDesc);
VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit);
VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2);
VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap);
VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap);
VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys);
VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys);
VMMDECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr);
VMMDECL(void) PGMPoolFlushPage(PVM pVM, RTGCPHYS GCPhys);
VMMDECL(bool) PGMPhysIsA20Enabled(PVMCPU pVCpu);
VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys);
VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys);
VMMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys);
VMMDECL(int) PGMPhysGCPtr2GCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
VMMDECL(int) PGMPhysGCPtr2HCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTHCPHYS pHCPhys);
VMMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM);
VMMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM);
VMMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM);
VMMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
VMMDECL(int) PGMPhysGCPtr2CCPtr(PVMCPU pVCpu, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock);
VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVMCPU pVCpu, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock);
VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock);
/**
* Checks if the lock structure is valid
*
* @param pVM The VM handle.
* @param pLock The lock structure initialized by the mapping function.
*/
DECLINLINE(bool) PGMPhysIsPageMappingLockValid(PVM pVM, PPGMPAGEMAPLOCK pLock)
{
/** @todo -> complete/change this */
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
return !!(pLock->u32Dummy);
#else
return !!(pLock->pvPage);
#endif
}
VMMDECL(int) PGMPhysGCPhys2R3Ptr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTR3PTR pR3Ptr);
#ifdef VBOX_STRICT
VMMDECL(RTR3PTR) PGMPhysGCPhys2R3PtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange);
#endif
VMMDECL(int) PGMPhysGCPtr2R3Ptr(PVMCPU pVCpu, RTGCPTR GCPtr, PRTR3PTR pR3Ptr);
VMMDECL(int) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
VMMDECL(int) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb);
VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb);
VMMDECL(int) PGMPhysSimpleReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
VMMDECL(int) PGMPhysReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
VMMDECL(int) PGMPhysWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
VMMDECL(int) PGMPhysInterpretedRead(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap);
VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, bool fRaiseTrap);
#ifdef VBOX_STRICT
VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM);
VMMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM);
VMMDECL(unsigned) PGMAssertCR3(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4);
#endif /* VBOX_STRICT */
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE)
VMMDECL(int) PGMDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv);
VMMDECL(int) PGMDynMapGCPageOff(PVM pVM, RTGCPHYS GCPhys, void **ppv);
# ifdef IN_RC
VMMDECL(int) PGMDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv);
VMMDECL(void) PGMDynLockHCPage(PVM pVM, RCPTRTYPE(uint8_t *) GCPage);
VMMDECL(void) PGMDynUnlockHCPage(PVM pVM, RCPTRTYPE(uint8_t *) GCPage);
# ifdef VBOX_STRICT
VMMDECL(void) PGMDynCheckLocks(PVM pVM);
# endif
# endif
VMMDECL(void) PGMDynMapStartAutoSet(PVMCPU pVCpu);
VMMDECL(void) PGMDynMapReleaseAutoSet(PVMCPU pVCpu);
VMMDECL(void) PGMDynMapFlushAutoSet(PVMCPU pVCpu);
VMMDECL(void) PGMDynMapMigrateAutoSet(PVMCPU pVCpu);
VMMDECL(uint32_t) PGMDynMapPushAutoSubset(PVMCPU pVCpu);
VMMDECL(void) PGMDynMapPopAutoSubset(PVMCPU pVCpu, uint32_t iPrevSubset);
#endif
#ifdef IN_RC
/** @defgroup grp_pgm_gc The PGM Guest Context API
* @ingroup grp_pgm
* @{
*/
/** @} */
#endif /* IN_RC */
#ifdef IN_RING0
/** @defgroup grp_pgm_r0 The PGM Host Context Ring-0 API
* @ingroup grp_pgm
* @{
*/
VMMR0DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM, PVMCPU pVCpu);
VMMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
VMMR0DECL(int) PGMR0DynMapInit(void);
VMMR0DECL(void) PGMR0DynMapTerm(void);
VMMR0DECL(int) PGMR0DynMapInitVM(PVM pVM);
VMMR0DECL(void) PGMR0DynMapTermVM(PVM pVM);
VMMR0DECL(int) PGMR0DynMapAssertIntegrity(void);
# endif
/** @} */
#endif /* IN_RING0 */
#ifdef IN_RING3
/** @defgroup grp_pgm_r3 The PGM Host Context Ring-3 API
* @ingroup grp_pgm
* @{
*/
VMMR3DECL(int) PGMR3Init(PVM pVM);
VMMR3DECL(int) PGMR3InitCPU(PVM pVM);
VMMR3DECL(int) PGMR3InitDynMap(PVM pVM);
VMMR3DECL(int) PGMR3InitFinalize(PVM pVM);
VMMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
VMMR3DECL(void) PGMR3Reset(PVM pVM);
VMMR3DECL(int) PGMR3Term(PVM pVM);
VMMR3DECL(int) PGMR3TermCPU(PVM pVM);
VMMR3DECL(int) PGMR3LockCall(PVM pVM);
VMMR3DECL(int) PGMR3ChangeMode(PVM pVM, PVMCPU pVCpu, PGMMODE enmGuestMode);
VMMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc);
VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb,
R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
R3PTRTYPE(const char *) pszDesc);
VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb);
VMMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc);
VMMR3DECL(int) PGMR3PhysMMIO2Deregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion);
VMMR3DECL(int) PGMR3PhysMMIO2Map(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
VMMR3DECL(int) PGMR3PhysMMIO2Unmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
VMMR3DECL(bool) PGMR3PhysMMIO2IsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys);
VMMR3DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys);
VMMR3DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr);
/** @group PGMR3PhysRegisterRom flags.
* @{ */
/** Inidicates that ROM shadowing should be enabled. */
#define PGMPHYS_ROM_FLAGS_SHADOWED RT_BIT_32(0)
/** Indicates that what pvBinary points to won't go away
* and can be used for strictness checks. */
#define PGMPHYS_ROM_FLAGS_PERMANENT_BINARY RT_BIT_32(1)
/** @} */
VMMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,
const void *pvBinary, uint32_t fFlags, const char *pszDesc);
VMMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt);
VMMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
VMMDECL(void) PGMR3PhysSetA20(PVMCPU pVCpu, bool fEnable);
/** @name PGMR3MapPT flags.
* @{ */
/** The mapping may be unmapped later. The default is permanent mappings. */
#define PGMR3MAPPT_FLAGS_UNMAPPABLE RT_BIT(0)
/** @} */
VMMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, uint32_t cb, uint32_t fFlags, PFNPGMRELOCATE pfnRelocate, void *pvUser, const char *pszDesc);
VMMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr);
VMMR3DECL(int) PGMR3FinalizeMappings(PVM pVM);
VMMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb);
VMMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb);
VMMR3DECL(int) PGMR3MappingsUnfix(PVM pVM);
VMMR3DECL(int) PGMR3MappingsDisable(PVM pVM);
VMMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages);
VMMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
VMMR3DECL(int) PGMR3HandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
PFNPGMR3PHYSHANDLER pfnHandlerR3, void *pvUserR3,
const char *pszModR0, const char *pszHandlerR0, RTR0PTR pvUserR0,
const char *pszModRC, const char *pszHandlerRC, RTRCPTR pvUserRC, const char *pszDesc);
VMMDECL(int) PGMR3HandlerVirtualRegisterEx(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,
R3PTRTYPE(PFNPGMR3VIRTINVALIDATE) pfnInvalidateR3,
R3PTRTYPE(PFNPGMR3VIRTHANDLER) pfnHandlerR3,
RCPTRTYPE(PFNPGMRCVIRTHANDLER) pfnHandlerRC,
R3PTRTYPE(const char *) pszDesc);
VMMR3DECL(int) PGMR3HandlerVirtualRegister(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,
PFNPGMR3VIRTINVALIDATE pfnInvalidateR3,
PFNPGMR3VIRTHANDLER pfnHandlerR3,
const char *pszHandlerRC, const char *pszModRC, const char *pszDesc);
VMMDECL(int) PGMHandlerVirtualChangeInvalidateCallback(PVM pVM, RTGCPTR GCPtr, R3PTRTYPE(PFNPGMR3VIRTINVALIDATE) pfnInvalidateR3);
VMMDECL(int) PGMHandlerVirtualDeregister(PVM pVM, RTGCPTR GCPtr);
VMMR3DECL(int) PGMR3PoolGrow(PVM pVM);
#ifdef ___VBox_dbgf_h /** @todo fix this! */
VMMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint64_t cr3, uint64_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp);
#endif
VMMR3DECL(int) PGMR3DumpHierarchyGC(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPHYS PhysSearch);
VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, void **ppv);
VMMR3DECL(uint8_t) PGMR3PhysReadU8(PVM pVM, RTGCPHYS GCPhys);
VMMR3DECL(uint16_t) PGMR3PhysReadU16(PVM pVM, RTGCPHYS GCPhys);
VMMR3DECL(uint32_t) PGMR3PhysReadU32(PVM pVM, RTGCPHYS GCPhys);
VMMR3DECL(uint64_t) PGMR3PhysReadU64(PVM pVM, RTGCPHYS GCPhys);
VMMR3DECL(void) PGMR3PhysWriteU8(PVM pVM, RTGCPHYS GCPhys, uint8_t Value);
VMMR3DECL(void) PGMR3PhysWriteU16(PVM pVM, RTGCPHYS GCPhys, uint16_t Value);
VMMR3DECL(void) PGMR3PhysWriteU32(PVM pVM, RTGCPHYS GCPhys, uint32_t Value);
VMMR3DECL(void) PGMR3PhysWriteU64(PVM pVM, RTGCPHYS GCPhys, uint64_t Value);
VMMR3DECL(int) PGMR3PhysReadExternal(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
VMMR3DECL(int) PGMR3PhysWriteExternal(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrExternal(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrReadOnlyExternal(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
VMMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk);
VMMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM);
VMMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM);
VMMR3DECL(void) PGMR3ReleaseOwnedLocks(PVM pVM);
VMMR3DECL(int) PGMR3CheckIntegrity(PVM pVM);
VMMR3DECL(int) PGMR3DbgR3Ptr2GCPhys(PVM pVM, RTR3PTR R3Ptr, PRTGCPHYS pGCPhys);
VMMR3DECL(int) PGMR3DbgR3Ptr2HCPhys(PVM pVM, RTR3PTR R3Ptr, PRTHCPHYS pHCPhys);
VMMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PVM pVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys);
VMMR3DECL(int) PGMR3DbgReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb, uint32_t fFlags, size_t *pcbRead);
VMMR3DECL(int) PGMR3DbgWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb, uint32_t fFlags, size_t *pcbWritten);
VMMR3DECL(int) PGMR3DbgReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, uint32_t fFlags, size_t *pcbRead);
VMMR3DECL(int) PGMR3DbgWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, uint32_t fFlags, size_t *pcbWritten);
VMMR3DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit);
VMMR3DECL(int) PGMR3DbgScanVirtual(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, RTGCPTR cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPhysHit);
/** @} */
#endif /* IN_RING3 */
RT_C_DECLS_END
/** @} */
#endif