1494N/A * Copyright (c) 2011, 2013 Intel Corporation 1494N/A * Permission is hereby granted, free of charge, to any person obtaining a 1494N/A * copy of this software and associated documentation files (the "Software"), 1494N/A * to deal in the Software without restriction, including without limitation 1494N/A * the rights to use, copy, modify, merge, publish, distribute, sublicense, 1494N/A * and/or sell copies of the Software, and to permit persons to whom the 1494N/A * Software is furnished to do so, subject to the following conditions: 1494N/A * The above copyright notice and this permission notice (including the next 1494N/A * paragraph) shall be included in all copies or substantial portions of the 1494N/A * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1494N/A * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1494N/A * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1494N/A * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1494N/A * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 1494N/A * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 1494N/A * Jesse Barnes <jbarnes@virtuousgeek.org> 1494N/A * The older chips had a separate interface for programming plane related 1494N/A * registers; newer ones are much simpler and we can use the new DRM plane 1494N/A /* Mask out pixel format bits in case we change it */ 1494N/A * If we get here one of the upper layers failed to filter 1494N/A * out the unsupported plane formats 1494N/A /* Activate double buffered register update */ 1494N/A /* Mask out pixel format bits in case we change it */ 1494N/A * IVB workaround: must disable low power watermarks for at least 1494N/A * one frame before enabling scaling. LP watermarks can be re-enabled 1494N/A * when scaling is disabled. 1494N/A /* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET 1494N/A /* potentially re-enable LP watermarks */ 1494N/A /* Can't leave the scaler enabled... */ 1494N/A /* Activate double buffered register update */ 1494N/A /* potentially re-enable LP watermarks */ 1494N/A /* Mask out pixel format bits in case we change it */ 1494N/A /* Flush double buffered register updates */ 1494N/A /* sample coordinates in 16.16 fixed point */ 1494N/A /* Pipe must be running... */ 1494N/A /* Don't modify another pipe's plane */ 1494N/A /* FIXME check all gen limits */ 1494N/A /* Sprite planes can be linear or x-tiled surfaces */ 1494N/A * FIXME the following code does a bunch of fuzzy adjustments to the 1494N/A * coordinates and sizes. We probably need some way to decide whether 1494N/A * more strict checking should be done instead. 1494N/A /* check again in case clipping clamped the results */ 1494N/A /* Make the source viewport size an exact multiple of the scaling factors. */ 1494N/A /* sanity check to make sure the src viewport wasn't enlarged */ 1494N/A * Hardware doesn't handle subpixel coordinates. 1494N/A * Adjust to (macro)pixel boundary, but be careful not to 1494N/A * increase the source viewport size, because that could 1494N/A * push the downscaling factor out of bounds. 1494N/A * Must keep src and dst the 1494N/A /* Check size restrictions when scaling */ 1494N/A /* FIXME interlacing min height is 6 */ 1494N/A * If the sprite is completely covering the primary plane, 1494N/A * we can disable the primary and save power. 1494N/A /* Note that this will apply the VT-d workaround for scanouts, 1494N/A * which is more restrictive than required for sprites. (The 1494N/A * primary plane requires 256KiB alignment with 64 PTE padding, 1494N/A * the sprite planes only require 128KiB alignment and 32 PTE padding. 1494N/A * Be sure to re-enable the primary before the sprite is no longer 1494N/A /* Unpin old obj after new one is active to avoid ugliness */ 1494N/A * It's fairly common to simply update the position of 1494N/A * an existing object. In that case, we don't need to 1494N/A * wait for vblank to avoid ugliness, we only need to 1494N/A * do the pin & ref bookkeeping. 1494N/A /* Make sure we don't try to enable both src & dest simultaneously */