1494N/A/*
1683N/A * Copyright (c) 2006, 2016, Oracle and/or its affiliates. All rights reserved.
1494N/A */
1494N/A
1494N/A/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
1494N/A */
1494N/A/*
1494N/A * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
1494N/A * Copyright (c) 2009, 2013, Intel Corporation.
1494N/A * All Rights Reserved.
1494N/A *
1494N/A * Permission is hereby granted, free of charge, to any person obtaining a
1494N/A * copy of this software and associated documentation files (the
1494N/A * "Software"), to deal in the Software without restriction, including
1494N/A * without limitation the rights to use, copy, modify, merge, publish,
1494N/A * distribute, sub license, and/or sell copies of the Software, and to
1494N/A * permit persons to whom the Software is furnished to do so, subject to
1494N/A * the following conditions:
1494N/A *
1494N/A * The above copyright notice and this permission notice (including the
1494N/A * next paragraph) shall be included in all copies or substantial portions
1494N/A * of the Software.
1494N/A *
1494N/A * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
1494N/A * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
1494N/A * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
1494N/A * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
1494N/A * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
1494N/A * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
1494N/A * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
1494N/A *
1494N/A */
1494N/A
1494N/A#include "drmP.h"
1494N/A#include "drm.h"
1494N/A#include "drm_crtc_helper.h"
1494N/A#include "drm_fb_helper.h"
1494N/A#include "drm_linux.h"
1494N/A#include "drm_mm.h"
1494N/A#include "intel_drv.h"
1494N/A#include "i915_drm.h"
1494N/A#include "i915_drv.h"
1494N/A#include "i915_io32.h"
1494N/A#include <sys/agp/agptarget_io.h>
1494N/A
1494N/A#define USE_PCI_DMA_API 0
1494N/A
1494N/A#define LP_RING(d) (&((struct drm_i915_private *)(d))->ring[RCS])
1494N/A
1494N/A#define BEGIN_LP_RING(n) \
1494N/A intel_ring_begin(LP_RING(dev_priv), (n))
1494N/A
1494N/A#define OUT_RING(x) \
1494N/A intel_ring_emit(LP_RING(dev_priv), x)
1494N/A
1494N/A#define ADVANCE_LP_RING() \
1494N/A intel_ring_advance(LP_RING(dev_priv))
1494N/A
1494N/A/**
1494N/A * Lock test for when it's just for synchronization of ring access.
1494N/A *
1494N/A * In that case, we don't need to do it when GEM is initialized as nobody else
1494N/A * has access to the ring.
1494N/A */
1494N/A#define RING_LOCK_TEST_WITH_RETURN(dev, file) do { \
1494N/A if (LP_RING(dev->dev_private)->obj == NULL) \
1494N/A LOCK_TEST_WITH_RETURN(dev, file); \
1494N/A} while (__lintzero)
1494N/A
1494N/Astatic inline u32
1494N/Aintel_read_legacy_status_page(struct drm_i915_private *dev_priv, int reg)
1494N/A{
1494N/A if (I915_NEED_GFX_HWS(dev_priv->dev)) {
1494N/A u32 *regs = (u32 *)dev_priv->dri1.gfx_hws_cpu_addr.handle;
1494N/A return regs[reg];
1494N/A } else
1494N/A return intel_read_status_page(LP_RING(dev_priv), reg);
1494N/A}
1494N/A
1494N/A#define READ_HWSP(dev_priv, reg) intel_read_legacy_status_page(dev_priv, reg)
1494N/A#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)
1494N/A#define I915_BREADCRUMB_INDEX 0x21
1494N/A
1494N/Avoid i915_update_dri1_breadcrumb(struct drm_device *dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A struct drm_i915_master_private *master_priv;
1494N/A
1494N/A if (dev->primary->master) {
1494N/A master_priv = dev->primary->master->driver_priv;
1494N/A if (master_priv->sarea_priv)
1494N/A master_priv->sarea_priv->last_dispatch =
1494N/A READ_BREADCRUMB(dev_priv);
1494N/A }
1494N/A}
1494N/A
1494N/Astatic void i915_write_hws_pga(struct drm_device *dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A u32 addr;
1494N/A
1494N/A addr = dev_priv->status_page_dmah->paddr;
1494N/A if (INTEL_INFO(dev)->gen >= 4)
1494N/A addr |= (dev_priv->status_page_dmah->paddr >> 28) & 0xf0;
1494N/A I915_WRITE(HWS_PGA, addr);
1494N/A}
1494N/A
1494N/A/**
1494N/A * Frees the hardware status page, whether it's a physical address or a virtual
1494N/A * address set up by the X Server.
1494N/A */
1494N/Astatic void i915_free_hws(struct drm_device *dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A struct intel_ring_buffer *ring = LP_RING(dev_priv);
1494N/A
1494N/A if (dev_priv->status_page_dmah) {
1494N/A drm_pci_free(dev_priv->status_page_dmah);
1494N/A dev_priv->status_page_dmah = NULL;
1494N/A }
1494N/A
1494N/A if (ring->status_page.gfx_addr) {
1494N/A ring->status_page.gfx_addr = 0;
1494N/A drm_core_ioremapfree(&dev_priv->dri1.gfx_hws_cpu_addr, dev);
1494N/A }
1494N/A
1494N/A /* Need to rewrite hardware status page */
1494N/A I915_WRITE(HWS_PGA, 0x1ffff000);
1494N/A}
1494N/A
1494N/Avoid i915_kernel_lost_context(struct drm_device * dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A struct drm_i915_master_private *master_priv;
1494N/A struct intel_ring_buffer *ring = LP_RING(dev_priv);
1494N/A
1494N/A /*
1494N/A * We should never lose context on the ring with modesetting
1494N/A * as we don't expose it to userspace
1494N/A */
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return;
1494N/A
1494N/A ring->head = I915_READ_HEAD(ring) & HEAD_ADDR;
1494N/A ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR;
1494N/A ring->space = ring->head - (ring->tail + I915_RING_FREE_SPACE);
1494N/A if (ring->space < 0)
1494N/A ring->space += ring->size;
1494N/A
1494N/A if (!dev->primary->master)
1494N/A return;
1494N/A
1494N/A master_priv = dev->primary->master->driver_priv;
1494N/A if (ring->head == ring->tail && master_priv->sarea_priv)
1494N/A master_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
1494N/A}
1494N/A
1494N/Astatic int i915_dma_cleanup(struct drm_device * dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A int i;
1494N/A
1494N/A /* Make sure interrupts are disabled here because the uninstall ioctl
1494N/A * may not have been called from userspace and after dev_private
1494N/A * is freed, it's too late.
1494N/A */
1494N/A if (dev->irq_enabled)
1494N/A (void) drm_irq_uninstall(dev);
1494N/A
1494N/A mutex_lock(&dev->struct_mutex);
1494N/A for (i = 0; i < I915_NUM_RINGS; i++)
1494N/A intel_cleanup_ring_buffer(&dev_priv->ring[i]);
1494N/A mutex_unlock(&dev->struct_mutex);
1494N/A
1494N/A /* Clear the HWS virtual address at teardown */
1494N/A if (I915_NEED_GFX_HWS(dev))
1494N/A i915_free_hws(dev);
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/Astatic int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
1494N/A int ret;
1494N/A
1494N/A master_priv->sarea = drm_getsarea(dev);
1494N/A if (master_priv->sarea) {
1494N/A master_priv->sarea_priv = (drm_i915_sarea_t *)(uintptr_t)
1494N/A ((u8 *)master_priv->sarea->handle + init->sarea_priv_offset);
1494N/A } else {
1494N/A DRM_DEBUG_DRIVER("sarea not found assuming DRI2 userspace\n");
1494N/A }
1494N/A
1494N/A if (init->ring_size != 0) {
1494N/A if (LP_RING(dev_priv)->obj != NULL) {
1494N/A (void) i915_dma_cleanup(dev);
1494N/A DRM_ERROR("Client tried to initialize ringbuffer in "
1494N/A "GEM mode\n");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A ret = intel_render_ring_init_dri(dev,
1494N/A init->ring_start,
1494N/A init->ring_size);
1494N/A if (ret) {
1494N/A (void) i915_dma_cleanup(dev);
1494N/A return ret;
1494N/A }
1494N/A }
1494N/A
1494N/A dev_priv->dri1.cpp = init->cpp;
1494N/A dev_priv->dri1.back_offset = init->back_offset;
1494N/A dev_priv->dri1.front_offset = init->front_offset;
1494N/A dev_priv->dri1.current_page = 0;
1494N/A if (master_priv->sarea_priv)
1494N/A master_priv->sarea_priv->pf_current_page = 0;
1494N/A
1494N/A /* Allow hardware batchbuffers unless told otherwise.
1494N/A */
1494N/A dev_priv->dri1.allow_batchbuffer = 1;
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/Astatic int i915_dma_resume(struct drm_device * dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1494N/A struct intel_ring_buffer *ring = LP_RING(dev_priv);
1494N/A
1494N/A DRM_DEBUG_DRIVER("%s\n", __func__);
1494N/A
1494N/A if (ring->virtual_start == NULL) {
1494N/A DRM_ERROR("can not ioremap virtual address for"
1494N/A " ring buffer\n");
1494N/A return -ENOMEM;
1494N/A }
1494N/A
1494N/A /* Program Hardware Status Page */
1494N/A if (!ring->status_page.page_addr) {
1494N/A DRM_ERROR("Can not find hardware status page\n");
1494N/A return -EINVAL;
1494N/A }
1494N/A DRM_DEBUG_DRIVER("hw status page @ %p\n",
1494N/A ring->status_page.page_addr);
1494N/A if (ring->status_page.gfx_addr != 0)
1494N/A intel_ring_setup_status_page(ring);
1494N/A else
1494N/A i915_write_hws_pga(dev);
1494N/A DRM_DEBUG_DRIVER("Enabled hardware status page\n");
1494N/A
1494N/A return 0;
1494N/A}
1494N/A/* LINTED */
1494N/Astatic int i915_dma_init(DRM_IOCTL_ARGS)
1494N/A{
1494N/A drm_i915_init_t *init = data;
1494N/A int retcode = 0;
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A switch (init->func) {
1494N/A case I915_INIT_DMA:
1494N/A retcode = i915_initialize(dev, init);
1494N/A break;
1494N/A case I915_CLEANUP_DMA:
1494N/A retcode = i915_dma_cleanup(dev);
1494N/A break;
1494N/A case I915_RESUME_DMA:
1494N/A retcode = i915_dma_resume(dev);
1494N/A break;
1494N/A default:
1494N/A retcode = -EINVAL;
1494N/A break;
1494N/A }
1494N/A
1494N/A return retcode;
1494N/A}
1494N/A
1494N/A/* Implement basically the same security restrictions as hardware does
1494N/A * for MI_BATCH_NON_SECURE. These can be made stricter at any time.
1494N/A *
1494N/A * Most of the calculations below involve calculating the size of a
1494N/A * particular instruction. It's important to get the size right as
1494N/A * that tells us where the next instruction to check is. Any illegal
1494N/A * instruction detected will be given a size of zero, which is a
1494N/A * signal to abort the rest of the buffer.
1494N/A */
1494N/Astatic int validate_cmd(int cmd)
1494N/A{
1494N/A switch (((cmd >> 29) & 0x7)) {
1494N/A case 0x0:
1494N/A switch ((cmd >> 23) & 0x3f) {
1494N/A case 0x0:
1494N/A return 1; /* MI_NOOP */
1494N/A case 0x4:
1494N/A return 1; /* MI_FLUSH */
1494N/A default:
1494N/A return 0; /* disallow everything else */
1494N/A }
1494N/A#ifndef __SUNPRO_C
1494N/A break;
1494N/A#endif
1494N/A case 0x1:
1494N/A return 0; /* reserved */
1494N/A case 0x2:
1494N/A return (cmd & 0xff) + 2; /* 2d commands */
1494N/A case 0x3:
1494N/A if (((cmd >> 24) & 0x1f) <= 0x18)
1494N/A return 1;
1494N/A
1494N/A switch ((cmd >> 24) & 0x1f) {
1494N/A case 0x1c:
1494N/A return 1;
1494N/A case 0x1d:
1494N/A switch ((cmd >> 16) & 0xff) {
1494N/A case 0x3:
1494N/A return (cmd & 0x1f) + 2;
1494N/A case 0x4:
1494N/A return (cmd & 0xf) + 2;
1494N/A default:
1494N/A return (cmd & 0xffff) + 2;
1494N/A }
1494N/A case 0x1e:
1494N/A if (cmd & (1 << 23))
1494N/A return (cmd & 0xffff) + 1;
1494N/A else
1494N/A return 1;
1494N/A case 0x1f:
1494N/A if ((cmd & (1 << 23)) == 0) /* inline vertices */
1494N/A return (cmd & 0x1ffff) + 2;
1494N/A else if (cmd & (1 << 17)) /* indirect random */
1494N/A if ((cmd & 0xffff) == 0)
1494N/A return 0; /* unknown length, too hard */
1494N/A else
1494N/A return (((cmd & 0xffff) + 1) / 2) + 1;
1494N/A else
1494N/A return 2; /* indirect sequential */
1494N/A default:
1494N/A return 0;
1494N/A }
1494N/A default:
1494N/A return 0;
1494N/A }
1494N/A
1494N/A#ifndef __SUNPRO_C
1494N/A return 0;
1494N/A#endif
1494N/A}
1494N/A
1494N/Astatic int i915_emit_cmds(struct drm_device * dev, int *buffer, int dwords)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A int i, ret;
1494N/A
1494N/A if ((dwords+1) * sizeof(int) >= LP_RING(dev_priv)->size - 8)
1494N/A return -EINVAL;
1494N/A
1494N/A for (i = 0; i < dwords;) {
1494N/A int sz = validate_cmd(buffer[i]);
1494N/A if (sz == 0 || i + sz > dwords)
1494N/A return -EINVAL;
1494N/A i += sz;
1494N/A }
1494N/A
1494N/A ret = BEGIN_LP_RING((dwords+1)&~1);
1494N/A if (ret)
1494N/A return ret;
1494N/A
1494N/A for (i = 0; i < dwords; i++)
1494N/A OUT_RING(buffer[i]);
1494N/A if (dwords & 1)
1494N/A OUT_RING(0);
1494N/A
1494N/A ADVANCE_LP_RING();
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/Aint
1494N/Ai915_emit_box(struct drm_device *dev,
1494N/A struct drm_clip_rect *box,
1494N/A int DR1, int DR4)
1494N/A{
1494N/A struct drm_i915_private *dev_priv = dev->dev_private;
1494N/A int ret;
1494N/A
1494N/A if (box->y2 <= box->y1 || box->x2 <= box->x1 ||
1494N/A (unsigned) box->y2 <= 0 || (unsigned) box->x2 <= 0) {
1494N/A DRM_ERROR("Bad box %d,%d..%d,%d\n",
1494N/A box->x1, box->y1, box->x2, box->y2);
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A if (INTEL_INFO(dev)->gen >= 4) {
1494N/A ret = BEGIN_LP_RING(4);
1494N/A if (ret)
1494N/A return ret;
1494N/A
1494N/A OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
1494N/A OUT_RING((box->x1 & 0xffff) | (box->y1 << 16));
1494N/A OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16));
1494N/A OUT_RING(DR4);
1494N/A } else {
1494N/A ret = BEGIN_LP_RING(6);
1494N/A if (ret)
1494N/A return ret;
1494N/A
1494N/A OUT_RING(GFX_OP_DRAWRECT_INFO);
1494N/A OUT_RING(DR1);
1494N/A OUT_RING((box->x1 & 0xffff) | (box->y1 << 16));
1494N/A OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16));
1494N/A OUT_RING(DR4);
1494N/A OUT_RING(0);
1494N/A }
1494N/A ADVANCE_LP_RING();
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/A/* XXX: Emitting the counter should really be moved to part of the IRQ
1494N/A * emit. For now, do it in both places:
1494N/A */
1494N/A
1494N/Astatic void i915_emit_breadcrumb(struct drm_device *dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
1494N/A
1494N/A dev_priv->dri1.counter++;
1494N/A if (dev_priv->dri1.counter > 0x7FFFFFFFUL)
1494N/A dev_priv->dri1.counter = 0;
1494N/A if (master_priv->sarea_priv)
1494N/A master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter;
1494N/A
1494N/A if (BEGIN_LP_RING(4) == 0) {
1494N/A OUT_RING(MI_STORE_DWORD_INDEX);
1494N/A OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
1494N/A OUT_RING(dev_priv->dri1.counter);
1494N/A OUT_RING(0);
1494N/A ADVANCE_LP_RING();
1494N/A }
1494N/A}
1494N/A
1494N/Astatic int i915_dispatch_cmdbuffer(struct drm_device * dev,
1494N/A drm_i915_cmdbuffer_t *cmd,
1494N/A struct drm_clip_rect *cliprects,
1494N/A void *cmdbuf)
1494N/A{
1494N/A int nbox = cmd->num_cliprects;
1494N/A int i = 0, count, ret;
1494N/A
1494N/A if (cmd->sz & 0x3) {
1494N/A DRM_ERROR("alignment");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A i915_kernel_lost_context(dev);
1494N/A
1494N/A count = nbox ? nbox : 1;
1494N/A
1494N/A for (i = 0; i < count; i++) {
1494N/A if (i < nbox) {
1494N/A ret = i915_emit_box(dev, &cliprects[i],
1494N/A cmd->DR1, cmd->DR4);
1494N/A if (ret)
1494N/A return ret;
1494N/A }
1494N/A
1494N/A ret = i915_emit_cmds(dev, cmdbuf, cmd->sz / 4);
1494N/A if (ret)
1494N/A return ret;
1494N/A }
1494N/A
1494N/A i915_emit_breadcrumb(dev);
1494N/A return 0;
1494N/A}
1494N/A
1494N/Astatic int i915_dispatch_batchbuffer(struct drm_device * dev,
1494N/A drm_i915_batchbuffer_t * batch,
1494N/A struct drm_clip_rect *cliprects)
1494N/A{
1494N/A struct drm_i915_private *dev_priv = dev->dev_private;
1494N/A int nbox = batch->num_cliprects;
1494N/A int i, count, ret;
1494N/A
1494N/A if ((batch->start | batch->used) & 0x7) {
1494N/A DRM_ERROR("alignment");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A i915_kernel_lost_context(dev);
1494N/A
1494N/A count = nbox ? nbox : 1;
1494N/A for (i = 0; i < count; i++) {
1494N/A if (i < nbox) {
1494N/A ret = i915_emit_box(dev, &cliprects[i],
1494N/A batch->DR1, batch->DR4);
1494N/A if (ret)
1494N/A return ret;
1494N/A }
1494N/A
1494N/A if (!IS_I830(dev) && !IS_845G(dev)) {
1494N/A ret = BEGIN_LP_RING(2);
1494N/A if (ret)
1494N/A return ret;
1494N/A
1494N/A if (INTEL_INFO(dev)->gen >= 4) {
1494N/A OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
1494N/A OUT_RING(batch->start);
1494N/A } else {
1494N/A OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
1494N/A OUT_RING(batch->start | MI_BATCH_NON_SECURE);
1494N/A }
1494N/A } else {
1494N/A ret = BEGIN_LP_RING(4);
1494N/A if (ret)
1494N/A return ret;
1494N/A
1494N/A OUT_RING(MI_BATCH_BUFFER);
1494N/A OUT_RING(batch->start | MI_BATCH_NON_SECURE);
1494N/A OUT_RING(batch->start + batch->used - 4);
1494N/A OUT_RING(0);
1494N/A }
1494N/A ADVANCE_LP_RING();
1494N/A }
1494N/A
1494N/A
1494N/A if (IS_G4X(dev) || IS_GEN5(dev)) {
1494N/A if (BEGIN_LP_RING(2) == 0) {
1494N/A OUT_RING(MI_FLUSH | MI_NO_WRITE_FLUSH | MI_INVALIDATE_ISP);
1494N/A OUT_RING(MI_NOOP);
1494N/A ADVANCE_LP_RING();
1494N/A }
1494N/A }
1494N/A
1494N/A i915_emit_breadcrumb(dev);
1494N/A return 0;
1494N/A}
1494N/A
1494N/Astatic int i915_dispatch_flip(struct drm_device * dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A struct drm_i915_master_private *master_priv =
1494N/A dev->primary->master->driver_priv;
1494N/A int ret;
1494N/A
1494N/A if (!master_priv->sarea_priv)
1494N/A return -EINVAL;
1494N/A
1494N/A DRM_DEBUG_DRIVER("%s: page=%d pfCurrentPage=%d\n",
1494N/A __func__,
1494N/A dev_priv->dri1.current_page,
1494N/A master_priv->sarea_priv->pf_current_page);
1494N/A
1494N/A i915_kernel_lost_context(dev);
1494N/A
1494N/A ret = BEGIN_LP_RING(10);
1494N/A if (ret)
1494N/A return ret;
1494N/A
1494N/A OUT_RING(MI_FLUSH | MI_READ_FLUSH);
1494N/A OUT_RING(0);
1494N/A
1494N/A OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
1494N/A OUT_RING(0);
1494N/A if (dev_priv->dri1.current_page == 0) {
1494N/A OUT_RING(dev_priv->dri1.back_offset);
1494N/A dev_priv->dri1.current_page = 1;
1494N/A } else {
1494N/A OUT_RING(dev_priv->dri1.front_offset);
1494N/A dev_priv->dri1.current_page = 0;
1494N/A }
1494N/A OUT_RING(0);
1494N/A
1494N/A OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
1494N/A OUT_RING(0);
1494N/A
1494N/A ADVANCE_LP_RING();
1494N/A
1494N/A master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter++;
1494N/A
1494N/A if (BEGIN_LP_RING(4) == 0) {
1494N/A OUT_RING(MI_STORE_DWORD_INDEX);
1494N/A OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
1494N/A OUT_RING(dev_priv->dri1.counter);
1494N/A OUT_RING(0);
1494N/A ADVANCE_LP_RING();
1494N/A }
1494N/A
1494N/A master_priv->sarea_priv->pf_current_page = dev_priv->dri1.current_page;
1494N/A return 0;
1494N/A}
1494N/A
1494N/Astatic int i915_quiescent(struct drm_device * dev)
1494N/A{
1494N/A i915_kernel_lost_context(dev);
1494N/A return intel_ring_idle(LP_RING(dev->dev_private));
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Astatic int i915_flush_ioctl(DRM_IOCTL_ARGS)
1494N/A{
1494N/A int ret;
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A RING_LOCK_TEST_WITH_RETURN(dev, file);
1494N/A
1494N/A mutex_lock(&dev->struct_mutex);
1494N/A ret = i915_quiescent(dev);
1494N/A mutex_unlock(&dev->struct_mutex);
1494N/A
1494N/A return ret;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Astatic int i915_batchbuffer(DRM_IOCTL_ARGS)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1494N/A struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
1494N/A drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
1494N/A master_priv->sarea_priv;
1494N/A drm_i915_batchbuffer_t *batch = data;
1494N/A int ret;
1494N/A struct drm_clip_rect *cliprects = NULL;
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A if (!dev_priv->dri1.allow_batchbuffer) {
1494N/A DRM_ERROR("Batchbuffer ioctl disabled\n");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A DRM_DEBUG_DRIVER("i915 batchbuffer, start %x used %d cliprects %d\n",
1494N/A batch->start, batch->used, batch->num_cliprects);
1494N/A
1494N/A RING_LOCK_TEST_WITH_RETURN(dev, file);
1494N/A
1494N/A if (batch->num_cliprects < 0)
1494N/A return -EINVAL;
1494N/A
1494N/A if (batch->num_cliprects) {
1494N/A cliprects = kcalloc(batch->num_cliprects,
1494N/A sizeof(struct drm_clip_rect),
1494N/A GFP_KERNEL);
1494N/A if (cliprects == NULL)
1494N/A return -ENOMEM;
1494N/A
1494N/A ret = copy_from_user(cliprects, batch->cliprects,
1494N/A batch->num_cliprects *
1494N/A sizeof(struct drm_clip_rect));
1494N/A if (ret != 0) {
1494N/A ret = -EFAULT;
1494N/A goto fail_free;
1494N/A }
1494N/A }
1494N/A
1494N/A mutex_lock(&dev->struct_mutex);
1494N/A ret = i915_dispatch_batchbuffer(dev, batch, cliprects);
1494N/A mutex_unlock(&dev->struct_mutex);
1494N/A
1494N/A if (sarea_priv)
1494N/A sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
1494N/A
1494N/Afail_free:
1494N/A kfree(cliprects, batch->num_cliprects * sizeof(struct drm_clip_rect));
1494N/A
1494N/A return ret;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Astatic int i915_cmdbuffer(DRM_IOCTL_ARGS)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1494N/A struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
1494N/A drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
1494N/A master_priv->sarea_priv;
1494N/A drm_i915_cmdbuffer_t *cmdbuf = data;
1494N/A struct drm_clip_rect *cliprects = NULL;
1494N/A void *batch_data;
1494N/A int ret;
1494N/A
1494N/A DRM_DEBUG_DRIVER("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
1494N/A (void *)cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A RING_LOCK_TEST_WITH_RETURN(dev, file);
1494N/A
1494N/A if (cmdbuf->num_cliprects < 0)
1494N/A return -EINVAL;
1494N/A
1494N/A batch_data = kmalloc(cmdbuf->sz, GFP_KERNEL);
1494N/A if (batch_data == NULL)
1494N/A return -ENOMEM;
1494N/A
1494N/A ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz);
1494N/A if (ret != 0) {
1494N/A ret = -EFAULT;
1494N/A goto fail_batch_free;
1494N/A }
1494N/A
1494N/A if (cmdbuf->num_cliprects) {
1494N/A cliprects = kcalloc(cmdbuf->num_cliprects,
1494N/A sizeof(struct drm_clip_rect), GFP_KERNEL);
1494N/A if (cliprects == NULL) {
1494N/A ret = -ENOMEM;
1494N/A goto fail_batch_free;
1494N/A }
1494N/A
1494N/A ret = copy_from_user(cliprects, cmdbuf->cliprects,
1494N/A cmdbuf->num_cliprects *
1494N/A sizeof(struct drm_clip_rect));
1494N/A if (ret != 0) {
1494N/A ret = -EFAULT;
1494N/A goto fail_clip_free;
1494N/A }
1494N/A }
1494N/A
1494N/A mutex_lock(&dev->struct_mutex);
1494N/A ret = i915_dispatch_cmdbuffer(dev, cmdbuf, cliprects, batch_data);
1494N/A mutex_unlock(&dev->struct_mutex);
1494N/A if (ret) {
1494N/A DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
1494N/A goto fail_clip_free;
1494N/A }
1494N/A
1494N/A if (sarea_priv)
1494N/A sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
1494N/A
1494N/Afail_clip_free:
1494N/A kfree(cliprects, cmdbuf->num_cliprects * sizeof(struct drm_clip_rect));
1494N/Afail_batch_free:
1494N/A kfree(batch_data, cmdbuf->sz);
1494N/A
1494N/A return ret;
1494N/A}
1494N/A
1494N/Astatic int i915_emit_irq(struct drm_device * dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
1494N/A
1494N/A i915_kernel_lost_context(dev);
1494N/A
1494N/A DRM_DEBUG_DRIVER("\n");
1494N/A
1494N/A dev_priv->dri1.counter++;
1494N/A if (dev_priv->dri1.counter > 0x7FFFFFFFUL)
1494N/A dev_priv->dri1.counter = 1;
1494N/A if (master_priv->sarea_priv)
1494N/A master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter;
1494N/A
1494N/A if (BEGIN_LP_RING(4) == 0) {
1494N/A OUT_RING(MI_STORE_DWORD_INDEX);
1494N/A OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
1494N/A OUT_RING(dev_priv->dri1.counter);
1494N/A OUT_RING(MI_USER_INTERRUPT);
1494N/A ADVANCE_LP_RING();
1494N/A }
1494N/A
1494N/A return dev_priv->dri1.counter;
1494N/A}
1494N/A
1494N/Astatic int i915_wait_irq(struct drm_device * dev, int irq_nr)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1494N/A struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
1494N/A int ret = 0;
1494N/A struct intel_ring_buffer *ring = LP_RING(dev_priv);
1494N/A
1494N/A DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr,
1494N/A READ_BREADCRUMB(dev_priv));
1494N/A
1494N/A if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
1494N/A if (master_priv->sarea_priv)
1494N/A master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
1494N/A return 0;
1494N/A }
1494N/A
1494N/A if (master_priv->sarea_priv)
1494N/A master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
1494N/A
1494N/A if (ring->irq_get(ring)) {
1494N/A DRM_WAIT_ON(ret, &ring->irq_queue, 3 * DRM_HZ,
1494N/A READ_BREADCRUMB(dev_priv) >= irq_nr);
1494N/A ring->irq_put(ring);
1494N/A } else if (wait_for(READ_BREADCRUMB(dev_priv) >= irq_nr, 3000))
1494N/A ret = -EBUSY;
1494N/A
1494N/A if (ret == -EBUSY) {
1494N/A DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
1494N/A READ_BREADCRUMB(dev_priv), (int)dev_priv->dri1.counter);
1494N/A }
1494N/A
1494N/A return ret;
1494N/A}
1494N/A
1494N/A/* Needs the lock as it touches the ring.
1494N/A */
1494N/A/* LINTED */
1494N/Aint i915_irq_emit(DRM_IOCTL_ARGS)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A drm_i915_irq_emit_t *emit = data;
1494N/A int result;
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A if (!dev_priv || !LP_RING(dev_priv)->virtual_start) {
1494N/A DRM_ERROR("called with no initialization\n");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A RING_LOCK_TEST_WITH_RETURN(dev, file);
1494N/A
1494N/A mutex_lock(&dev->struct_mutex);
1494N/A result = i915_emit_irq(dev);
1494N/A mutex_unlock(&dev->struct_mutex);
1494N/A
1494N/A if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
1494N/A DRM_ERROR("copy_to_user\n");
1494N/A return -EFAULT;
1494N/A }
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/A/* Doesn't need the hardware lock.
1494N/A */
1494N/A/* LINTED */
1494N/Aint i915_irq_wait(DRM_IOCTL_ARGS)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A drm_i915_irq_wait_t *irqwait = data;
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A if (!dev_priv) {
1494N/A DRM_ERROR("called with no initialization\n");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A return i915_wait_irq(dev, irqwait->irq_seq);
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Aint i915_vblank_pipe_get(DRM_IOCTL_ARGS)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A drm_i915_vblank_pipe_t *pipe = data;
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A if (!dev_priv) {
1494N/A DRM_ERROR("called with no initialization\n");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/A/**
1494N/A * Schedule buffer swap at given vertical blank.
1494N/A */
1494N/A/* LINTED */
1494N/Aint i915_vblank_swap(DRM_IOCTL_ARGS)
1494N/A{
1494N/A /* The delayed swap mechanism was fundamentally racy, and has been
1494N/A * removed. The model was that the client requested a delayed flip/swap
1494N/A * from the kernel, then waited for vblank before continuing to perform
1494N/A * rendering. The problem was that the kernel might wake the client
1494N/A * up before it dispatched the vblank swap (since the lock has to be
1494N/A * held while touching the ringbuffer), in which case the client would
1494N/A * clear and start the next frame before the swap occurred, and
1494N/A * flicker would occur in addition to likely missing the vblank.
1494N/A *
1494N/A * In the absence of this ioctl, userland falls back to a correct path
1494N/A * of waiting for a vblank, then dispatching the swap on its own.
1494N/A * Context switching to userland and back is plenty fast enough for
1494N/A * meeting the requirements of vblank swapping.
1494N/A */
1494N/A return -EINVAL;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Astatic int i915_flip_bufs(DRM_IOCTL_ARGS)
1494N/A{
1494N/A int ret;
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A DRM_DEBUG_DRIVER("%s\n", __func__);
1494N/A
1494N/A RING_LOCK_TEST_WITH_RETURN(dev, file);
1494N/A
1494N/A mutex_lock(&dev->struct_mutex);
1494N/A ret = i915_dispatch_flip(dev);
1494N/A mutex_unlock(&dev->struct_mutex);
1494N/A
1494N/A return ret;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Astatic int i915_getparam(DRM_IOCTL_ARGS)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A drm_i915_getparam_t *param = data;
1494N/A int value;
1494N/A
1494N/A if (!dev_priv) {
1494N/A DRM_ERROR("called with no initialization\n");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A switch (param->param) {
1494N/A case I915_PARAM_IRQ_ACTIVE:
1494N/A value = dev->pdev->irq ? 1 : 0;
1494N/A break;
1494N/A case I915_PARAM_ALLOW_BATCHBUFFER:
1494N/A value = dev_priv->dri1.allow_batchbuffer ? 1 : 0;
1494N/A break;
1494N/A case I915_PARAM_LAST_DISPATCH:
1494N/A value = READ_BREADCRUMB(dev_priv);
1494N/A break;
1494N/A case I915_PARAM_CHIPSET_ID:
1494N/A value = dev->pci_device;
1494N/A break;
1494N/A case I915_PARAM_HAS_GEM:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_NUM_FENCES_AVAIL:
1494N/A value = dev_priv->num_fence_regs - dev_priv->fence_reg_start;
1494N/A break;
1494N/A case I915_PARAM_HAS_OVERLAY:
1494N/A value = dev_priv->overlay ? 1 : 0;
1494N/A break;
1494N/A case I915_PARAM_HAS_PAGEFLIPPING:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_EXECBUF2:
1494N/A /* depends on GEM */
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_BSD:
1494N/A value = intel_ring_initialized(&dev_priv->ring[VCS]);
1494N/A break;
1494N/A case I915_PARAM_HAS_BLT:
1494N/A value = intel_ring_initialized(&dev_priv->ring[BCS]);
1494N/A break;
1494N/A case I915_PARAM_HAS_VEBOX:
1494N/A value = intel_ring_initialized(&dev_priv->ring[VECS]);
1494N/A break;
1494N/A case I915_PARAM_HAS_RELAXED_FENCING:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_COHERENT_RINGS:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_EXEC_CONSTANTS:
1494N/A value = INTEL_INFO(dev)->gen >= 4;
1494N/A break;
1494N/A case I915_PARAM_HAS_RELAXED_DELTA:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_GEN7_SOL_RESET:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_LLC:
1494N/A value = HAS_LLC(dev);
1494N/A break;
1494N/A case I915_PARAM_HAS_ALIASING_PPGTT:
1494N/A value = dev_priv->mm.aliasing_ppgtt ? 1 : 0;
1494N/A break;
1494N/A case I915_PARAM_HAS_WAIT_TIMEOUT:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_SEMAPHORES:
1494N/A value = i915_semaphore_is_enabled(dev);
1494N/A break;
1494N/A case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_SECURE_BATCHES:
1494N/A /* not support yet */
1494N/A value = 0;
1494N/A break;
1494N/A case I915_PARAM_HAS_PINNED_BATCHES:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_EXEC_NO_RELOC:
1494N/A value = 1;
1494N/A break;
1494N/A case I915_PARAM_HAS_EXEC_HANDLE_LUT:
1494N/A value = 1;
1494N/A break;
1683N/A
1683N/A /*
1683N/A * These should be better supported in the next version, but
1683N/A * are being requested in this one. so provide useful values.
1683N/A */
1683N/A case I915_PARAM_CMD_PARSER_VERSION:
1683N/A value = 1;
1683N/A break;
1683N/A case I915_PARAM_HAS_EXEC_SOFTPIN:
1683N/A value = 0;
1683N/A break;
1683N/A
1494N/A default:
1494N/A DRM_DEBUG_DRIVER("Unknown parameter %d\n",
1494N/A param->param);
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
1494N/A DRM_ERROR("DRM_COPY_TO_USER failed\n");
1494N/A return -EFAULT;
1494N/A }
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Astatic int i915_setparam(DRM_IOCTL_ARGS)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A drm_i915_setparam_t *param = data;
1494N/A
1494N/A if (!dev_priv) {
1494N/A DRM_ERROR("called with no initialization\n");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A switch (param->param) {
1494N/A case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
1494N/A break;
1494N/A case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
1494N/A break;
1494N/A case I915_SETPARAM_ALLOW_BATCHBUFFER:
1494N/A dev_priv->dri1.allow_batchbuffer = param->value ? 1 : 0;
1494N/A break;
1494N/A case I915_SETPARAM_NUM_USED_FENCES:
1494N/A if (param->value > dev_priv->num_fence_regs ||
1494N/A param->value < 0)
1494N/A return -EINVAL;
1494N/A /* Userspace can use first N regs */
1494N/A dev_priv->fence_reg_start = param->value;
1494N/A break;
1494N/A default:
1494N/A DRM_DEBUG_DRIVER("unknown parameter %d\n",
1494N/A param->param);
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Astatic int i915_set_status_page(DRM_IOCTL_ARGS)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A drm_i915_hws_addr_t *hws = data;
1494N/A struct intel_ring_buffer *ring;
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A if (!I915_NEED_GFX_HWS(dev))
1494N/A return -EINVAL;
1494N/A
1494N/A if (!dev_priv) {
1494N/A DRM_ERROR("called with no initialization\n");
1494N/A return -EINVAL;
1494N/A }
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1494N/A DRM_ERROR("tried to set status page when mode setting active\n");
1494N/A return 0;
1494N/A }
1494N/A
1494N/A DRM_DEBUG_DRIVER("set status page addr 0x%08x\n", (u32)hws->addr);
1494N/A
1494N/A ring = LP_RING(dev_priv);
1494N/A ring->status_page.gfx_addr = hws->addr & (0x1ffff<<12);
1494N/A
1494N/A dev_priv->dri1.gfx_hws_cpu_addr.offset = (u_offset_t)dev->agp_aperbase + hws->addr;
1494N/A dev_priv->dri1.gfx_hws_cpu_addr.size = 4*1024;
1494N/A dev_priv->dri1.gfx_hws_cpu_addr.type = 0;
1494N/A dev_priv->dri1.gfx_hws_cpu_addr.flags = 0;
1494N/A dev_priv->dri1.gfx_hws_cpu_addr.mtrr = 0;
1494N/A
1494N/A drm_core_ioremap(&dev_priv->dri1.gfx_hws_cpu_addr, dev);
1494N/A if (dev_priv->dri1.gfx_hws_cpu_addr.handle == NULL) {
1494N/A (void) i915_dma_cleanup(dev);
1494N/A ring->status_page.gfx_addr = 0;
1494N/A DRM_ERROR("can not ioremap virtual address for"
1494N/A " G33 hw status page\n");
1494N/A return -ENOMEM;
1494N/A }
1494N/A
1494N/A (void) memset(dev_priv->dri1.gfx_hws_cpu_addr.handle, 0, PAGE_SIZE);
1494N/A I915_WRITE(HWS_PGA, ring->status_page.gfx_addr);
1494N/A
1494N/A DRM_DEBUG_DRIVER("load hws HWS_PGA with gfx mem 0x%x\n",
1494N/A ring->status_page.gfx_addr);
1494N/A DRM_DEBUG_DRIVER("load hws at %p\n",
1494N/A ring->status_page.page_addr);
1494N/A return 0;
1494N/A}
1494N/A
1494N/Astatic int i915_get_bridge_dev(struct drm_device *dev)
1494N/A{
1494N/A struct drm_i915_private *dev_priv = dev->dev_private;
1494N/A
1494N/A /* OSOL_i915 Begin */
1494N/A struct drm_i915_bridge_dev *bridge_dev = &dev_priv->bridge_dev;
1494N/A char name[32];
1494N/A int i, err;
1494N/A
1494N/A if (INTEL_INFO(dev)->gen >= 6)
1494N/A return 0;
1494N/A
1494N/A if (bridge_dev->ldi_id) {
1494N/A DRM_DEBUG("end");
1494N/A return 0;
1494N/A }
1494N/A
1494N/A if (ldi_ident_from_dip(dev->devinfo, &bridge_dev->ldi_id)) {
1494N/A bridge_dev->ldi_id = NULL;
1494N/A DRM_DEBUG("failed");
1494N/A return -1;
1494N/A };
1494N/A
1494N/A /* Workaround here:
1494N/A * agptarget0 is not always linked to the right device
1494N/A * try agptarget1 if failed at agptarget0
1494N/A */
1494N/A for (i = 0; i < 16; i++) {
1494N/A (void) sprintf(name, "/dev/agp/agptarget%d", i);
1494N/A err = ldi_open_by_name(name, 0, kcred,
1494N/A &bridge_dev->bridge_dev_hdl, bridge_dev->ldi_id);
1494N/A if (err == 0) {
1494N/A break;
1494N/A }
1494N/A DRM_INFO("can't open agptarget%d", i);
1494N/A }
1494N/A
1494N/A if (err) {
1494N/A ldi_ident_release(bridge_dev->ldi_id);
1494N/A bridge_dev->ldi_id = NULL;
1494N/A bridge_dev->bridge_dev_hdl = NULL;
1494N/A return -1;
1494N/A }
1494N/A /* OSOL_i915 End */
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/Aint i915_bridge_dev_read_config_word(struct drm_i915_bridge_dev *bridge_dev, int where, u16 *val)
1494N/A{
1494N/A u16 data = (u16)where;
1494N/A
1494N/A if (ldi_ioctl(bridge_dev->bridge_dev_hdl,
1494N/A AGP_TARGET_PCICONFIG_GET16, (intptr_t)&data, FKIOCTL, kcred, 0))
1494N/A return -1;
1494N/A
1494N/A *val = data;
1494N/A return 0;
1494N/A}
1494N/A
1494N/Aint i915_bridge_dev_write_config_word(struct drm_i915_bridge_dev *bridge_dev, int where, u16 val)
1494N/A{
1494N/A u32 data = (u16)where << 16 | val;
1494N/A
1494N/A if (ldi_ioctl(bridge_dev->bridge_dev_hdl,
1494N/A AGP_TARGET_PCICONFIG_SET16, (intptr_t)&data, FKIOCTL, kcred, 0))
1494N/A return -1;
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/A/* true = enable decode, false = disable decoder */
1494N/A/* LINTED */
1494N/Astatic unsigned int i915_vga_set_decode(void *cookie, bool state)
1494N/A{
1494N/A struct drm_device *dev = cookie;
1494N/A
1494N/A (void) intel_modeset_vga_set_state(dev, state);
1494N/A if (state)
1494N/A return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
1494N/A VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
1494N/A else
1494N/A return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
1494N/A}
1494N/A
1494N/A
1494N/Astatic int i915_load_modeset_init(struct drm_device *dev)
1494N/A{
1494N/A struct drm_i915_private *dev_priv = dev->dev_private;
1494N/A int ret;
1494N/A
1494N/A ret = intel_parse_bios(dev);
1494N/A if (ret)
1494N/A DRM_INFO("failed to find VBIOS tables\n");
1494N/A
1494N/A /* Initialise stolen first so that we may reserve preallocated
1494N/A * objects for the BIOS to KMS transition.
1494N/A */
1494N/A ret = i915_gem_init_stolen(dev);
1494N/A if (ret)
1494N/A goto out;
1494N/A
1494N/A /* clear interrupt related bits */
1494N/A if (dev->driver->irq_uninstall)
1494N/A dev->driver->irq_uninstall(dev);
1494N/A
1494N/A ret = drm_irq_install(dev);
1494N/A if (ret)
1494N/A goto cleanup_gem_stolen;
1494N/A
1494N/A /* Important: The output setup functions called by modeset_init need
1494N/A * working irqs for e.g. gmbus and dp aux transfers. */
1494N/A intel_modeset_init(dev);
1494N/A
1494N/A ret = i915_gem_init(dev);
1494N/A if (ret)
1494N/A goto cleanup_irq;
1494N/A
1494N/A
1494N/A intel_modeset_gem_init(dev);
1494N/A
1494N/A /* Always safe in the mode setting case. */
1494N/A /* FIXME: do pre/post-mode set stuff in core KMS code */
1494N/A dev->vblank_disable_allowed = 1;
1494N/A if (INTEL_INFO(dev)->num_pipes == 0) {
1494N/A dev_priv->mm.suspended = 0;
1494N/A return 0;
1494N/A }
1494N/A
1494N/A if (dev_priv->fbcon_obj != NULL) {
1494N/A ret = intel_fbdev_init(dev);
1494N/A if (ret)
1494N/A goto cleanup_gem;
1494N/A
1494N/A drm_register_fbops(dev);
1494N/A }
1494N/A
1494N/A /* Only enable hotplug handling once the fbdev is fully set up. */
1494N/A intel_hpd_init(dev);
1494N/A
1494N/A /*
1494N/A * Some ports require correctly set-up hpd registers for detection to
1494N/A * work properly (leading to ghost connected connector status), e.g. VGA
1494N/A * on gm45. Hence we can only set up the initial fbdev config after hpd
1494N/A * irqs are fully enabled. Now we should scan for the initial config
1494N/A * only once hotplug handling is enabled, but due to screwed-up locking
1494N/A * around kms/fbdev init we can't protect the fdbev initial config
1494N/A * scanning against hotplug events. Hence do this first and ignore the
1494N/A * tiny window where we will loose hotplug notifactions.
1494N/A */
1494N/A if (dev_priv->fbcon_obj != NULL)
1494N/A intel_fbdev_initial_config(dev);
1494N/A
1494N/A /* Only enable hotplug handling once the fbdev is fully set up. */
1494N/A dev_priv->enable_hotplug_processing = true;
1494N/A
1494N/A drm_kms_helper_poll_init(dev);
1494N/A
1494N/A /* We're off and running w/KMS */
1494N/A dev_priv->mm.suspended = 0;
1494N/A
1494N/A return 0;
1494N/A
1494N/Acleanup_gem:
1494N/A mutex_lock(&dev->struct_mutex);
1494N/A i915_gem_cleanup_ringbuffer(dev);
1494N/A i915_gem_context_fini(dev);
1494N/A mutex_unlock(&dev->struct_mutex);
1494N/A i915_gem_cleanup_aliasing_ppgtt(dev);
1494N/A drm_mm_takedown(&dev_priv->mm.gtt_space);
1494N/Acleanup_irq:
1494N/A drm_irq_uninstall(dev);
1494N/Acleanup_gem_stolen:
1494N/A i915_gem_cleanup_stolen(dev);
1494N/Aout:
1494N/A return ret;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Aint i915_master_create(struct drm_device *dev, struct drm_master *master)
1494N/A{
1494N/A struct drm_i915_master_private *master_priv;
1494N/A
1494N/A master_priv = kzalloc(sizeof(*master_priv), GFP_KERNEL);
1494N/A if (!master_priv)
1494N/A return -ENOMEM;
1494N/A
1494N/A master->driver_priv = master_priv;
1494N/A return 0;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Avoid i915_master_destroy(struct drm_device *dev, struct drm_master *master)
1494N/A{
1494N/A struct drm_i915_master_private *master_priv = master->driver_priv;
1494N/A
1494N/A if (!master_priv)
1494N/A return;
1494N/A
1494N/A kfree(master_priv, sizeof(struct drm_i915_master_private));
1494N/A
1494N/A master->driver_priv = NULL;
1494N/A}
1494N/A
1494N/A
1494N/A/* OSOL_i915 Begin */
1494N/A#define pci_dev_put(d) do_pci_dev_put(&(d))
1494N/A
1494N/Avoid do_pci_dev_put(struct drm_i915_bridge_dev *bridge_dev)
1494N/A{
1494N/A if (bridge_dev->bridge_dev_hdl) {
1494N/A (void) ldi_close(bridge_dev->bridge_dev_hdl, 0, kcred);
1494N/A bridge_dev->bridge_dev_hdl = NULL;
1494N/A }
1494N/A
1494N/A if (bridge_dev->ldi_id) {
1494N/A ldi_ident_release(bridge_dev->ldi_id);
1494N/A bridge_dev->ldi_id = NULL;
1494N/A }
1494N/A}
1494N/A/* OSOL_i915 End */
1494N/A
1494N/A/**
1494N/A * intel_early_sanitize_regs - clean up BIOS state
1494N/A * @dev: DRM device
1494N/A *
1494N/A * This function must be called before we do any I915_READ or I915_WRITE. Its
1494N/A * purpose is to clean up any state left by the BIOS that may affect us when
1494N/A * reading and/or writing registers.
1494N/A */
1494N/Astatic void intel_early_sanitize_regs(struct drm_device *dev)
1494N/A{
1494N/A struct drm_i915_private *dev_priv = dev->dev_private;
1494N/A
1494N/A if (HAS_FPGA_DBG_UNCLAIMED(dev))
1494N/A I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
1494N/A}
1494N/A
1494N/A/**
1494N/A * i915_driver_load - setup chip and create an initial config
1494N/A * @dev: DRM device
1494N/A * @flags: startup flags
1494N/A *
1494N/A * The driver load routine has to do several things:
1494N/A * - drive output discovery via intel_modeset_init()
1494N/A * - initialize the memory manager
1494N/A * - allocate initial config memory
1494N/A * - setup the DRM framebuffer with the allocated memory
1494N/A */
1494N/Aint i915_driver_load(struct drm_device *dev, unsigned long flags)
1494N/A{
1494N/A struct drm_i915_private *dev_priv;
1494N/A struct intel_device_info *info;
1494N/A resource_size_t base, size;
1494N/A int ret = 0, mmio_bar;
1494N/A
1494N/A info = (struct intel_device_info *) flags;
1494N/A
1494N/A /* Refuse to load on gen6+ without kms enabled. */
1494N/A if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET))
1494N/A return -ENODEV;
1494N/A
1494N/A /* i915 has 4 more counters */
1494N/A dev->counters += 4;
1494N/A dev->types[6] = _DRM_STAT_IRQ;
1494N/A dev->types[7] = _DRM_STAT_PRIMARY;
1494N/A dev->types[8] = _DRM_STAT_SECONDARY;
1494N/A dev->types[9] = _DRM_STAT_DMA;
1494N/A
1494N/A dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL);
1494N/A if (dev_priv == NULL)
1494N/A return -ENOMEM;
1494N/A
1494N/A dev->dev_private = (void *)dev_priv;
1494N/A dev_priv->dev = dev;
1494N/A dev_priv->info = info;
1494N/A
1494N/A dev_priv->info = (struct intel_device_info *) flags;
1494N/A
1494N/A /* Add register map (needed for suspend/resume) */
1494N/A mmio_bar = IS_GEN2(dev) ? 1 : 0;
1494N/A base = drm_get_resource_start(dev, mmio_bar);
1494N/A size = drm_get_resource_len(dev, mmio_bar);
1494N/A
1494N/A dev_priv->regs = drm_alloc(sizeof (drm_local_map_t), DRM_MEM_MAPS);
1494N/A dev_priv->regs->offset = base;
1494N/A dev_priv->regs->size = size;
1494N/A dev_priv->regs->type = _DRM_REGISTERS;
1494N/A dev_priv->regs->flags = _DRM_REMOVABLE;
1494N/A if (drm_ioremap(dev, dev_priv->regs)) {
1494N/A ret = -EIO;
1494N/A goto put_bridge;
1494N/A }
1494N/A
1494N/A DRM_DEBUG("mmio paddr=%lx, kvaddr=%p", dev_priv->regs->offset, dev_priv->regs->handle);
1494N/A
1494N/A intel_early_sanitize_regs(dev);
1494N/A /* The i915 workqueue is primarily used for batched retirement of
1494N/A * requests (and thus managing bo) once the task has been completed
1494N/A * by the GPU. i915_gem_retire_requests() is called directly when we
1494N/A * need high-priority retirement, such as waiting for an explicit
1494N/A * bo.
1494N/A *
1494N/A * It is also used for periodic low-priority events, such as
1494N/A * idle-timers and hangcheck.
1494N/A *
1494N/A * All tasks on the workqueue are expected to acquire the dev mutex
1494N/A * so there is no point in running more than one instance of the
1494N/A * workqueue at any time: max_active = 1 and NON_REENTRANT.
1494N/A */
1494N/A dev_priv->wq = create_workqueue(dev->devinfo, "i915");
1494N/A if (dev_priv->wq == NULL) {
1494N/A DRM_ERROR("Failed to create i915 workqueue.\n");
1494N/A ret = -ENOMEM;
1494N/A goto out_rmmap;
1494N/A }
1494N/A
1494N/A /* The i915 workqueue is primarily used for page_flip and fbc */
1494N/A dev_priv->other_wq = create_workqueue(dev->devinfo, "i915_other");
1494N/A if (dev_priv->other_wq == NULL) {
1494N/A DRM_ERROR("Failed to create i915_other workqueue.\n");
1494N/A ret = -ENOMEM;
1494N/A goto out_mtrrfree;
1494N/A }
1494N/A
1494N/A /* This must be called before any calls to HAS_PCH_* */
1494N/A intel_detect_pch(dev);
1494N/A
1494N/A intel_irq_init(dev);
1494N/A intel_pm_init(dev);
1494N/A intel_gt_sanitize(dev);
1494N/A intel_gt_init(dev);
1494N/A
1494N/A if (intel_setup_gmbus(dev) != 0)
1494N/A goto out_mtrrfree;
1494N/A
1494N/A /* Make sure the bios did its job and set up vital registers */
1494N/A intel_setup_bios(dev);
1494N/A
1494N/A i915_gem_load(dev);
1494N/A
1494N/A /* On the 945G/GM, the chipset reports the MSI capability on the
1494N/A * integrated graphics even though the support isn't actually there
1494N/A * according to the published specs. It doesn't appear to function
1494N/A * correctly in testing on 945G.
1494N/A * This may be a side effect of MSI having been made available for PEG
1494N/A * and the registers being closely associated.
1494N/A *
1494N/A * According to chipset errata, on the 965GM, MSI interrupts may
1494N/A * be lost or delayed, but we use them anyways to avoid
1494N/A * stuck interrupts on some machines.
1494N/A */
1494N/A /* Fix me: Failed to get interrupts after resume, when enable msi */
1494N/A /*
1494N/A if (!IS_I945G(dev) && !IS_I945GM(dev))
1494N/A pci_enable_msi(dev->pdev);
1494N/A */
1494N/A spin_lock_init(&dev_priv->irq_lock);
1494N/A spin_lock_init(&dev_priv->gpu_error.lock);
1494N/A spin_lock_init(&dev_priv->rps.lock);
1494N/A spin_lock_init(&dev_priv->dpio_lock);
1494N/A
1494N/A spin_lock_init(&dev_priv->rps.hw_lock);
1494N/A spin_lock_init(&dev_priv->modeset_restore_lock);
1494N/A
1494N/A dev_priv->num_plane = 1;
1494N/A if (IS_VALLEYVIEW(dev))
1494N/A dev_priv->num_plane = 2;
1494N/A
1494N/A if (INTEL_INFO(dev)->num_pipes) {
1494N/A ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes);
1494N/A if (ret)
1494N/A goto out_gem_unload;
1494N/A }
1494N/A
1494N/A /* Start out suspended */
1494N/A dev_priv->mm.suspended = 1;
1494N/A
1494N/A if (HAS_POWER_WELL(dev))
1494N/A i915_init_power_well(dev);
1494N/A
1494N/A if (IS_GEN7(dev))
1494N/A i915_try_reset = true;
1494N/A
1494N/A dev_priv->gpu_hang = 0;
1494N/A
1494N/A init_timer(&dev_priv->gpu_top_timer);
1494N/A setup_timer(&dev_priv->gpu_top_timer, gpu_top_handler,
1494N/A (void *) dev);
1494N/A
1494N/A if (MDB_TRACK_ENABLE)
1494N/A INIT_LIST_HEAD(&dev_priv->batch_list);
1494N/A
1494N/A return 0;
1494N/A
1494N/Aout_gem_unload:
1494N/A destroy_workqueue(dev_priv->other_wq);
1494N/Aout_mtrrfree:
1494N/A destroy_workqueue(dev_priv->wq);
1494N/Aout_rmmap:
1494N/A drm_ioremapfree(dev_priv->regs);
1494N/Aput_bridge:
1494N/Afree_priv:
1494N/A kfree(dev_priv, sizeof(struct drm_i915_private));
1494N/A return ret;
1494N/A}
1494N/A
1494N/Aint i915_driver_unload(struct drm_device *dev)
1494N/A{
1494N/A struct drm_i915_private *dev_priv = dev->dev_private;
1494N/A int ret;
1494N/A
1494N/A if (HAS_POWER_WELL(dev))
1494N/A i915_remove_power_well(dev);
1494N/A
1494N/A mutex_lock(&dev->struct_mutex);
1494N/A ret = i915_gpu_idle(dev);
1494N/A if (ret)
1494N/A DRM_ERROR("failed to idle hardware: %d\n", ret);
1494N/A i915_gem_retire_requests(dev);
1494N/A mutex_unlock(&dev->struct_mutex);
1494N/A
1494N/A destroy_workqueue(dev_priv->other_wq);
1494N/A destroy_workqueue(dev_priv->wq);
1494N/A
1494N/A del_timer_sync(&dev_priv->gpu_top_timer);
1494N/A destroy_timer(&dev_priv->gpu_top_timer);
1494N/A del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
1494N/A destroy_timer(&dev_priv->gpu_error.hangcheck_timer);
1494N/A
1494N/A/* XXXX rebracket after this is tested */
1494N/A /*
1494N/A * Uninitialized GTT indicates that i915 never opens.
1494N/A * So we should not try to release the resources
1494N/A * which are only allocated in i915_driver_firstopen.
1494N/A */
1494N/A if (dev_priv->gtt.total !=0) {
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1494N/A (void) drm_irq_uninstall(dev);
1494N/A /* XXX FIXME vga_client_register(dev->pdev, NULL, NULL, NULL); */
1494N/A }
1494N/A
1494N/A if (dev->pdev->msi_enabled)
1494N/A pci_disable_msi(dev->pdev);
1494N/A
1494N/A i915_free_hws(dev);//XXX should still be here ??
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1494N/A if (dev_priv->fbcon_obj != NULL)
1494N/A intel_fbdev_fini(dev);
1494N/A intel_modeset_cleanup(dev);
1494N/A
1494N/A mutex_lock(&dev->struct_mutex);
1494N/A i915_gem_free_all_phys_object(dev);
1494N/A i915_gem_cleanup_ringbuffer(dev);
1494N/A i915_gem_context_fini(dev);
1494N/A mutex_unlock(&dev->struct_mutex);
1494N/A
1494N/A i915_gem_cleanup_aliasing_ppgtt(dev);
1494N/A i915_gem_cleanup_stolen(dev);
1494N/A if (!I915_NEED_GFX_HWS(dev))
1494N/A i915_free_hws(dev);
1494N/A i915_gem_lastclose(dev);
1494N/A if (dev_priv->gtt.scratch_page)
1494N/A teardown_scratch_page(dev);
1494N/A if (dev_priv->fbcon_obj != NULL) {
1494N/A i915_gem_free_object(&dev_priv->fbcon_obj->base);
1494N/A dev_priv->fbcon_obj = NULL;
1494N/A }
1494N/A }
1494N/A }
1494N/A drm_mm_takedown(&dev_priv->mm.gtt_space);
1494N/A dev_priv->gtt.gtt_remove(dev);
1494N/A
1494N/A if (dev_priv->regs != NULL)
1494N/A (void) drm_rmmap(dev, dev_priv->regs);
1494N/A
1494N/A mutex_destroy(&dev_priv->irq_lock);
1494N/A
1494N/A pci_dev_put(dev_priv->bridge_dev);
1494N/A
1494N/A if (MDB_TRACK_ENABLE) {
1494N/A struct batch_info_list *r_list, *list_temp;
1494N/A list_for_each_entry_safe(r_list, list_temp, struct batch_info_list, &dev_priv->batch_list, head) {
1494N/A list_del(&r_list->head);
1494N/A drm_free(r_list->obj_list, r_list->num * sizeof(caddr_t), DRM_MEM_MAPS);
1494N/A drm_free(r_list, sizeof (struct batch_info_list), DRM_MEM_MAPS);
1494N/A }
1494N/A list_del(&dev_priv->batch_list);
1494N/A }
1494N/A kfree(dev->dev_private, sizeof(drm_i915_private_t));
1494N/A dev->dev_private = NULL;
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/Aint
1494N/Ai915_driver_firstopen(struct drm_device *dev)
1494N/A{
1494N/A static bool first_call = true;
1494N/A struct drm_i915_private *dev_priv = dev->dev_private;
1494N/A struct pci_dev *pdev = dev->pdev;
1494N/A u32 aperbase;
1494N/A int ret = 0;
1494N/A
1494N/A if (first_call) {
1494N/A /* OSOL_i915: moved from i915_driver_load */
1494N/A
1494N/A if (i915_get_bridge_dev(dev)) {
1494N/A DRM_ERROR("i915_get_bridge_dev() failed.");
1494N/A return -EIO;
1494N/A }
1494N/A
1494N/A /*
1494N/A * AGP has been removed for GEN6+,
1494N/A * So we read the agp base and size here.
1494N/A */
1494N/A if (INTEL_INFO(dev)->gen >= 6) {
1494N/A pci_read_config_dword(pdev, GEN6_CONF_GMADR, &aperbase);
1494N/A dev->agp_aperbase = aperbase & GEN6_GTT_BASE_MASK;
1494N/A } else {
1494N/A dev->agp_aperbase = dev->agp->agp_info.agpi_aperbase;
1494N/A }
1494N/A
1494N/A ret = i915_gem_gtt_init(dev);
1494N/A if (ret) {
1494N/A DRM_ERROR("Failed to initialize GTT\n");
1494N/A pci_dev_put(dev_priv->bridge_dev);
1494N/A ret = -ENODEV;
1494N/A return ret;
1494N/A }
1494N/A
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1494N/A ret = i915_load_modeset_init(dev);
1494N/A if (ret < 0) {
1494N/A DRM_ERROR("failed to init modeset\n");
1494N/A pci_dev_put(dev_priv->bridge_dev);
1494N/A return ret;
1494N/A }
1494N/A }
1494N/A }
1494N/A
1494N/A dev_priv->isX = 1;
1494N/A first_call = false;
1494N/A return ret;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Aint i915_driver_open(struct drm_device *dev, struct drm_file *file_priv)
1494N/A{
1494N/A struct drm_i915_file_private *i915_file_priv;
1494N/A
1494N/A DRM_DEBUG_DRIVER("\n");
1494N/A i915_file_priv = (struct drm_i915_file_private *)
1494N/A kmalloc(sizeof(*i915_file_priv), GFP_KERNEL);
1494N/A
1494N/A if (!i915_file_priv)
1494N/A return -ENOMEM;
1494N/A
1494N/A spin_lock_init(&i915_file_priv->mm.lock);
1494N/A INIT_LIST_HEAD(&i915_file_priv->mm.request_list);
1494N/A
1494N/A idr_init(&i915_file_priv->context_idr);
1494N/A
1494N/A i915_file_priv->status = 1;
1494N/A file_priv->driver_priv = i915_file_priv;
1494N/A
1494N/A return 0;
1494N/A}
1494N/A
1494N/A/**
1494N/A * i915_driver_lastclose - clean up after all DRM clients have exited
1494N/A * @dev: DRM device
1494N/A *
1494N/A * Take care of cleaning up after all DRM clients have exited. In the
1494N/A * mode setting case, we want to restore the kernel's initial mode (just
1494N/A * in case the last client left us in a bad state).
1494N/A *
1494N/A * Additionally, in the non-mode setting case, we'll tear down the AGP
1494N/A * and DMA structures, since the kernel won't be using them, and clea
1494N/A * up any GEM state.
1494N/A */
1494N/Avoid i915_driver_lastclose(struct drm_device * dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A
1494N/A /* On gen6+ we refuse to init without kms enabled, but then the drm core
1494N/A * goes right around and calls lastclose. Check for this and don't clean
1494N/A * up anything. */
1494N/A if (!dev_priv)
1494N/A return;
1494N/A dev_priv->isX = 0;
1494N/A if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1494N/A intel_fb_restore_mode(dev);
1494N/A return;
1494N/A }
1494N/A
1494N/A i915_gem_lastclose(dev);
1494N/A
1494N/A (void) i915_dma_cleanup(dev);
1494N/A}
1494N/A
1494N/Avoid i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1494N/A{
1494N/A i915_gem_context_close(dev, file_priv);
1494N/A i915_gem_release(dev, file_priv);
1494N/A}
1494N/A
1494N/Avoid i915_driver_entervt(struct drm_device *dev)
1494N/A{
1494N/A struct drm_i915_private *dev_priv = dev->dev_private;
1494N/A
1494N/A /* Do nothing when coming back from high-res mode (VESA)*/
1494N/A if (dev_priv->fbcon_obj)
1494N/A return;
1494N/A
1494N/A /* Need to do full modeset from VGA TEXT mode */
1494N/A if (dev_priv->vt_holding > 0) {
1494N/A (void) i915_restore_state(dev);
1494N/A if (IS_HASWELL(dev))
1494N/A intel_modeset_setup_hw_state(dev, false);
1494N/A else
1494N/A intel_modeset_setup_hw_state(dev, true);
1494N/A }
1494N/A dev_priv->vt_holding = 0;
1494N/A}
1494N/A
1494N/Avoid i915_driver_leavevt(struct drm_device *dev)
1494N/A{
1494N/A drm_i915_private_t *dev_priv = dev->dev_private;
1494N/A
1494N/A if (dev_priv->fbcon_obj)
1494N/A return;
1494N/A
1494N/A (void) i915_save_state(dev);
1494N/A
1494N/A if (IS_HASWELL(dev))
1494N/A intel_modeset_disable(dev);
1494N/A
1494N/A dev_priv->vt_holding = 1;
1494N/A}
1494N/A
1494N/A/* LINTED */
1494N/Avoid i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv)
1494N/A{
1494N/A struct drm_i915_file_private *i915_file_priv = file_priv->driver_priv;
1494N/A kfree(i915_file_priv, sizeof(*i915_file_priv));
1494N/A file_priv->driver_priv = NULL;
1494N/A}
1494N/A
1494N/Astruct drm_ioctl_desc i915_ioctls[] = {
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_FLUSH, i915_flush_ioctl, DRM_AUTH, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_FLIP, i915_flip_bufs, DRM_AUTH, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH, copyin32_i915_batchbuffer, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH, copyin32_i915_irq_emit, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GETPARAM, i915_getparam, DRM_AUTH, copyin32_i915_getparam, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_ALLOC, drm_noop, DRM_AUTH, copyin32_i915_mem_alloc, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_FREE, drm_noop, DRM_AUTH, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_INIT_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH, copyin32_i915_cmdbuffer, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_DESTROY_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_SET_CACHING, i915_gem_set_caching_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_GET_CACHING, i915_gem_get_caching_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_SET_TILING, i915_gem_set_tiling, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_GET_TILING, i915_gem_get_tiling, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_CONTEXT_CREATE, i915_gem_context_create_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, i915_gem_context_destroy_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A I915_IOCTL_DEF(DRM_IOCTL_I915_REG_READ, i915_reg_read_ioctl, DRM_UNLOCKED, NULL, NULL),
1494N/A};
1494N/A
1494N/Aint i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
1494N/A
1494N/A/**
1494N/A * Determine if the device really is AGP or not.
1494N/A *
1494N/A * All Intel graphics chipsets are treated as AGP, even if they are really
1494N/A */
1494N/A/* LINTED */
1494N/Aint i915_driver_device_is_agp(struct drm_device * dev)
1494N/A{
1494N/A return 1;
1494N/A}