1450N/A/*
1450N/A * Copyright (c) 2012, 2013, Oracle and/or its affiliates. All rights reserved.
1450N/A */
1450N/A
1450N/A/*
1450N/A * Copyright (c) 2006-2010, 2013, Intel Corporation
1450N/A * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
1450N/A *
1450N/A * Permission is hereby granted, free of charge, to any person obtaining a
1450N/A * copy of this software and associated documentation files (the "Software"),
1450N/A * to deal in the Software without restriction, including without limitation
1450N/A * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1450N/A * and/or sell copies of the Software, and to permit persons to whom the
1450N/A * Software is furnished to do so, subject to the following conditions:
1450N/A *
1450N/A * The above copyright notice and this permission notice (including the next
1450N/A * paragraph) shall be included in all copies or substantial portions of the
1450N/A * Software.
1450N/A *
1450N/A * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1450N/A * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1450N/A * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
1450N/A * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1450N/A * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1450N/A * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
1450N/A * DEALINGS IN THE SOFTWARE.
1450N/A *
1450N/A * Authors:
1450N/A * Eric Anholt <eric@anholt.net>
1450N/A * Dave Airlie <airlied@linux.ie>
1450N/A * Jesse Barnes <jesse.barnes@intel.com>
1450N/A * Chris Wilson <chris@chris-wilson.co.uk>
1450N/A */
1450N/A
1450N/A#include "intel_drv.h"
1450N/A
1450N/A#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
1450N/A
1450N/Avoid
1450N/Aintel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
1450N/A struct drm_display_mode *adjusted_mode)
1450N/A{
1450N/A adjusted_mode->hdisplay = fixed_mode->hdisplay;
1450N/A adjusted_mode->hsync_start = fixed_mode->hsync_start;
1450N/A adjusted_mode->hsync_end = fixed_mode->hsync_end;
1450N/A adjusted_mode->htotal = fixed_mode->htotal;
1450N/A
1450N/A adjusted_mode->vdisplay = fixed_mode->vdisplay;
1450N/A adjusted_mode->vsync_start = fixed_mode->vsync_start;
1450N/A adjusted_mode->vsync_end = fixed_mode->vsync_end;
1450N/A adjusted_mode->vtotal = fixed_mode->vtotal;
1450N/A
1450N/A adjusted_mode->clock = fixed_mode->clock;
1450N/A}
1450N/A
1450N/A/* adjusted_mode has been preset to be the panel's fixed mode */
1450N/Avoid
1450N/Aintel_pch_panel_fitting(struct intel_crtc *intel_crtc,
1450N/A struct intel_crtc_config *pipe_config,
1450N/A int fitting_mode)
1450N/A{
1450N/A struct drm_display_mode *mode, *adjusted_mode;
1450N/A int x, y, width, height;
1450N/A
1450N/A mode = &pipe_config->requested_mode;
1450N/A adjusted_mode = &pipe_config->adjusted_mode;
1450N/A
1450N/A x = y = width = height = 0;
1450N/A
1450N/A /* Native modes don't need fitting */
1450N/A if (adjusted_mode->hdisplay == mode->hdisplay &&
1450N/A adjusted_mode->vdisplay == mode->vdisplay)
1450N/A goto done;
1450N/A
1450N/A switch (fitting_mode) {
1450N/A case DRM_MODE_SCALE_CENTER:
1450N/A width = mode->hdisplay;
1450N/A height = mode->vdisplay;
1450N/A x = (adjusted_mode->hdisplay - width + 1)/2;
1450N/A y = (adjusted_mode->vdisplay - height + 1)/2;
1450N/A break;
1450N/A
1450N/A case DRM_MODE_SCALE_ASPECT:
1450N/A /* Scale but preserve the aspect ratio */
1450N/A {
1450N/A u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
1450N/A u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
1450N/A if (scaled_width > scaled_height) { /* pillar */
1450N/A width = scaled_height / mode->vdisplay;
1450N/A if (width & 1)
1450N/A width++;
1450N/A x = (adjusted_mode->hdisplay - width + 1) / 2;
1450N/A y = 0;
1450N/A height = adjusted_mode->vdisplay;
1450N/A } else if (scaled_width < scaled_height) { /* letter */
1450N/A height = scaled_width / mode->hdisplay;
1450N/A if (height & 1)
1450N/A height++;
1450N/A y = (adjusted_mode->vdisplay - height + 1) / 2;
1450N/A x = 0;
1450N/A width = adjusted_mode->hdisplay;
1450N/A } else {
1450N/A x = y = 0;
1450N/A width = adjusted_mode->hdisplay;
1450N/A height = adjusted_mode->vdisplay;
1450N/A }
1450N/A }
1450N/A break;
1450N/A
1450N/A case DRM_MODE_SCALE_FULLSCREEN:
1450N/A x = y = 0;
1450N/A width = adjusted_mode->hdisplay;
1450N/A height = adjusted_mode->vdisplay;
1450N/A break;
1450N/A
1450N/A default:
1450N/A DRM_ERROR("bad panel fit mode: %d\n", fitting_mode);
1450N/A return;
1450N/A }
1450N/A
1450N/Adone:
1450N/A pipe_config->pch_pfit.pos = (x << 16) | y;
1450N/A pipe_config->pch_pfit.size = (width << 16) | height;
1450N/A}
1450N/A
1450N/Astatic void
1450N/Acentre_horizontally(struct drm_display_mode *mode,
1450N/A int width)
1450N/A{
1450N/A u32 border, sync_pos, blank_width, sync_width;
1450N/A
1450N/A /* keep the hsync and hblank widths constant */
1450N/A sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
1450N/A blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
1450N/A sync_pos = (blank_width - sync_width + 1) / 2;
1450N/A
1450N/A border = (mode->hdisplay - width + 1) / 2;
1450N/A border += border & 1; /* make the border even */
1450N/A
1450N/A mode->crtc_hdisplay = width;
1450N/A mode->crtc_hblank_start = width + border;
1450N/A mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
1450N/A
1450N/A mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
1450N/A mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
1450N/A}
1450N/A
1450N/Astatic void
1450N/Acentre_vertically(struct drm_display_mode *mode,
1450N/A int height)
1450N/A{
1450N/A u32 border, sync_pos, blank_width, sync_width;
1450N/A
1450N/A /* keep the vsync and vblank widths constant */
1450N/A sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
1450N/A blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
1450N/A sync_pos = (blank_width - sync_width + 1) / 2;
1450N/A
1450N/A border = (mode->vdisplay - height + 1) / 2;
1450N/A
1450N/A mode->crtc_vdisplay = height;
1450N/A mode->crtc_vblank_start = height + border;
1450N/A mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
1450N/A
1450N/A mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
1450N/A mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
1450N/A}
1450N/A
1450N/Astatic inline u32 panel_fitter_scaling(u32 source, u32 target)
1450N/A{
1450N/A /*
1450N/A * Floating point operation is not supported. So the FACTOR
1450N/A * is defined, which can avoid the floating point computation
1450N/A * when calculating the panel ratio.
1450N/A */
1450N/A#define ACCURACY 12
1450N/A#define FACTOR (1 << ACCURACY)
1450N/A u32 ratio = source * FACTOR / target;
1450N/A return (FACTOR * ratio + FACTOR/2) / FACTOR;
1450N/A}
1450N/A
1450N/Avoid intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
1450N/A struct intel_crtc_config *pipe_config,
1450N/A int fitting_mode)
1450N/A{
1450N/A struct drm_device *dev = intel_crtc->base.dev;
1450N/A u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
1450N/A struct drm_display_mode *mode, *adjusted_mode;
1450N/A
1450N/A mode = &pipe_config->requested_mode;
1450N/A adjusted_mode = &pipe_config->adjusted_mode;
1450N/A
1450N/A /* Native modes don't need fitting */
1450N/A if (adjusted_mode->hdisplay == mode->hdisplay &&
1450N/A adjusted_mode->vdisplay == mode->vdisplay)
1450N/A goto out;
1450N/A
1450N/A drm_mode_set_crtcinfo(adjusted_mode, 0);
1450N/A pipe_config->timings_set = true;
1450N/A
1450N/A switch (fitting_mode) {
1450N/A case DRM_MODE_SCALE_CENTER:
1450N/A /*
1450N/A * For centered modes, we have to calculate border widths &
1450N/A * heights and modify the values programmed into the CRTC.
1450N/A */
1450N/A centre_horizontally(adjusted_mode, mode->hdisplay);
1450N/A centre_vertically(adjusted_mode, mode->vdisplay);
1450N/A border = LVDS_BORDER_ENABLE;
1450N/A break;
1450N/A case DRM_MODE_SCALE_ASPECT:
1450N/A /* Scale but preserve the aspect ratio */
1450N/A if (INTEL_INFO(dev)->gen >= 4) {
1450N/A u32 scaled_width = adjusted_mode->hdisplay *
1450N/A mode->vdisplay;
1450N/A u32 scaled_height = mode->hdisplay *
1450N/A adjusted_mode->vdisplay;
1450N/A
1450N/A /* 965+ is easy, it does everything in hw */
1450N/A if (scaled_width > scaled_height)
1450N/A pfit_control |= PFIT_ENABLE |
1450N/A PFIT_SCALING_PILLAR;
1450N/A else if (scaled_width < scaled_height)
1450N/A pfit_control |= PFIT_ENABLE |
1450N/A PFIT_SCALING_LETTER;
1450N/A else if (adjusted_mode->hdisplay != mode->hdisplay)
1450N/A pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
1450N/A } else {
1450N/A u32 scaled_width = adjusted_mode->hdisplay *
1450N/A mode->vdisplay;
1450N/A u32 scaled_height = mode->hdisplay *
1450N/A adjusted_mode->vdisplay;
1450N/A /*
1450N/A * For earlier chips we have to calculate the scaling
1450N/A * ratio by hand and program it into the
1450N/A * PFIT_PGM_RATIO register
1450N/A */
1450N/A if (scaled_width > scaled_height) { /* pillar */
1450N/A centre_horizontally(adjusted_mode,
1450N/A scaled_height /
1450N/A mode->vdisplay);
1450N/A
1450N/A border = LVDS_BORDER_ENABLE;
1450N/A if (mode->vdisplay != adjusted_mode->vdisplay) {
1450N/A u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
1450N/A pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
1450N/A bits << PFIT_VERT_SCALE_SHIFT);
1450N/A pfit_control |= (PFIT_ENABLE |
1450N/A VERT_INTERP_BILINEAR |
1450N/A HORIZ_INTERP_BILINEAR);
1450N/A }
1450N/A } else if (scaled_width < scaled_height) { /* letter */
1450N/A centre_vertically(adjusted_mode,
1450N/A scaled_width /
1450N/A mode->hdisplay);
1450N/A
1450N/A border = LVDS_BORDER_ENABLE;
1450N/A if (mode->hdisplay != adjusted_mode->hdisplay) {
1450N/A u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
1450N/A pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
1450N/A bits << PFIT_VERT_SCALE_SHIFT);
1450N/A pfit_control |= (PFIT_ENABLE |
1450N/A VERT_INTERP_BILINEAR |
1450N/A HORIZ_INTERP_BILINEAR);
1450N/A }
1450N/A } else {
1450N/A /* Aspects match, Let hw scale both directions */
1450N/A pfit_control |= (PFIT_ENABLE |
1450N/A VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
1450N/A VERT_INTERP_BILINEAR |
1450N/A HORIZ_INTERP_BILINEAR);
1450N/A }
1450N/A }
1450N/A break;
1450N/A case DRM_MODE_SCALE_FULLSCREEN:
1450N/A /*
1450N/A * Full scaling, even if it changes the aspect ratio.
1450N/A * Fortunately this is all done for us in hw.
1450N/A */
1450N/A if (mode->vdisplay != adjusted_mode->vdisplay ||
1450N/A mode->hdisplay != adjusted_mode->hdisplay) {
1450N/A pfit_control |= PFIT_ENABLE;
1450N/A if (INTEL_INFO(dev)->gen >= 4)
1450N/A pfit_control |= PFIT_SCALING_AUTO;
1450N/A else
1450N/A pfit_control |= (VERT_AUTO_SCALE |
1450N/A VERT_INTERP_BILINEAR |
1450N/A HORIZ_AUTO_SCALE |
1450N/A HORIZ_INTERP_BILINEAR);
1450N/A }
1450N/A break;
1450N/A default:
1450N/A DRM_ERROR("bad panel fit mode: %d\n", fitting_mode);
1450N/A return;
1450N/A }
1450N/A
1450N/A /* 965+ wants fuzzy fitting */
1450N/A /* FIXME: handle multiple panels by failing gracefully */
1450N/A if (INTEL_INFO(dev)->gen >= 4)
1450N/A pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
1450N/A PFIT_FILTER_FUZZY);
1450N/A
1450N/Aout:
1450N/A if ((pfit_control & PFIT_ENABLE) == 0) {
1450N/A pfit_control = 0;
1450N/A pfit_pgm_ratios = 0;
1450N/A }
1450N/A
1450N/A /* Make sure pre-965 set dither correctly for 18bpp panels. */
1450N/A if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
1450N/A pfit_control |= PANEL_8TO6_DITHER_ENABLE;
1450N/A
1450N/A pipe_config->gmch_pfit.control = pfit_control;
1450N/A pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
1450N/A pipe_config->gmch_pfit.lvds_border_bits = border;
1450N/A}
1450N/A
1450N/Astatic int is_backlight_combination_mode(struct drm_device *dev)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A
1450N/A if (INTEL_INFO(dev)->gen >= 4)
1450N/A return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
1450N/A
1450N/A if (IS_GEN2(dev))
1450N/A return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
1450N/A
1450N/A return 0;
1450N/A}
1450N/A
1450N/Astatic u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A u32 val;
1450N/A
1450N/A /* Restore the CTL value if it lost, e.g. GPU reset */
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev_priv->dev)) {
1450N/A val = I915_READ(BLC_PWM_PCH_CTL2);
1450N/A if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
1450N/A dev_priv->regfile.saveBLC_PWM_CTL2 = val;
1450N/A } else if (val == 0) {
1450N/A val = dev_priv->regfile.saveBLC_PWM_CTL2;
1450N/A I915_WRITE(BLC_PWM_PCH_CTL2, val);
1450N/A }
1450N/A } else {
1450N/A val = I915_READ(BLC_PWM_CTL);
1450N/A if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
1450N/A dev_priv->regfile.saveBLC_PWM_CTL = val;
1450N/A if (INTEL_INFO(dev)->gen >= 4)
1450N/A dev_priv->regfile.saveBLC_PWM_CTL2 =
1450N/A I915_READ(BLC_PWM_CTL2);
1450N/A } else if (val == 0) {
1450N/A val = dev_priv->regfile.saveBLC_PWM_CTL;
1450N/A I915_WRITE(BLC_PWM_CTL, val);
1450N/A if (INTEL_INFO(dev)->gen >= 4)
1450N/A I915_WRITE(BLC_PWM_CTL2,
1450N/A dev_priv->regfile.saveBLC_PWM_CTL2);
1450N/A }
1450N/A }
1450N/A
1450N/A return val;
1450N/A}
1450N/A
1450N/Astatic u32 intel_panel_get_max_backlight(struct drm_device *dev)
1450N/A{
1450N/A u32 max;
1450N/A
1450N/A max = i915_read_blc_pwm_ctl(dev);
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev)) {
1450N/A max >>= 16;
1450N/A } else {
1450N/A if (INTEL_INFO(dev)->gen < 4)
1450N/A max >>= 17;
1450N/A else
1450N/A max >>= 16;
1450N/A
1450N/A if (is_backlight_combination_mode(dev))
1450N/A max *= 0xff;
1450N/A }
1450N/A
1450N/A DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
1450N/A return max;
1450N/A}
1450N/A
1450N/Astatic int i915_panel_invert_brightness;
1450N/Astatic u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A
1450N/A if (i915_panel_invert_brightness < 0)
1450N/A return val;
1450N/A
1450N/A if (i915_panel_invert_brightness > 0 ||
1450N/A dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
1450N/A u32 max = intel_panel_get_max_backlight(dev);
1450N/A if (max)
1450N/A return max - val;
1450N/A }
1450N/A
1450N/A return val;
1450N/A}
1450N/A
1450N/Astatic u32 intel_panel_get_backlight(struct drm_device *dev)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A u32 val;
1450N/A unsigned long flags;
1450N/A
1450N/A spin_lock_irqsave(&dev_priv->backlight.lock, flags);
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev)) {
1450N/A val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
1450N/A } else {
1450N/A val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
1450N/A if (INTEL_INFO(dev)->gen < 4)
1450N/A val >>= 1;
1450N/A
1450N/A if (is_backlight_combination_mode(dev)){
1450N/A u8 lbpc;
1450N/A
1450N/A pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
1450N/A val *= lbpc;
1450N/A }
1450N/A }
1450N/A
1450N/A val = intel_panel_compute_brightness(dev, val);
1450N/A
1450N/A spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
1450N/A
1450N/A DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
1450N/A return val;
1450N/A}
1450N/A
1450N/Astatic void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
1450N/A I915_WRITE(BLC_PWM_CPU_CTL, val | level);
1450N/A}
1450N/A
1450N/Astatic void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A u32 tmp;
1450N/A
1450N/A DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
1450N/A level = intel_panel_compute_brightness(dev, level);
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev)) {
1450N/A intel_pch_panel_set_backlight(dev, level);
1450N/A return;
1450N/A }
1450N/A
1450N/A if (is_backlight_combination_mode(dev)){
1450N/A u32 max = intel_panel_get_max_backlight(dev);
1450N/A u8 lbpc;
1450N/A
1450N/A /* we're screwed, but keep behaviour backwards compatible */
1450N/A if (!max)
1450N/A max = 1;
1450N/A
1450N/A lbpc = level * 0xfe / max + 1;
1450N/A level /= lbpc;
1450N/A pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
1450N/A }
1450N/A
1450N/A tmp = I915_READ(BLC_PWM_CTL);
1450N/A if (INTEL_INFO(dev)->gen < 4)
1450N/A level <<= 1;
1450N/A tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
1450N/A I915_WRITE(BLC_PWM_CTL, tmp | level);
1450N/A}
1450N/A
1450N/A/* set backlight brightness to level in range [0..max] */
1450N/Avoid intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A u32 freq;
1450N/A unsigned long flags;
1450N/A
1450N/A spin_lock_irqsave(&dev_priv->backlight.lock, flags);
1450N/A
1450N/A freq = intel_panel_get_max_backlight(dev);
1450N/A if (!freq) {
1450N/A /* we are screwed, bail out */
1450N/A goto out;
1450N/A }
1450N/A
1450N/A /* scale to hardware, but be careful to not overflow */
1450N/A if (freq < max)
1450N/A level = level * freq / max;
1450N/A else
1450N/A level = freq / max * level;
1450N/A
1450N/A dev_priv->backlight.level = level;
1450N/A// if (dev_priv->backlight.device)
1450N/A// dev_priv->backlight.device->props.brightness = level;
1450N/A
1450N/A if (dev_priv->backlight.enabled)
1450N/A intel_panel_actually_set_backlight(dev, level);
1450N/Aout:
1450N/A spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
1450N/A}
1450N/A
1450N/Avoid intel_panel_disable_backlight(struct drm_device *dev)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A unsigned long flags;
1450N/A
1450N/A /*
1450N/A * Do not disable backlight on the vgaswitcheroo path. When switching
1450N/A * away from i915, the other client may depend on i915 to handle the
1450N/A * backlight. This will leave the backlight on unnecessarily when
1450N/A * another client is not activated.
1450N/A */
1450N/A if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
1450N/A DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
1450N/A return;
1450N/A }
1450N/A
1450N/A spin_lock_irqsave(&dev_priv->backlight.lock, flags);
1450N/A
1450N/A dev_priv->backlight.enabled = false;
1450N/A intel_panel_actually_set_backlight(dev, 0);
1450N/A
1450N/A if (INTEL_INFO(dev)->gen >= 4) {
1450N/A uint32_t reg, tmp;
1450N/A
1450N/A reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
1450N/A
1450N/A I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev)) {
1450N/A tmp = I915_READ(BLC_PWM_PCH_CTL1);
1450N/A tmp &= ~BLM_PCH_PWM_ENABLE;
1450N/A I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
1450N/A }
1450N/A }
1450N/A
1450N/A spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
1450N/A}
1450N/A
1450N/Avoid intel_panel_enable_backlight(struct drm_device *dev,
1450N/A enum pipe pipe)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A enum transcoder cpu_transcoder =
1450N/A intel_pipe_to_cpu_transcoder(dev_priv, pipe);
1450N/A unsigned long flags;
1450N/A
1450N/A spin_lock_irqsave(&dev_priv->backlight.lock, flags);
1450N/A
1450N/A if (dev_priv->backlight.level == 0) {
1450N/A dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
1450N/A// if (dev_priv->backlight.device)
1450N/A// dev_priv->backlight.device->props.brightness =
1450N/A// dev_priv->backlight.level;
1450N/A }
1450N/A
1450N/A if (INTEL_INFO(dev)->gen >= 4) {
1450N/A uint32_t reg, tmp;
1450N/A
1450N/A reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
1450N/A
1450N/A
1450N/A tmp = I915_READ(reg);
1450N/A
1450N/A /* Note that this can also get called through dpms changes. And
1450N/A * we don't track the backlight dpms state, hence check whether
1450N/A * we have to do anything first. */
1450N/A if (tmp & BLM_PWM_ENABLE)
1450N/A goto set_level;
1450N/A
1450N/A if (INTEL_INFO(dev)->num_pipes == 3)
1450N/A tmp &= ~BLM_PIPE_SELECT_IVB;
1450N/A else
1450N/A tmp &= ~BLM_PIPE_SELECT;
1450N/A
1450N/A if (cpu_transcoder == TRANSCODER_EDP)
1450N/A tmp |= BLM_TRANSCODER_EDP;
1450N/A else
1450N/A tmp |= BLM_PIPE(cpu_transcoder);
1450N/A tmp &= ~BLM_PWM_ENABLE;
1450N/A
1450N/A I915_WRITE(reg, tmp);
1450N/A POSTING_READ(reg);
1450N/A I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev) &&
1450N/A !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
1450N/A tmp = I915_READ(BLC_PWM_PCH_CTL1);
1450N/A tmp |= BLM_PCH_PWM_ENABLE;
1450N/A tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
1450N/A I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
1450N/A }
1450N/A }
1450N/A
1450N/Aset_level:
1450N/A /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
1450N/A * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
1450N/A * registers are set.
1450N/A */
1450N/A dev_priv->backlight.enabled = true;
1450N/A intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
1450N/A
1450N/A spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
1450N/A}
1450N/A
1450N/Astatic void intel_panel_init_backlight(struct drm_device *dev)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A
1450N/A dev_priv->backlight.level = intel_panel_get_backlight(dev);
1450N/A dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
1450N/A}
1450N/A
1450N/Aenum drm_connector_status
1450N/Aintel_panel_detect(struct drm_device *dev)
1450N/A{
1450N/A#if 0
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A
1450N/A /* Assume that the BIOS does not lie through the OpRegion... */
1450N/A if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
1450N/A u32 *regs = (u32 *)dev_priv->opregion.lid_state;
1450N/A return regs[0] & 0x1 ?
1450N/A connector_status_connected :
1450N/A connector_status_disconnected;
1450N/A }
1450N/A switch (i915_panel_ignore_lid) {
1450N/A case -2:
1450N/A return connector_status_connected;
1450N/A case -1:
1450N/A return connector_status_disconnected;
1450N/A default:
1450N/A return connector_status_unknown;
1450N/A }
1450N/A#endif
1450N/A
1450N/A return connector_status_unknown;
1450N/A}
1450N/A
1450N/A#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
1450N/Astatic int intel_panel_update_status(struct backlight_device *bd)
1450N/A{
1450N/A struct drm_device *dev = bl_get_data(bd);
1450N/A intel_panel_set_backlight(dev, bd->props.brightness,
1450N/A bd->props.max_brightness);
1450N/A return 0;
1450N/A}
1450N/A
1450N/Astatic int intel_panel_get_brightness(struct backlight_device *bd)
1450N/A{
1450N/A struct drm_device *dev = bl_get_data(bd);
1450N/A return intel_panel_get_backlight(dev);
1450N/A}
1450N/A
1450N/Astatic const struct backlight_ops intel_panel_bl_ops = {
1450N/A .update_status = intel_panel_update_status,
1450N/A .get_brightness = intel_panel_get_brightness,
1450N/A};
1450N/A
1450N/Aint intel_panel_setup_backlight(struct drm_connector *connector)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A struct backlight_properties props;
1450N/A unsigned long flags;
1450N/A
1450N/A intel_panel_init_backlight(dev);
1450N/A
1450N/A if (WARN_ON(dev_priv->backlight.device))
1450N/A return -ENODEV;
1450N/A
1450N/A (void) memset(&props, 0, sizeof(props));
1450N/A props.type = BACKLIGHT_RAW;
1450N/A props.brightness = dev_priv->backlight.level;
1450N/A
1450N/A spin_lock_irqsave(&dev_priv->backlight.lock, flags);
1450N/A props.max_brightness = intel_panel_get_max_backlight(dev);
1450N/A spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
1450N/A if (props.max_brightness == 0) {
1450N/A DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
1450N/A return -ENODEV;
1450N/A }
1450N/A dev_priv->backlight.device =
1450N/A backlight_device_register("intel_backlight",
1450N/A &connector->kdev, dev,
1450N/A &intel_panel_bl_ops, &props);
1450N/A
1450N/A if (IS_ERR(dev_priv->backlight.device)) {
1450N/A DRM_ERROR("Failed to register backlight: %ld\n",
1450N/A PTR_ERR(dev_priv->backlight.device));
1450N/A dev_priv->backlight.device = NULL;
1450N/A return -ENODEV;
1450N/A }
1450N/A return 0;
1450N/A}
1450N/A
1450N/Avoid intel_panel_destroy_backlight(struct drm_device *dev)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A if (dev_priv->backlight.device) {
1450N/A backlight_device_unregister(dev_priv->backlight.device);
1450N/A dev_priv->backlight.device = NULL;
1450N/A }
1450N/A}
1450N/A#else
1450N/Aint intel_panel_setup_backlight(struct drm_connector *connector)
1450N/A{
1450N/A intel_panel_init_backlight(connector->dev);
1450N/A return 0;
1450N/A}
1450N/A
1450N/Avoid intel_panel_destroy_backlight(struct drm_device *dev)
1450N/A{
1450N/A return;
1450N/A}
1450N/A#endif
1450N/A
1450N/Aint intel_panel_init(struct intel_panel *panel,
1450N/A struct drm_display_mode *fixed_mode)
1450N/A {
1450N/A panel->fixed_mode = fixed_mode;
1450N/A
1450N/A return 0;
1450N/A}
1450N/A
1450N/Avoid intel_panel_fini(struct intel_panel *panel)
1450N/A{
1450N/A struct intel_connector *intel_connector =
1450N/A container_of(panel, struct intel_connector, panel);
1450N/A
1450N/A if (panel->fixed_mode)
1450N/A drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1450N/A}