1450N/A/*
1450N/A * Copyright (c) 2006, 2013, Oracle and/or its affiliates. All rights reserved.
1450N/A */
1450N/A
1450N/A/*
1450N/A * Copyright (c) 2006-2007, 2013, Intel Corporation
1450N/A *
1450N/A * Permission is hereby granted, free of charge, to any person obtaining a
1450N/A * copy of this software and associated documentation files (the "Software"),
1450N/A * to deal in the Software without restriction, including without limitation
1450N/A * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1450N/A * and/or sell copies of the Software, and to permit persons to whom the
1450N/A * Software is furnished to do so, subject to the following conditions:
1450N/A *
1450N/A * The above copyright notice and this permission notice (including the next
1450N/A * paragraph) shall be included in all copies or substantial portions of the
1450N/A * Software.
1450N/A *
1450N/A * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1450N/A * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1450N/A * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
1450N/A * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1450N/A * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1450N/A * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
1450N/A * DEALINGS IN THE SOFTWARE.
1450N/A *
1450N/A * Authors:
1450N/A * Eric Anholt <eric@anholt.net>
1450N/A */
1450N/A
1450N/A#include "drmP.h"
1450N/A#include "drm.h"
1450N/A#include "drm_crtc.h"
1450N/A#include "drm_crtc_helper.h"
1450N/A#include "drm_edid.h"
1450N/A#include "intel_drv.h"
1450N/A#include "i915_drm.h"
1450N/A#include "i915_drv.h"
1450N/A#include "drm_sun_i2c.h" /* OSOL_i915 */
1450N/A
1450N/A/* Here's the desired hotplug mode */
1450N/A#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
1450N/A ADPA_CRT_HOTPLUG_WARMUP_10MS | \
1450N/A ADPA_CRT_HOTPLUG_SAMPLE_4S | \
1450N/A ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
1450N/A ADPA_CRT_HOTPLUG_VOLREF_325MV | \
1450N/A ADPA_CRT_HOTPLUG_ENABLE)
1450N/A
1450N/Astruct intel_crt {
1450N/A struct intel_encoder base;
1450N/A /* DPMS state is stored in the connector, which we need in the
1450N/A * encoder's enable/disable callbacks */
1450N/A struct intel_connector *connector;
1450N/A bool force_hotplug_required;
1450N/A u32 adpa_reg;
1450N/A};
1450N/A
1450N/Astatic struct intel_crt *intel_attached_crt(struct drm_connector *connector)
1450N/A{
1450N/A return container_of(intel_attached_encoder(connector),
1450N/A struct intel_crt, base);
1450N/A}
1450N/A
1450N/Astatic struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
1450N/A{
1450N/A return container_of(encoder, struct intel_crt, base);
1450N/A}
1450N/A
1450N/Astatic bool intel_crt_get_hw_state(struct intel_encoder *encoder,
1450N/A enum pipe *pipe)
1450N/A{
1450N/A struct drm_device *dev = encoder->base.dev;
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A struct intel_crt *crt = intel_encoder_to_crt(encoder);
1450N/A u32 tmp;
1450N/A
1450N/A tmp = I915_READ(crt->adpa_reg);
1450N/A
1450N/A if (!(tmp & ADPA_DAC_ENABLE))
1450N/A return false;
1450N/A
1450N/A if (HAS_PCH_CPT(dev))
1450N/A *pipe = PORT_TO_PIPE_CPT(tmp);
1450N/A else
1450N/A *pipe = PORT_TO_PIPE(tmp);
1450N/A
1450N/A return true;
1450N/A}
1450N/A
1450N/Astatic void intel_crt_get_config(struct intel_encoder *encoder,
1450N/A struct intel_crtc_config *pipe_config)
1450N/A{
1450N/A struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1450N/A struct intel_crt *crt = intel_encoder_to_crt(encoder);
1450N/A u32 tmp, flags = 0;
1450N/A
1450N/A tmp = I915_READ(crt->adpa_reg);
1450N/A
1450N/A if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
1450N/A flags |= DRM_MODE_FLAG_PHSYNC;
1450N/A else
1450N/A flags |= DRM_MODE_FLAG_NHSYNC;
1450N/A
1450N/A if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
1450N/A flags |= DRM_MODE_FLAG_PVSYNC;
1450N/A else
1450N/A flags |= DRM_MODE_FLAG_NVSYNC;
1450N/A
1450N/A pipe_config->adjusted_mode.flags |= flags;
1450N/A}
1450N/A
1450N/A/* Note: The caller is required to filter out dpms modes not supported by the
1450N/A * platform. */
1450N/Astatic void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
1450N/A{
1450N/A struct drm_device *dev = encoder->base.dev;
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A struct intel_crt *crt = intel_encoder_to_crt(encoder);
1450N/A u32 temp;
1450N/A
1450N/A temp = I915_READ(crt->adpa_reg);
1450N/A temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
1450N/A temp &= ~ADPA_DAC_ENABLE;
1450N/A
1450N/A switch(mode) {
1450N/A case DRM_MODE_DPMS_ON:
1450N/A temp |= ADPA_DAC_ENABLE;
1450N/A break;
1450N/A case DRM_MODE_DPMS_STANDBY:
1450N/A temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
1450N/A break;
1450N/A case DRM_MODE_DPMS_SUSPEND:
1450N/A temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
1450N/A break;
1450N/A case DRM_MODE_DPMS_OFF:
1450N/A temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
1450N/A break;
1450N/A }
1450N/A
1450N/A I915_WRITE(crt->adpa_reg, temp);
1450N/A}
1450N/A
1450N/Astatic void intel_disable_crt(struct intel_encoder *encoder)
1450N/A{
1450N/A intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
1450N/A}
1450N/A
1450N/Astatic void intel_enable_crt(struct intel_encoder *encoder)
1450N/A{
1450N/A struct intel_crt *crt = intel_encoder_to_crt(encoder);
1450N/A
1450N/A intel_crt_set_dpms(encoder, crt->connector->base.dpms);
1450N/A}
1450N/A
1450N/A
1450N/Astatic void intel_crt_dpms(struct drm_connector *connector, int mode)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct intel_encoder *encoder = intel_attached_encoder(connector);
1450N/A struct drm_crtc *crtc;
1450N/A int old_dpms;
1450N/A
1450N/A /* PCH platforms and VLV only support on/off. */
1450N/A if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
1450N/A mode = DRM_MODE_DPMS_OFF;
1450N/A
1450N/A if (mode == connector->dpms)
1450N/A return;
1450N/A
1450N/A old_dpms = connector->dpms;
1450N/A connector->dpms = mode;
1450N/A
1450N/A /* Only need to change hw state when actually enabled */
1450N/A crtc = encoder->base.crtc;
1450N/A if (!crtc) {
1450N/A encoder->connectors_active = false;
1450N/A return;
1450N/A }
1450N/A
1450N/A /* We need the pipe to run for anything but OFF. */
1450N/A if (mode == DRM_MODE_DPMS_OFF)
1450N/A encoder->connectors_active = false;
1450N/A else
1450N/A encoder->connectors_active = true;
1450N/A
1450N/A /* We call connector dpms manually below in case pipe dpms doesn't
1450N/A * change due to cloning. */
1450N/A if (mode < old_dpms) {
1450N/A /* From off to on, enable the pipe first. */
1450N/A intel_crtc_update_dpms(crtc);
1450N/A
1450N/A intel_crt_set_dpms(encoder, mode);
1450N/A } else {
1450N/A intel_crt_set_dpms(encoder, mode);
1450N/A
1450N/A intel_crtc_update_dpms(crtc);
1450N/A }
1450N/A
1450N/A intel_modeset_check_state(connector->dev);
1450N/A}
1450N/A
1450N/Astatic int intel_crt_mode_valid(struct drm_connector *connector,
1450N/A struct drm_display_mode *mode)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A
1450N/A int max_clock = 0;
1450N/A if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1450N/A return MODE_NO_DBLESCAN;
1450N/A
1450N/A if (mode->clock < 25000)
1450N/A return MODE_CLOCK_LOW;
1450N/A
1450N/A if (IS_GEN2(dev))
1450N/A max_clock = 350000;
1450N/A else
1450N/A max_clock = 400000;
1450N/A if (mode->clock > max_clock)
1450N/A return MODE_CLOCK_HIGH;
1450N/A
1450N/A /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
1450N/A if (HAS_PCH_LPT(dev) &&
1450N/A (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
1450N/A return MODE_CLOCK_HIGH;
1450N/A
1450N/A return MODE_OK;
1450N/A}
1450N/A
1450N/Astatic bool intel_crt_compute_config(struct intel_encoder *encoder,
1450N/A struct intel_crtc_config *pipe_config)
1450N/A{
1450N/A struct drm_device *dev = encoder->base.dev;
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev))
1450N/A pipe_config->has_pch_encoder = true;
1450N/A
1450N/A /* LPT FDI RX only supports 8bpc. */
1450N/A if (HAS_PCH_LPT(dev))
1450N/A pipe_config->pipe_bpp = 24;
1450N/A
1450N/A return true;
1450N/A}
1450N/A
1450N/Astatic void intel_crt_mode_set(struct drm_encoder *encoder,
1450N/A /* LINTED */
1450N/A struct drm_display_mode *mode,
1450N/A struct drm_display_mode *adjusted_mode)
1450N/A{
1450N/A
1450N/A struct drm_device *dev = encoder->dev;
1450N/A struct drm_crtc *crtc = encoder->crtc;
1450N/A struct intel_crt *crt =
1450N/A intel_encoder_to_crt(to_intel_encoder(encoder));
1450N/A struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A u32 adpa;
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev))
1450N/A adpa = ADPA_HOTPLUG_BITS;
1450N/A else
1450N/A adpa = 0;
1450N/A
1450N/A if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1450N/A adpa |= ADPA_HSYNC_ACTIVE_HIGH;
1450N/A if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1450N/A adpa |= ADPA_VSYNC_ACTIVE_HIGH;
1450N/A
1450N/A /* For CPT allow 3 pipe config, for others just use A or B */
1450N/A /* LINTED */
1450N/A if (HAS_PCH_LPT(dev))
1450N/A ; /* Those bits don't exist here */
1450N/A else if (HAS_PCH_CPT(dev))
1450N/A adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
1450N/A else if (intel_crtc->pipe == 0)
1450N/A adpa |= ADPA_PIPE_A_SELECT;
1450N/A else
1450N/A adpa |= ADPA_PIPE_B_SELECT;
1450N/A
1450N/A if (!HAS_PCH_SPLIT(dev))
1450N/A I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
1450N/A
1450N/A I915_WRITE(crt->adpa_reg, adpa);
1450N/A}
1450N/A
1450N/Astatic bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct intel_crt *crt = intel_attached_crt(connector);
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A u32 adpa;
1450N/A bool ret;
1450N/A
1450N/A /* The first time through, trigger an explicit detection cycle */
1450N/A if (crt->force_hotplug_required) {
1450N/A bool turn_off_dac = HAS_PCH_SPLIT(dev);
1450N/A u32 save_adpa;
1450N/A
1450N/A crt->force_hotplug_required = 0;
1450N/A
1450N/A save_adpa = adpa = I915_READ(crt->adpa_reg);
1450N/A DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
1450N/A
1450N/A adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
1450N/A if (turn_off_dac)
1450N/A adpa &= ~ADPA_DAC_ENABLE;
1450N/A
1450N/A I915_WRITE(crt->adpa_reg, adpa);
1450N/A
1450N/A if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
1450N/A 1000))
1450N/A DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
1450N/A
1450N/A if (turn_off_dac) {
1450N/A I915_WRITE(crt->adpa_reg, save_adpa);
1450N/A POSTING_READ(crt->adpa_reg);
1450N/A }
1450N/A }
1450N/A
1450N/A /* Check the status to see if both blue and green are on now */
1450N/A adpa = I915_READ(crt->adpa_reg);
1450N/A if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
1450N/A ret = true;
1450N/A else
1450N/A ret = false;
1450N/A DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
1450N/A
1450N/A return ret;
1450N/A}
1450N/A
1450N/Astatic bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct intel_crt *crt = intel_attached_crt(connector);
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A u32 adpa;
1450N/A bool ret;
1450N/A u32 save_adpa;
1450N/A
1450N/A save_adpa = adpa = I915_READ(crt->adpa_reg);
1450N/A DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
1450N/A
1450N/A adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
1450N/A
1450N/A I915_WRITE(crt->adpa_reg, adpa);
1450N/A
1450N/A if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
1450N/A 1000)) {
1450N/A DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
1450N/A I915_WRITE(crt->adpa_reg, save_adpa);
1450N/A }
1450N/A
1450N/A /* Check the status to see if both blue and green are on now */
1450N/A adpa = I915_READ(crt->adpa_reg);
1450N/A if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
1450N/A ret = true;
1450N/A else
1450N/A ret = false;
1450N/A
1450N/A DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
1450N/A
1450N/A /* FIXME: debug force function and remove */
1450N/A ret = true;
1450N/A
1450N/A return ret;
1450N/A}
1450N/A
1450N/A/**
1450N/A * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
1450N/A *
1450N/A * Not for i915G/i915GM
1450N/A *
1450N/A * \return true if CRT is connected.
1450N/A * \return false if CRT is disconnected.
1450N/A */
1450N/Astatic bool intel_crt_detect_hotplug(struct drm_connector *connector)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A u32 hotplug_en, orig, stat;
1450N/A bool ret = false;
1450N/A int i, tries = 0;
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev))
1450N/A return intel_ironlake_crt_detect_hotplug(connector);
1450N/A
1450N/A if (IS_VALLEYVIEW(dev))
1450N/A return valleyview_crt_detect_hotplug(connector);
1450N/A
1450N/A /*
1450N/A * On 4 series desktop, CRT detect sequence need to be done twice
1450N/A * to get a reliable result.
1450N/A */
1450N/A
1450N/A if (IS_G4X(dev) && !IS_GM45(dev))
1450N/A tries = 2;
1450N/A else
1450N/A tries = 1;
1450N/A hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
1450N/A hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
1450N/A
1450N/A for (i = 0; i < tries ; i++) {
1450N/A /* turn on the FORCE_DETECT */
1450N/A I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
1450N/A /* wait for FORCE_DETECT to go off */
1450N/A if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
1450N/A CRT_HOTPLUG_FORCE_DETECT) == 0,
1450N/A 1000))
1450N/A DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
1450N/A }
1450N/A
1450N/A stat = I915_READ(PORT_HOTPLUG_STAT);
1450N/A if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
1450N/A ret = true;
1450N/A
1450N/A /* clear the interrupt we just generated, if any */
1450N/A I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
1450N/A
1450N/A /* and put the bits back */
1450N/A I915_WRITE(PORT_HOTPLUG_EN, orig);
1450N/A
1450N/A return ret;
1450N/A}
1450N/A
1450N/Astatic struct edid *intel_crt_get_edid(struct drm_connector *connector,
1450N/A struct i2c_adapter *i2c)
1450N/A{
1450N/A struct edid *edid;
1450N/A
1450N/A edid = drm_get_edid(connector, i2c);
1450N/A
1450N/A if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
1450N/A DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
1450N/A intel_gmbus_force_bit(i2c, true);
1450N/A edid = drm_get_edid(connector, i2c);
1450N/A intel_gmbus_force_bit(i2c, false);
1450N/A }
1450N/A
1450N/A return edid;
1450N/A}
1450N/A
1450N/A/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
1450N/Astatic int intel_crt_ddc_get_modes(struct drm_connector *connector,
1450N/A struct i2c_adapter *adapter)
1450N/A{
1450N/A struct edid *edid;
1450N/A int ret;
1450N/A
1450N/A edid = intel_crt_get_edid(connector, adapter);
1450N/A if (!edid)
1450N/A return 0;
1450N/A
1450N/A ret = intel_connector_update_modes(connector, edid);
1450N/A kfree(edid, (EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1)));
1450N/A return ret;
1450N/A}
1450N/A
1450N/Astatic bool intel_crt_detect_ddc(struct drm_connector *connector)
1450N/A{
1450N/A struct intel_crt *crt = intel_attached_crt(connector);
1450N/A struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
1450N/A struct edid *edid;
1450N/A struct i2c_adapter *i2c;
1450N/A
1450N/A BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
1450N/A
1450N/A i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
1450N/A edid = intel_crt_get_edid(connector, i2c);
1450N/A
1450N/A if (edid) {
1450N/A bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
1450N/A
1450N/A kfree(edid, EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1));
1450N/A /*
1450N/A * This may be a DVI-I connector with a shared DDC
1450N/A * link between analog and digital outputs, so we
1450N/A * have to check the EDID input spec of the attached device.
1450N/A */
1450N/A if (!is_digital) {
1450N/A DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
1450N/A return true;
1450N/A }
1450N/A
1450N/A DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
1450N/A
1450N/A } else {
1450N/A DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
1450N/A }
1450N/A
1450N/A return false;
1450N/A}
1450N/A
1450N/Astatic enum drm_connector_status
1450N/Aintel_crt_load_detect(struct intel_crt *crt)
1450N/A{
1450N/A struct drm_device *dev = crt->base.base.dev;
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
1450N/A uint32_t save_bclrpat;
1450N/A uint32_t save_vtotal;
1450N/A uint32_t vtotal, vactive;
1450N/A uint32_t vsample;
1450N/A uint32_t vblank, vblank_start, vblank_end;
1450N/A uint32_t dsl;
1450N/A uint32_t bclrpat_reg;
1450N/A uint32_t vtotal_reg;
1450N/A uint32_t vblank_reg;
1450N/A uint32_t vsync_reg;
1450N/A uint32_t pipeconf_reg;
1450N/A uint32_t pipe_dsl_reg;
1450N/A uint8_t st00;
1450N/A enum drm_connector_status status;
1450N/A
1450N/A DRM_DEBUG_KMS("starting load-detect on CRT\n");
1450N/A
1450N/A bclrpat_reg = BCLRPAT(pipe);
1450N/A vtotal_reg = VTOTAL(pipe);
1450N/A vblank_reg = VBLANK(pipe);
1450N/A vsync_reg = VSYNC(pipe);
1450N/A pipeconf_reg = PIPECONF(pipe);
1450N/A pipe_dsl_reg = PIPEDSL(pipe);
1450N/A
1450N/A save_bclrpat = I915_READ(bclrpat_reg);
1450N/A save_vtotal = I915_READ(vtotal_reg);
1450N/A vblank = I915_READ(vblank_reg);
1450N/A
1450N/A vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
1450N/A vactive = (save_vtotal & 0x7ff) + 1;
1450N/A
1450N/A vblank_start = (vblank & 0xfff) + 1;
1450N/A vblank_end = ((vblank >> 16) & 0xfff) + 1;
1450N/A
1450N/A /* Set the border color to purple. */
1450N/A I915_WRITE(bclrpat_reg, 0x500050);
1450N/A
1450N/A if (!IS_GEN2(dev)) {
1450N/A uint32_t pipeconf = I915_READ(pipeconf_reg);
1450N/A I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
1450N/A POSTING_READ(pipeconf_reg);
1450N/A /* Wait for next Vblank to substitue
1450N/A * border color for Color info */
1450N/A intel_wait_for_vblank(dev, pipe);
1450N/A st00 = I915_READ8(VGA_MSR_WRITE);
1450N/A status = ((st00 & (1 << 4)) != 0) ?
1450N/A connector_status_connected :
1450N/A connector_status_disconnected;
1450N/A
1450N/A I915_WRITE(pipeconf_reg, pipeconf);
1450N/A } else {
1450N/A bool restore_vblank = false;
1450N/A int count, detect;
1450N/A
1450N/A /*
1450N/A * If there isn't any border, add some.
1450N/A * Yes, this will flicker
1450N/A */
1450N/A if (vblank_start <= vactive && vblank_end >= vtotal) {
1450N/A uint32_t vsync = I915_READ(vsync_reg);
1450N/A uint32_t vsync_start = (vsync & 0xffff) + 1;
1450N/A
1450N/A vblank_start = vsync_start;
1450N/A I915_WRITE(vblank_reg,
1450N/A (vblank_start - 1) |
1450N/A ((vblank_end - 1) << 16));
1450N/A restore_vblank = true;
1450N/A }
1450N/A /* sample in the vertical border, selecting the larger one */
1450N/A if (vblank_start - vactive >= vtotal - vblank_end)
1450N/A vsample = (vblank_start + vactive) >> 1;
1450N/A else
1450N/A vsample = (vtotal + vblank_end) >> 1;
1450N/A
1450N/A /*
1450N/A * Wait for the border to be displayed
1450N/A */
1450N/A while (I915_READ(pipe_dsl_reg) >= vactive)
1450N/A ;
1450N/A while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
1450N/A ;
1450N/A /*
1450N/A * Watch ST00 for an entire scanline
1450N/A */
1450N/A detect = 0;
1450N/A count = 0;
1450N/A do {
1450N/A count++;
1450N/A /* Read the ST00 VGA status register */
1450N/A st00 = I915_READ8(VGA_MSR_WRITE);
1450N/A if (st00 & (1 << 4))
1450N/A detect++;
1450N/A } while ((I915_READ(pipe_dsl_reg) == dsl));
1450N/A
1450N/A /* restore vblank if necessary */
1450N/A if (restore_vblank)
1450N/A I915_WRITE(vblank_reg, vblank);
1450N/A /*
1450N/A * If more than 3/4 of the scanline detected a monitor,
1450N/A * then it is assumed to be present. This works even on i830,
1450N/A * where there isn't any way to force the border color across
1450N/A * the screen
1450N/A */
1450N/A status = detect * 4 > count * 3 ?
1450N/A connector_status_connected :
1450N/A connector_status_disconnected;
1450N/A }
1450N/A
1450N/A /* Restore previous settings */
1450N/A I915_WRITE(bclrpat_reg, save_bclrpat);
1450N/A
1450N/A return status;
1450N/A}
1450N/A
1450N/Astatic enum drm_connector_status
1450N/Aintel_crt_detect(struct drm_connector *connector, bool force)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct intel_crt *crt = intel_attached_crt(connector);
1450N/A enum drm_connector_status status;
1450N/A struct intel_load_detect_pipe tmp;
1450N/A
1450N/A if (I915_HAS_HOTPLUG(dev)) {
1450N/A /* We can not rely on the HPD pin always being correctly wired
1450N/A * up, for example many KVM do not pass it through, and so
1450N/A * only trust an assertion that the monitor is connected.
1450N/A */
1450N/A if (intel_crt_detect_hotplug(connector)) {
1450N/A DRM_DEBUG_KMS("CRT detected via hotplug\n");
1450N/A return connector_status_connected;
1450N/A } else
1450N/A DRM_DEBUG_KMS("CRT not detected via hotplug\n");
1450N/A }
1450N/A
1450N/A if (intel_crt_detect_ddc(connector))
1450N/A return connector_status_connected;
1450N/A
1450N/A /* Load detection is broken on HPD capable machines. Whoever wants a
1450N/A * broken monitor (without edid) to work behind a broken kvm (that fails
1450N/A * to have the right resistors for HP detection) needs to fix this up.
1450N/A * For now just bail out. */
1450N/A if (I915_HAS_HOTPLUG(dev))
1450N/A return connector_status_disconnected;
1450N/A
1450N/A if (!force)
1450N/A return connector->status;
1450N/A
1450N/A /* for pre-945g platforms use load detect */
1450N/A if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
1450N/A if (intel_crt_detect_ddc(connector))
1450N/A status = connector_status_connected;
1450N/A else
1450N/A status = intel_crt_load_detect(crt);
1450N/A intel_release_load_detect_pipe(connector, &tmp);
1450N/A } else
1450N/A status = connector_status_unknown;
1450N/A
1450N/A return status;
1450N/A}
1450N/A
1450N/Astatic void intel_crt_destroy(struct drm_connector *connector)
1450N/A{
1450N/A /* OSOL_i915: drm_sysfs_connector_remove(connector); */
1450N/A drm_connector_cleanup(connector);
1450N/A kfree(connector, sizeof (struct intel_connector));
1450N/A}
1450N/A
1450N/Astatic int intel_crt_get_modes(struct drm_connector *connector)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A int ret;
1450N/A struct i2c_adapter *i2c;
1450N/A
1450N/A i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
1450N/A ret = intel_crt_ddc_get_modes(connector, i2c);
1450N/A if (ret || !IS_G4X(dev))
1450N/A return ret;
1450N/A
1450N/A /* Try to probe digital port for output in DVI-I -> VGA mode. */
1450N/A i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1450N/A return intel_crt_ddc_get_modes(connector, i2c);
1450N/A}
1450N/A
1450N/A/* LINTED */
1450N/Astatic int intel_crt_set_property(struct drm_connector *connector,
1450N/A /* LINTED */
1450N/A struct drm_property *property,
1450N/A /* LINTED */
1450N/A uint64_t value)
1450N/A{
1450N/A return 0;
1450N/A}
1450N/A
1450N/Astatic void intel_crt_reset(struct drm_connector *connector)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A struct intel_crt *crt = intel_attached_crt(connector);
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev)) {
1450N/A u32 adpa;
1450N/A
1450N/A adpa = I915_READ(crt->adpa_reg);
1450N/A adpa &= ~ADPA_CRT_HOTPLUG_MASK;
1450N/A adpa |= ADPA_HOTPLUG_BITS;
1450N/A I915_WRITE(crt->adpa_reg, adpa);
1450N/A POSTING_READ(crt->adpa_reg);
1450N/A
1450N/A DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
1450N/A crt->force_hotplug_required = 1;
1450N/A }
1450N/A}
1450N/A
1450N/A/*
1450N/A * Routines for controlling stuff on the analog port
1450N/A */
1450N/A
1450N/Astatic const struct drm_encoder_helper_funcs crt_encoder_funcs = {
1450N/A .mode_set = intel_crt_mode_set,
1450N/A};
1450N/A
1450N/Astatic const struct drm_connector_funcs intel_crt_connector_funcs = {
1450N/A .reset = intel_crt_reset,
1450N/A .dpms = intel_crt_dpms,
1450N/A .detect = intel_crt_detect,
1450N/A .fill_modes = drm_helper_probe_single_connector_modes,
1450N/A .destroy = intel_crt_destroy,
1450N/A .set_property = intel_crt_set_property,
1450N/A};
1450N/A
1450N/Astatic const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
1450N/A .mode_valid = intel_crt_mode_valid,
1450N/A .get_modes = intel_crt_get_modes,
1450N/A .best_encoder = intel_best_encoder,
1450N/A};
1450N/A
1450N/Astatic const struct drm_encoder_funcs intel_crt_enc_funcs = {
1450N/A .destroy = intel_encoder_destroy,
1450N/A};
1450N/A
1450N/Avoid intel_crt_init(struct drm_device *dev)
1450N/A{
1450N/A struct drm_connector *connector;
1450N/A struct intel_crt *crt;
1450N/A struct intel_connector *intel_connector;
1450N/A struct drm_i915_private *dev_priv = dev->dev_private;
1450N/A
1450N/A /* Skip machines without VGA that falsely report hotplug events */
1450N/A
1450N/A crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
1450N/A if (!crt)
1450N/A return;
1450N/A
1450N/A intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
1450N/A if (!intel_connector) {
1450N/A kfree(crt, sizeof(struct intel_crt));
1450N/A return;
1450N/A }
1450N/A
1450N/A connector = &intel_connector->base;
1450N/A crt->connector = intel_connector;
1450N/A (void) drm_connector_init(dev, &intel_connector->base,
1450N/A &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
1450N/A
1450N/A (void) drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
1450N/A DRM_MODE_ENCODER_DAC);
1450N/A
1450N/A intel_connector_attach_encoder(intel_connector, &crt->base);
1450N/A
1450N/A crt->base.type = INTEL_OUTPUT_ANALOG;
1450N/A crt->base.type_size = sizeof(struct intel_crt);
1450N/A crt->base.cloneable = true;
1450N/A if (IS_I830(dev))
1450N/A crt->base.crtc_mask = (1 << 0);
1450N/A else
1450N/A crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1450N/A
1450N/A if (IS_GEN2(dev))
1450N/A connector->interlace_allowed = 0;
1450N/A else
1450N/A connector->interlace_allowed = 1;
1450N/A connector->doublescan_allowed = 0;
1450N/A
1450N/A if (HAS_PCH_SPLIT(dev))
1450N/A crt->adpa_reg = PCH_ADPA;
1450N/A else if (IS_VALLEYVIEW(dev))
1450N/A crt->adpa_reg = VLV_ADPA;
1450N/A else
1450N/A crt->adpa_reg = ADPA;
1450N/A
1450N/A crt->base.compute_config = intel_crt_compute_config;
1450N/A crt->base.disable = intel_disable_crt;
1450N/A crt->base.enable = intel_enable_crt;
1450N/A crt->base.get_config = intel_crt_get_config;
1450N/A if (I915_HAS_HOTPLUG(dev))
1450N/A crt->base.hpd_pin = HPD_CRT;
1450N/A if (HAS_DDI(dev))
1450N/A crt->base.get_hw_state = intel_ddi_get_hw_state;
1450N/A else
1450N/A crt->base.get_hw_state = intel_crt_get_hw_state;
1450N/A intel_connector->get_hw_state = intel_connector_get_hw_state;
1450N/A
1450N/A drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
1450N/A (void) drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
1450N/A
1450N/A /* OSOL_i915: drm_sysfs_connector_add(connector); */
1450N/A
1450N/A if (!I915_HAS_HOTPLUG(dev))
1450N/A intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1450N/A
1450N/A /*
1450N/A * Configure the automatic hotplug detection stuff
1450N/A */
1450N/A crt->force_hotplug_required = 0;
1450N/A
1450N/A /*
1450N/A * TODO: find a proper way to discover whether we need to set the the
1450N/A * polarity and link reversal bits or not, instead of relying on the
1450N/A * BIOS.
1450N/A */
1450N/A if (HAS_PCH_LPT(dev)) {
1450N/A u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
1450N/A FDI_RX_LINK_REVERSAL_OVERRIDE;
1450N/A
1450N/A dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
1450N/A }
1450N/A}