1450N/A * Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved. 1450N/A * Copyright (C) The Weather Channel, Inc. 2002. 1450N/A * Copyright (C) 2004 Nicolai Haehnle. 1450N/A * The Weather Channel (TM) funded Tungsten Graphics to develop the 1450N/A * initial release of the Radeon 8500 driver under the XFree86 license. 1450N/A * This notice must be preserved. 1450N/A * Permission is hereby granted, free of charge, to any person obtaining a 1450N/A * copy of this software and associated documentation files (the "Software"), 1450N/A * to deal in the Software without restriction, including without limitation 1450N/A * the rights to use, copy, modify, merge, publish, distribute, sublicense, 1450N/A * and/or sell copies of the Software, and to permit persons to whom the 1450N/A * Software is furnished to do so, subject to the following conditions: 1450N/A * The above copyright notice and this permission notice (including the next 1450N/A * paragraph) shall be included in all copies or substantial portions of the 1450N/A * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1450N/A * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1450N/A * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1450N/A * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 1450N/A * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 1450N/A * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 1450N/A * DEALINGS IN THE SOFTWARE. 1450N/A * Nicolai Haehnle <prefect_@gmx.net> 1450N/A * Values for R300_RE_CLIPRECT_CNTL depending on the number of 1450N/A * Emit up to R300_SIMULTANEOUS_CLIPRECTS cliprects from the given command 1450N/A * buffer, starting with index n. 1450N/A * the client might be able to trample over memory. 1450N/A * The impact should be very limited, but I'd rather be safe 1450N/A * Why we allow zero cliprect rendering: 1450N/A * There are some commands in a command buffer that must be 1450N/A * submitted even when there are no cliprects, e.g. DMA buffer 1450N/A * discard or state setting (though state setting could be 1450N/A * avoided by simulating a loss of context). 1450N/A * Now since the cmdbuf interface is so chaotic right now (and 1450N/A * is bound to remain that way for a bit until things settle 1450N/A * down), it is basically impossible to filter out the commands 1450N/A * that are necessary and those that aren't. 1450N/A * So I choose the safe way and don't do any filtering at all; 1450N/A * instead, I simply set up the engine so that all rendering 1450N/A * can't produce any fragments. 1450N/A /* Texture offset is dangerous and needs more checking */ 1450N/A /* Sporadic registers used as primitives are emitted */ 1450N/A * Emits a packet0 setting arbitrary registers. 1450N/A * Called by r300_do_cp_cmdbuf. 1450N/A * Note that checks are performed on contents and addresses of the registers 1450N/A /* go and check everything */ 1450N/A * the rest of the data is safe to emit, whatever the values 1450N/A * Uploads user-supplied vertex program instructions or parameters onto 1450N/A * Called by r300_do_cp_cmdbuf. 1450N/A /* Wait for VAP to come to senses.. */ 1450N/A * there is no need to emit it multiple times, (only once before 1450N/A * VAP is programmed, but this optimization is for later 1450N/A * Emit a clear packet from userspace. 1450N/A * Called by r300_emit_packet3. 1450N/A /* carefully check packet contents */ 1450N/A i++;
/* skip attribute field */ 1450N/A "while processing 3D_LOAD_VBPNTR packet.\n",
1450N/A /* have one more to process, they come in pairs */ 1450N/A "while processing 3D_LOAD_VBPNTR packet.\n",
1450N/A /* do the counts match what we expect ? */ 1450N/A "(k=%d i=%d narrays=%d count+1=%d).\n",
1450N/A /* all clear, output packet */ 1450N/A if ((
cmd[
1] &
0x8000ffff) !=
0x80000810) {
1450N/A * Fixme !! This simply emits a packet without much checking. 1450N/A /* obtain first word - actual packet3 header */ 1450N/A /* Check again now that we know how much data to expect */ 1450N/A /* Is it a packet type we know about ? */ 1450N/A // DRAW_INDX_2 without INDX_BUFFER seems to lock 1450N/A /* triggers drawing using in-packet vertex data */ 1450N/A /* triggers drawing of vertex buffers setup elsewhere */ 1450N/A /* triggers drawing using indices to vertex buffer */ 1450N/A /* these packets are safe */ 1450N/A * Emit a rendering packet3 from userspace. 1450N/A * Called by r300_do_cp_cmdbuf. 1450N/A * This is a do-while-loop so that we run the interior at least once, 1450N/A * even if cmdbuf->nbox is 0. Compare r300_emit_cliprects for rationale. 1450N/A * Some of the R300 chips seem to be extremely touchy about the two registers 1450N/A * that are configured in r300_pacify. 1450N/A * Among the worst offenders seems to be the R300 ND (0x4E44): When userspace 1450N/A * sends a command buffer that contains only state setting commands and a 1450N/A * lockup, unless the sequence is bracketed by calls to r300_pacify. 1450N/A * So we should take great care to *always* call r300_pacify before 1450N/A * *anything* 3D related, and again afterwards. This is what the 1450N/A * call bracket in r300_do_cp_cmdbuf is for. 1450N/A * Emit the sequence to pacify R300. 1450N/A * Called by r300_do_cp_cmdbuf to update the internal buffer age and state. 1450N/A * The actual age emit is done by r300_do_cp_cmdbuf, which is why you must 1450N/A * be careful about how this function is called. 1450N/A * Parses and validates a user-supplied command buffer and emits appropriate 1450N/A * commands on the DMA ring buffer. 1450N/A * Called by the ioctl handler function radeon_cp_cmdbuf. 1450N/A * See the comment above r300_emit_begin3d for why this call 1450N/A * must be here, and what the cleanup gotos are for. 1450N/A * Ideally userspace driver should not need to issue 1450N/A * this call, i.e. the drm driver should issue it 1450N/A * automatically and prevent lockups. In practice, we 1450N/A * do not understand why this call is needed and what 1450N/A * it does (except for some vague guesses that it has 1450N/A * to do with cache coherence) and so the user space 1450N/A * Once we are sure which uses prevent lockups the code 1450N/A * could be moved into the kernel and the userspace 1450N/A * driver will not need to use this command. 1450N/A * Note that issuing this command does not hurt anything 1450N/A * except, possibly, performance 1450N/A /* simple enough, we can do it here */ 1450N/A /* simple enough, we can do it here */ 1450N/A * We emit the vertex buffer age here, outside the pacifier "brackets" 1450N/A * (1) This may coalesce multiple age emissions into a single one and 1450N/A * (2) more importantly, some chips lock up hard when scratch registers 1450N/A * are written inside the pacifier bracket. 1450N/A /* Emit the vertex buffer age */