1450N/A/*
1450N/A * Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.
1450N/A */
1450N/A
1450N/A#ifndef _EFB_H
1450N/A#define _EFB_H
1450N/A
1450N/A#include <sys/visual_io.h>
1450N/A#include "drm_sunmod.h"
1450N/A#include <sys/gfx_common.h>
1450N/A#include "efb_vis.h"
1450N/A#include "efb_reg.h"
1450N/A
1450N/A#define regr(a) (*(volatile uint32_t *)(registers+(a)))
1450N/A#define regr8(a) (*(volatile uint8_t *)(registers+(a)))
1450N/A#define regr16(a) (*(volatile uint16_t *)(registers+(a)))
1450N/A
1450N/A#define regw(a, d) (regr(a) = (d))
1450N/A#define regw8(a, d) (regr8(a) = (d))
1450N/A
1450N/A#define EFB_REG_SIZE (256 * 1024)
1450N/A#define EFB_CMAP_ENTRIES 256
1450N/A
1450N/A#define EFB_VRT_MASK 0x0000001f
1450N/A#define EFB_VRT_CMAP 0x00000002 /* colormap update */
1450N/A
1450N/A/* Power */
1450N/A#define EFB_PM_COMPONENTS 2 /* number of components */
1450N/A#define EFB_PM_BOARD 0 /* component 0 : board */
1450N/A#define EFB_PM_MONITOR 1 /* component 1 : display */
1450N/A#define EFB_PM_MONITOR2 2 /* reserved */
1450N/A
1450N/A/* Power levels */
1450N/A#define EFB_PWR_UNKNOWN (-1)
1450N/A#define EFB_PWR_OFF 0
1450N/A#define EFB_PWR_SUSP 1
1450N/A#define EFB_PWR_STDBY 2
1450N/A#define EFB_PWR_ON 3
1450N/A
1450N/Atypedef struct efb_private efb_private_t;
1450N/Atypedef struct efb_context efb_context_t;
1450N/Atypedef struct efb_mapinfo efb_mapinfo_t;
1450N/A
1450N/Astruct efb_mapinfo {
1450N/A drm_inst_state_t *mstate;
1450N/A efb_private_t *efb_priv;
1450N/A devmap_cookie_t *dhp;
1450N/A offset_t off;
1450N/A size_t len;
1450N/A efb_context_t *ctx;
1450N/A efb_mapinfo_t *next;
1450N/A efb_mapinfo_t *prev;
1450N/A};
1450N/A
1450N/Astruct efb_context {
1450N/A drm_inst_state_t *mstate;
1450N/A void *mappings;
1450N/A struct drm_radeon_driver_file_fields *md;
1450N/A uint32_t default_pitch_offset;
1450N/A uint32_t dst_pitch_offset;
1450N/A uint32_t src_pitch_offset;
1450N/A uint32_t default_sc_bottom_right;
1450N/A uint32_t dp_gui_master_cntl;
1450N/A uint32_t dst_line_start;
1450N/A uint32_t dst_line_end;
1450N/A uint32_t rb3d_cntl;
1450N/A uint32_t dp_write_mask;
1450N/A uint32_t dp_mix;
1450N/A uint32_t dp_datatype;
1450N/A uint32_t dp_cntl;
1450N/A uint32_t src_y;
1450N/A uint32_t src_x;
1450N/A uint32_t dst_y;
1450N/A uint32_t dst_x;
1450N/A uint16_t colormap[3][EFB_CMAP_ENTRIES];
1450N/A
1450N/A efb_context_t *next;
1450N/A};
1450N/A
1450N/A
1450N/Astruct efb_private {
1450N/A dev_info_t *dip;
1450N/A ddi_acc_handle_t pci_handle;
1450N/A uint_t flags;
1450N/A volatile caddr_t registers;
1450N/A ddi_acc_handle_t registersmap;
1450N/A int w[2];
1450N/A int h[2];
1450N/A int depth[2];
1450N/A int stride[2];
1450N/A
1450N/A uint16_t colormap[4][3][EFB_CMAP_ENTRIES];
1450N/A uint8_t cmap_flags[2][EFB_CMAP_ENTRIES];
1450N/A int power_level[3];
1450N/A int primary_stream;
1450N/A
1450N/A struct gfx_video_mode videomode;
1450N/A
1450N/A struct video_state {
1450N/A uint32_t clock_cntl_index;
1450N/A uint32_t crtc_ext_cntl;
1450N/A uint32_t crtc_gen_cntl;
1450N/A uint32_t crtc_h_sync_strt_wid;
1450N/A uint32_t crtc_h_total_disp;
1450N/A uint32_t crtc_v_sync_strt_wid;
1450N/A uint32_t crtc_v_total_disp;
1450N/A uint32_t crtc_offset;
1450N/A uint32_t crtc_offset_cntl;
1450N/A uint32_t crtc_pitch;
1450N/A uint32_t dac_cntl;
1450N/A uint32_t dac_macro_cntl;
1450N/A uint32_t crtc2_gen_cntl;
1450N/A uint32_t crtc2_h_sync_strt_wid;
1450N/A uint32_t crtc2_h_total_disp;
1450N/A uint32_t crtc2_v_sync_strt_wid;
1450N/A uint32_t crtc2_v_total_disp;
1450N/A uint32_t crtc2_offset;
1450N/A uint32_t crtc2_offset_cntl;
1450N/A uint32_t crtc2_pitch;
1450N/A uint32_t dac_cntl2;
1450N/A uint32_t fp_gen_cntl;
1450N/A uint32_t fp_h_sync_strt_wid;
1450N/A uint32_t fp_h2_sync_strt_wid;
1450N/A uint32_t fp_v_sync_strt_wid;
1450N/A uint32_t fp_v2_sync_strt_wid;
1450N/A uint32_t lvds_gen_cntl;
1450N/A uint32_t lvds_pll_cntl;
1450N/A uint32_t tmds_cntl;
1450N/A uint32_t tmds_pll_cntl;
1450N/A uint32_t tmds_transmitter_cntl;
1450N/A uint32_t tv_dac_cntl;
1450N/A uint32_t disp_hw_debug;
1450N/A
1450N/A /* DAC registers */
1450N/A uint32_t htotal_cntl;
1450N/A uint32_t htotal2_cntl;
1450N/A uint32_t pixclks_cntl;
1450N/A uint32_t ppll_cntl;
1450N/A uint32_t ppll_div_0;
1450N/A uint32_t ppll_ref_div;
1450N/A uint32_t p2pll_cntl;
1450N/A uint32_t p2pll_div_0;
1450N/A uint32_t p2pll_ref_div;
1450N/A uint32_t clk_pwrmgt_cntl;
1450N/A } saved_video_state;
1450N/A
1450N/A efb_context_t *contexts;
1450N/A void *cur_ctx;
1450N/A
1450N/A#if VIS_CONS_REV > 2
1450N/A struct efb_consinfo consinfo;
1450N/A int setting_videomode;
1450N/A#endif
1450N/A
1450N/A};
1450N/A
1450N/Aextern void efb_init(void *, struct cb_ops *, drm_driver_t *);
1450N/Aextern int efb_attach(drm_device_t *);
1450N/Aextern void efb_detach(drm_device_t *);
1450N/Aextern int efb_ioctl(dev_t, int, intptr_t, int, cred_t *, int *);
1450N/Aextern int efb_map_registers(drm_device_t *);
1450N/Aextern void efb_unmap_registers(drm_device_t *);
1450N/Aextern void efb_delay(clock_t);
1450N/A
1450N/Aextern void efb_getsize(efb_private_t *);
1450N/Aextern void efb_cmap_write(efb_private_t *, int);
1450N/Aextern void efb_cmap_read(efb_private_t *, int, int, int);
1450N/A
1450N/Aextern int efb_wait_fifo(efb_private_t *, int, const char *, int);
1450N/Aextern int efb_wait_idle(efb_private_t *, const char *, int);
1450N/Aextern int efb_wait_host_data(efb_private_t *, const char *, int);
1450N/A
1450N/Aextern int efb_vis_devinit(drm_device_t *, caddr_t, int);
1450N/Aextern int efb_vis_devfini(drm_device_t *, caddr_t, int);
1450N/Aextern int efb_vis_consdisplay(drm_device_t *, caddr_t, int);
1450N/Aextern int efb_vis_conscopy(drm_device_t *, caddr_t, int);
1450N/Aextern int efb_vis_conscursor(drm_device_t *, caddr_t, int);
1450N/Aextern int efb_vis_putcmap(drm_device_t *, caddr_t, int);
1450N/Aextern void efb_termemu_callback(drm_device_t *);
1450N/A
1450N/Aextern void * efb_devmap_set_callbacks(int);
1450N/A
1450N/Aextern int efb_ctx_make_current(efb_private_t *efb_priv,
1450N/A efb_context_t *ctx);
1450N/Aextern void efb_ctx_wait(efb_private_t *);
1450N/Aextern void efb_ctx_save(efb_private_t *, efb_context_t *);
1450N/A
1450N/A#endif /* _EFB_H */