1450N/A/*
1450N/A * Copyright (c) 2006, 2011, Oracle and/or its affiliates. All rights reserved.
1450N/A */
1450N/A
1450N/A/*
1450N/A * Common misc module interfaces of DRM under Solaris
1450N/A */
1450N/A
1450N/A/*
1450N/A * I915 DRM Driver for Solaris
1450N/A *
1450N/A * This driver provides the hardware 3D acceleration support for Intel
1450N/A * integrated video devices (e.g. i8xx/i915/i945 series chipsets), under the
1450N/A * DRI (Direct Rendering Infrastructure). DRM (Direct Rendering Manager) here
1450N/A * means the kernel device driver in DRI.
1450N/A *
1450N/A * I915 driver is a device dependent driver only, it depends on a misc module
1450N/A * named drm for generic DRM operations.
1450N/A *
1450N/A * This driver also calls into gfx and agpmaster misc modules respectively for
1450N/A * generic graphics operations and AGP master device support.
1450N/A */
1450N/A
1450N/A#ifndef _SYS_DRM_SUNMOD_H_
1450N/A#define _SYS_DRM_SUNMOD_H_
1450N/A
1450N/A#ifdef __cplusplus
1450N/Aextern "C" {
1450N/A#endif
1450N/A
1450N/A#include <sys/types.h>
1450N/A#include <sys/errno.h>
1450N/A#include <sys/conf.h>
1450N/A#include <sys/kmem.h>
1450N/A#include <sys/visual_io.h>
1450N/A#include <sys/fbio.h>
1450N/A#include <sys/ddi.h>
1450N/A#include <sys/sunddi.h>
1450N/A#include <sys/stat.h>
1450N/A#include <sys/file.h>
1450N/A#include <sys/open.h>
1450N/A#include <sys/modctl.h>
1450N/A#ifdef __x86
1450N/A#include <sys/font.h>
1450N/A#include <sys/vgareg.h>
1450N/A#include <sys/vgasubr.h>
1450N/A#include <sys/kd.h>
1450N/A#endif /* x86 */
1450N/A#include <sys/pci.h>
1450N/A#include <sys/ddi_impldefs.h>
1450N/A#include <sys/sunldi.h>
1450N/A#include <sys/mkdev.h>
1450N/A#ifdef __x86
1450N/A#include <gfx_private.h>
1450N/A#include <sys/agpgart.h>
1450N/A#include <sys/agp/agpdefs.h>
1450N/A#include <sys/agp/agpmaster_io.h>
1450N/A#endif /* x86 */
1450N/A#include "drmP.h"
1450N/A#include <sys/modctl.h>
1450N/A
1450N/A/*
1450N/A * dev_t of this driver looks consists of:
1450N/A *
1450N/A * major number with NBITSMAJOR bits
1450N/A * instance node number with NBITSINST bits
1450N/A * minor node number with NBITSMINOR - NBITSINST bits
1450N/A *
1450N/A * Each instance has at most 2^(NBITSMINOR - NBITSINST) minor nodes, the first
1450N/A * three are:
1450N/A * 0: gfx<instance number>, graphics common node
1450N/A * 1: agpmaster<instance number>, agpmaster node
1450N/A * 2: drm<instance number>, drm node
1450N/A */
1450N/A#define GFX_MINOR 0
1450N/A#define AGPMASTER_MINOR 1
1450N/A#define DRM_MINOR 2
1450N/A#define DRM_MIN_CLONEMINOR 3
1450N/A
1450N/A/*
1450N/A * Number of bits occupied by instance number in dev_t, currently maximum 8
1450N/A * instances are supported.
1450N/A */
1450N/A#define NBITSINST 3
1450N/A
1450N/A/* Number of bits occupied in dev_t by minor node */
1450N/A#define NBITSMNODE (18 - NBITSINST)
1450N/A
1450N/A/*
1450N/A * DRM use a "cloning" minor node mechanism to release lock on every close(2),
1450N/A * thus there will be a minor node for every open(2) operation. Here we give
1450N/A * the maximum DRM cloning minor node number.
1450N/A */
1450N/A#define MAX_CLONE_MINOR (1 << (NBITSMNODE) - 1)
1450N/A#define DEV2MINOR(dev) (getminor(dev) & ((1 << (NBITSMNODE)) - 1))
1450N/A#define DEV2INST(dev) (getminor(dev) >> NBITSMNODE)
1450N/A#define INST2NODE0(inst) ((inst) << NBITSMNODE)
1450N/A#define INST2NODE1(inst) (((inst) << NBITSMNODE) + AGPMASTER_MINOR)
1450N/A#define INST2NODE2(inst) (((inst) << NBITSMNODE) + DRM_MINOR)
1450N/A
1450N/A/* graphics name for the common graphics minor node */
1450N/A#define GFX_NAME "gfx"
1450N/A
1450N/A
1450N/A/*
1450N/A * softstate for DRM module
1450N/A */
1450N/Atypedef struct drm_instance_state {
1450N/A kmutex_t mis_lock;
1450N/A kmutex_t dis_ctxlock;
1450N/A major_t mis_major;
1450N/A dev_info_t *mis_dip;
1450N/A drm_device_t *mis_devp;
1450N/A ddi_acc_handle_t mis_cfg_hdl;
1450N/A#ifdef __x86
1450N/A agp_master_softc_t *mis_agpm; /* agpmaster softstate ptr */
1450N/A gfxp_vgatext_softc_ptr_t mis_gfxp; /* gfx softstate */
1450N/A#else
1450N/A void *mis_agpm; /* agpmaster softstate ptr */
1450N/A void *mis_gfxp; /* gfx softstate */
1450N/A#endif /* x86 */
1450N/A} drm_inst_state_t;
1450N/A
1450N/A
1450N/Astruct drm_inst_state_list {
1450N/A drm_inst_state_t disl_state;
1450N/A struct drm_inst_state_list *disl_next;
1450N/A
1450N/A};
1450N/Atypedef struct drm_inst_state_list drm_inst_list_t;
1450N/A
1450N/Aextern drm_inst_state_t *drm_sup_devt_to_state(dev_t);
1450N/Aextern drm_cminor_t *drm_find_minordev(drm_inst_state_t *mstate, dev_t dev);
1450N/A
1450N/A
1450N/A#define PCI_CONF_CAP_MASK 0x10
1450N/A#define PCI_CONF_CAPID_MASK 0xff
1450N/A#define PCI_CONF_NCAPID_MASK 0xff00
1450N/A
1450N/A#ifdef __cplusplus
1450N/A}
1450N/A#endif
1450N/A
1450N/A#endif /* _SYS_DRM_SUNMOD_H_ */