1450N/A/*
1450N/A * Copyright (c) 2009, 2013, Oracle and/or its affiliates. All rights reserved.
1450N/A */
1450N/A
1450N/A/*
1450N/A * Copyright (c) 2000 Doug Rabson
1450N/A * Copyright (c) 2009, 2013, Intel Corporation.
1450N/A * All rights reserved.
1450N/A *
1450N/A * Redistribution and use in source and binary forms, with or without
1450N/A * modification, are permitted provided that the following conditions
1450N/A * are met:
1450N/A * 1. Redistributions of source code must retain the above copyright
1450N/A * notice, this list of conditions and the following disclaimer.
1450N/A * 2. Redistributions in binary form must reproduce the above copyright
1450N/A * notice, this list of conditions and the following disclaimer in the
1450N/A * documentation and/or other materials provided with the distribution.
1450N/A *
1450N/A * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1450N/A * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1450N/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1450N/A * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
1450N/A * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
1450N/A * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
1450N/A * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
1450N/A * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
1450N/A * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
1450N/A * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
1450N/A * SUCH DAMAGE.
1450N/A *
1450N/A */
1450N/A
1450N/A#ifndef _SYS_AGPGART_H
1450N/A#define _SYS_AGPGART_H
1450N/A
1450N/A#ifdef __cplusplus
1450N/Aextern "C" {
1450N/A#endif
1450N/A
1450N/A#define AGP_NORMAL 0 /* mapped to user land, no cache */
1450N/A
1450N/Atypedef struct _agp_version {
1450N/A uint16_t agpv_major;
1450N/A uint16_t agpv_minor;
1450N/A} agp_version_t;
1450N/A
1450N/A
1450N/Atypedef struct _agp_info {
1450N/A agp_version_t agpi_version;
1450N/A uint32_t agpi_devid; /* bridge vendor + device */
1450N/A uint32_t agpi_mode; /* mode of brdige */
1450N/A ulong_t agpi_aperbase; /* base of aperture */
1450N/A size_t agpi_apersize; /* aperture range size */
1450N/A uint32_t agpi_pgtotal; /* max number of pages in aperture */
1450N/A uint32_t agpi_pgsystem; /* same as pg_total */
1450N/A uint32_t agpi_pgused; /* NUMBER of currently used pages */
1450N/A} agp_info_t;
1450N/A
1450N/Atypedef struct _agp_setup {
1450N/A uint32_t agps_mode;
1450N/A} agp_setup_t;
1450N/A
1450N/Atypedef struct _agp_allocate {
1450N/A int32_t agpa_key;
1450N/A uint32_t agpa_pgcount;
1450N/A uint32_t agpa_type;
1450N/A uint32_t agpa_physical; /* for i810 only, private */
1450N/A} agp_allocate_t;
1450N/A
1450N/Atypedef struct _agp_bind_pages {
1450N/A uint32_t agpb_pgstart;
1450N/A pfn_t *agpb_pages;
1450N/A unsigned long agpb_pgcount;
1450N/A unsigned int agpb_flags;
1450N/A} agp_bind_pages_t;
1450N/A
1450N/Atypedef struct _agp_unbind_pages {
1450N/A uint32_t agpb_pgstart;
1450N/A unsigned long agpb_pgcount;
1450N/A uint32_t agpb_type;
1450N/A pfn_t *agpb_pages;
1450N/A pfn_t agpb_scratch;
1450N/A} agp_unbind_pages_t;
1450N/A
1450N/Atypedef struct _agp_bind {
1450N/A int32_t agpb_key;
1450N/A uint32_t agpb_pgstart;
1450N/A} agp_bind_t;
1450N/A
1450N/Atypedef struct _agp_unbind {
1450N/A int32_t agpu_key;
1450N/A uint32_t agpu_pri; /* no use in solaris */
1450N/A} agp_unbind_t;
1450N/A
1450N/Atypedef struct _agp_rw_gtt {
1450N/A uint32_t pgstart;
1450N/A unsigned long pgcount;
1450N/A void *addr;
1450N/A uint32_t type;
1450N/A} agp_rw_gtt_t;
1450N/A
1450N/Atypedef struct _agp_gtt_info {
1450N/A uint32_t agp_pgstart;
1450N/A unsigned long agp_npage;
1450N/A pfn_t *agp_phyaddr; /* pointer to address array */
1450N/A uint32_t agp_type; /* reserved for other memory type */
1450N/A unsigned int agp_flags;
1450N/A pfn_t agp_scratch;
1450N/A} agp_gtt_info_t;
1450N/A
1450N/A#define AGPIOC_BASE 'G'
1450N/A#define AGPIOC_INFO _IOR(AGPIOC_BASE, 0, 100)
1450N/A#define AGPIOC_ACQUIRE _IO(AGPIOC_BASE, 1)
1450N/A#define AGPIOC_RELEASE _IO(AGPIOC_BASE, 2)
1450N/A#define AGPIOC_SETUP _IOW(AGPIOC_BASE, 3, agp_setup_t)
1450N/A#define AGPIOC_ALLOCATE _IOWR(AGPIOC_BASE, 4, agp_allocate_t)
1450N/A#define AGPIOC_DEALLOCATE _IOW(AGPIOC_BASE, 5, int)
1450N/A#define AGPIOC_BIND _IOW(AGPIOC_BASE, 6, agp_bind_t)
1450N/A#define AGPIOC_UNBIND _IOW(AGPIOC_BASE, 7, agp_unbind_t)
1450N/A#define AGPIOC_IOREMAP _IO(AGPIOC_BASE, 8)
1450N/A#define AGPIOC_IOREMAP_FREE _IO(AGPIOC_BASE, 9)
1450N/A#define AGPIOC_READ _IO(AGPIOC_BASE, 10)
1450N/A#define AGPIOC_WRITE _IO(AGPIOC_BASE, 11)
1450N/A#define AGPIOC_FLUSHCHIPSET _IO(AGPIOC_BASE, 12)
1450N/A#define AGPIOC_PAGES_BIND _IOW(AGPIOC_BASE, 13, agp_gtt_info_t)
1450N/A#define AGPIOC_PAGES_UNBIND _IOW(AGPIOC_BASE, 14, agp_gtt_info_t)
1450N/A#define AGPIOC_RW_GTT _IOW(AGPIOC_BASE, 15, agp_rw_gtt_t)
1450N/A
1450N/A/* AGP status register bits definition */
1450N/A#define AGPSTAT_RQ_MASK 0xff000000 /* target only */
1450N/A#define AGPSTAT_SBA (0x1 << 9) /* always 1 for 3.0 */
1450N/A#define AGPSTAT_OVER4G (0x1 << 5)
1450N/A#define AGPSTAT_FW (0x1 << 4)
1450N/A#define AGPSTAT_RATE_MASK 0x7
1450N/A/* rate for 2.0 mode */
1450N/A#define AGP2_RATE_1X 0x1
1450N/A#define AGP2_RATE_2X 0x2
1450N/A#define AGP2_RATE_4X 0x4
1450N/A/* AGP 3.0 only bits */
1450N/A#define AGPSTAT_ARQSZ_MASK (0x7 << 13) /* target only */
1450N/A#define AGPSTAT_CAL_MASK (0x7 << 10)
1450N/A#define AGPSTAT_GART64B (0x1 << 7) /* target only */
1450N/A#define AGPSTAT_MODE3 (0x1 << 3)
1450N/A/* Rate for 3.0 mode */
1450N/A#define AGP3_RATE_4X 0x1
1450N/A#define AGP3_RATE_8X 0x2
1450N/A
1450N/A/* AGP command register bits definition */
1450N/A#define AGPCMD_RQ_MASK 0xff000000 /* master only */
1450N/A#define AGPCMD_SBAEN (0x1 << 9) /* must be 1 for 3.0 */
1450N/A#define AGPCMD_AGPEN (0x1 << 8)
1450N/A#define AGPCMD_OVER4GEN (0x1 << 5)
1450N/A#define AGPCMD_FWEN (0x1 << 4)
1450N/A#define AGPCMD_RATE_MASK 0x7
1450N/A/* AGP 3.0 only bits */
1450N/A#define AGP3_CMD_ARQSZ_MASK (0x7 << 13) /* master only */
1450N/A#define AGP3_CMD_CAL_MASK (0x7 << 10) /* target only */
1450N/A#define AGP3_CMD_GART64BEN (0x1 << 7) /* target only */
1450N/A
1450N/A#define AGP_DEVICE "/dev/agpgart"
1450N/A
1450N/A#ifdef __cplusplus
1450N/A}
1450N/A#endif
1450N/A
1450N/A#endif /* _SYS_AGPGART_H */