1450N/A/*
1450N/A * Copyright (c) 2006, 2013, Oracle and/or its affiliates. All rights reserved.
1450N/A */
1450N/A
1450N/A/*
1450N/A * Copyright (c) 2006 Luc Verhaegen (quirks list)
1450N/A * Copyright (c) 2007-2008, 2013, Intel Corporation
1450N/A * Jesse Barnes <jesse.barnes@intel.com>
1450N/A *
1450N/A * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
1450N/A * FB layer.
1450N/A * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
1450N/A *
1450N/A * Permission is hereby granted, free of charge, to any person obtaining a
1450N/A * copy of this software and associated documentation files (the "Software"),
1450N/A * to deal in the Software without restriction, including without limitation
1450N/A * the rights to use, copy, modify, merge, publish, distribute, sub license,
1450N/A * and/or sell copies of the Software, and to permit persons to whom the
1450N/A * Software is furnished to do so, subject to the following conditions:
1450N/A *
1450N/A * The above copyright notice and this permission notice (including the
1450N/A * next paragraph) shall be included in all copies or substantial portions
1450N/A * of the Software.
1450N/A *
1450N/A * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1450N/A * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1450N/A * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
1450N/A * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1450N/A * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1450N/A * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
1450N/A * DEALINGS IN THE SOFTWARE.
1450N/A */
1450N/A#include "drm.h"
1450N/A#include "drmP.h"
1450N/A#include "drm_edid.h"
1450N/A#include "drm_sun_i2c.h"
1450N/A#include "drm_crtc.h"
1450N/A
1450N/A#define version_greater(edid, maj, min) \
1450N/A (((edid)->version > (maj)) || \
1450N/A ((edid)->version == (maj) && (edid)->revision > (min)))
1450N/A
1450N/A#define EDID_EST_TIMINGS 16
1450N/A#define EDID_STD_TIMINGS 8
1450N/A#define EDID_DETAILED_TIMINGS 4
1450N/A
1450N/A/*
1450N/A * EDID blocks out in the wild have a variety of bugs, try to collect
1450N/A * them here (note that userspace may work around broken monitors first,
1450N/A * but fixes should make their way here so that the kernel "just works"
1450N/A * on as many displays as possible).
1450N/A */
1450N/A
1450N/A/* First detailed mode wrong, use largest 60Hz mode */
1450N/A#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
1450N/A/* Reported 135MHz pixel clock is too high, needs adjustment */
1450N/A#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
1450N/A/* Prefer the largest mode at 75 Hz */
1450N/A#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
1450N/A/* Detail timing is in cm not mm */
1450N/A#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
1450N/A/* Detailed timing descriptors have bogus size values, so just take the
1450N/A * maximum size and use that.
1450N/A */
1450N/A#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
1450N/A/* Monitor forgot to set the first detailed is preferred bit. */
1450N/A#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
1450N/A/* use +hsync +vsync for detailed mode */
1450N/A#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
1450N/A/* Force reduced-blanking timings for detailed modes */
1450N/A#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
1450N/A
1450N/Astruct detailed_mode_closure {
1450N/A struct drm_connector *connector;
1450N/A struct edid *edid;
1450N/A bool preferred;
1450N/A u32 quirks;
1450N/A int modes;
1450N/A};
1450N/A
1450N/A#define LEVEL_DMT 0
1450N/A#define LEVEL_GTF 1
1450N/A#define LEVEL_GTF2 2
1450N/A#define LEVEL_CVT 3
1450N/A
1450N/Astatic struct edid_quirk {
1450N/A char vendor[4];
1450N/A int product_id;
1450N/A u32 quirks;
1450N/A} edid_quirk_list[] = {
1450N/A /* Acer AL1706 */
1450N/A { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
1450N/A /* Acer F51 */
1450N/A { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
1450N/A /* Unknown Acer */
1450N/A { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
1450N/A
1450N/A /* Belinea 10 15 55 */
1450N/A { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
1450N/A { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
1450N/A
1450N/A /* Envision Peripherals, Inc. EN-7100e */
1450N/A { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
1450N/A /* Envision EN2028 */
1450N/A { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
1450N/A
1450N/A /* Funai Electronics PM36B */
1450N/A { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
1450N/A EDID_QUIRK_DETAILED_IN_CM },
1450N/A
1450N/A /* LG Philips LCD LP154W01-A5 */
1450N/A { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
1450N/A { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
1450N/A
1450N/A /* Philips 107p5 CRT */
1450N/A { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
1450N/A
1450N/A /* Proview AY765C */
1450N/A { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
1450N/A
1450N/A /* Samsung SyncMaster 205BW. Note: irony */
1450N/A { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
1450N/A /* Samsung SyncMaster 22[5-6]BW */
1450N/A { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
1450N/A { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
1450N/A
1450N/A /* ViewSonic VA2026w */
1450N/A { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
1450N/A};
1450N/A
1450N/A/*
1450N/A * Autogenerated from the DMT spec.
1450N/A * This table is copied from xfree86/modes/xf86EdidModes.c.
1450N/A */
1450N/Astatic const struct drm_display_mode drm_dmt_modes[] = {
1450N/A /* 640x350@85Hz */
1450N/A { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
1450N/A 736, 832, 0, 350, 382, 385, 445, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 640x400@85Hz */
1450N/A { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
1450N/A 736, 832, 0, 400, 401, 404, 445, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 720x400@85Hz */
1450N/A { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
1450N/A 828, 936, 0, 400, 401, 404, 446, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 640x480@60Hz */
1450N/A { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1450N/A 752, 800, 0, 480, 489, 492, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 640x480@72Hz */
1450N/A { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
1450N/A 704, 832, 0, 480, 489, 492, 520, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 640x480@75Hz */
1450N/A { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
1450N/A 720, 840, 0, 480, 481, 484, 500, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 640x480@85Hz */
1450N/A { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
1450N/A 752, 832, 0, 480, 481, 484, 509, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 800x600@56Hz */
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
1450N/A 896, 1024, 0, 600, 601, 603, 625, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 800x600@60Hz */
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1450N/A 968, 1056, 0, 600, 601, 605, 628, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 800x600@72Hz */
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
1450N/A 976, 1040, 0, 600, 637, 643, 666, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 800x600@75Hz */
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
1450N/A 896, 1056, 0, 600, 601, 604, 625, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 800x600@85Hz */
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
1450N/A 896, 1048, 0, 600, 601, 604, 631, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 800x600@120Hz RB */
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
1450N/A 880, 960, 0, 600, 603, 607, 636, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 848x480@60Hz */
1450N/A { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
1450N/A 976, 1088, 0, 480, 486, 494, 517, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1024x768@43Hz, interlace */
1450N/A { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
1450N/A 1208, 1264, 0, 768, 768, 772, 817, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE) },
1450N/A /* 1024x768@60Hz */
1450N/A { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1450N/A 1184, 1344, 0, 768, 771, 777, 806, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1024x768@70Hz */
1450N/A { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
1450N/A 1184, 1328, 0, 768, 771, 777, 806, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1024x768@75Hz */
1450N/A { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
1450N/A 1136, 1312, 0, 768, 769, 772, 800, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1024x768@85Hz */
1450N/A { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
1450N/A 1168, 1376, 0, 768, 769, 772, 808, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1024x768@120Hz RB */
1450N/A { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
1450N/A 1104, 1184, 0, 768, 771, 775, 813, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1152x864@75Hz */
1450N/A { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1450N/A 1344, 1600, 0, 864, 865, 868, 900, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x768@60Hz RB */
1450N/A { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
1450N/A 1360, 1440, 0, 768, 771, 778, 790, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1280x768@60Hz */
1450N/A { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1450N/A 1472, 1664, 0, 768, 771, 778, 798, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x768@75Hz */
1450N/A { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
1450N/A 1488, 1696, 0, 768, 771, 778, 805, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1280x768@85Hz */
1450N/A { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
1450N/A 1496, 1712, 0, 768, 771, 778, 809, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x768@120Hz RB */
1450N/A { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
1450N/A 1360, 1440, 0, 768, 771, 778, 813, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1280x800@60Hz RB */
1450N/A { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
1450N/A 1360, 1440, 0, 800, 803, 809, 823, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1280x800@60Hz */
1450N/A { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1450N/A 1480, 1680, 0, 800, 803, 809, 831, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1280x800@75Hz */
1450N/A { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
1450N/A 1488, 1696, 0, 800, 803, 809, 838, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x800@85Hz */
1450N/A { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
1450N/A 1496, 1712, 0, 800, 803, 809, 843, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x800@120Hz RB */
1450N/A { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
1450N/A 1360, 1440, 0, 800, 803, 809, 847, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1280x960@60Hz */
1450N/A { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1450N/A 1488, 1800, 0, 960, 961, 964, 1000, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x960@85Hz */
1450N/A { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
1450N/A 1504, 1728, 0, 960, 961, 964, 1011, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x960@120Hz RB */
1450N/A { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
1450N/A 1360, 1440, 0, 960, 963, 967, 1017, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1280x1024@60Hz */
1450N/A { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1450N/A 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x1024@75Hz */
1450N/A { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
1450N/A 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x1024@85Hz */
1450N/A { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
1450N/A 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1280x1024@120Hz RB */
1450N/A { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
1450N/A 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1360x768@60Hz */
1450N/A { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1450N/A 1536, 1792, 0, 768, 771, 777, 795, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1360x768@120Hz RB */
1450N/A { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
1450N/A 1440, 1520, 0, 768, 771, 776, 813, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1400x1050@60Hz RB */
1450N/A { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
1450N/A 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1400x1050@60Hz */
1450N/A { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1450N/A 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1400x1050@75Hz */
1450N/A { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
1450N/A 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1400x1050@85Hz */
1450N/A { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
1450N/A 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1400x1050@120Hz RB */
1450N/A { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
1450N/A 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1440x900@60Hz RB */
1450N/A { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
1450N/A 1520, 1600, 0, 900, 903, 909, 926, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1440x900@60Hz */
1450N/A { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1450N/A 1672, 1904, 0, 900, 903, 909, 934, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1440x900@75Hz */
1450N/A { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
1450N/A 1688, 1936, 0, 900, 903, 909, 942, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1440x900@85Hz */
1450N/A { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
1450N/A 1696, 1952, 0, 900, 903, 909, 948, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1440x900@120Hz RB */
1450N/A { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
1450N/A 1520, 1600, 0, 900, 903, 909, 953, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1600x1200@60Hz */
1450N/A { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1450N/A 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1600x1200@65Hz */
1450N/A { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
1450N/A 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1600x1200@70Hz */
1450N/A { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
1450N/A 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1600x1200@75Hz */
1450N/A { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
1450N/A 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1600x1200@85Hz */
1450N/A { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
1450N/A 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1600x1200@120Hz RB */
1450N/A { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
1450N/A 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1680x1050@60Hz RB */
1450N/A { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
1450N/A 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1680x1050@60Hz */
1450N/A { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1450N/A 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1680x1050@75Hz */
1450N/A { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
1450N/A 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1680x1050@85Hz */
1450N/A { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
1450N/A 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1680x1050@120Hz RB */
1450N/A { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
1450N/A 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1792x1344@60Hz */
1450N/A { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1450N/A 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1792x1344@75Hz */
1450N/A { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
1450N/A 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1792x1344@120Hz RB */
1450N/A { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
1450N/A 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1856x1392@60Hz */
1450N/A { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1450N/A 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1856x1392@75Hz */
1450N/A { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
1450N/A 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1856x1392@120Hz RB */
1450N/A { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
1450N/A 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1920x1200@60Hz RB */
1450N/A { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
1450N/A 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1920x1200@60Hz */
1450N/A { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1450N/A 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1920x1200@75Hz */
1450N/A { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
1450N/A 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1920x1200@85Hz */
1450N/A { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
1450N/A 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1920x1200@120Hz RB */
1450N/A { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
1450N/A 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 1920x1440@60Hz */
1450N/A { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1450N/A 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1920x1440@75Hz */
1450N/A { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
1450N/A 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 1920x1440@120Hz RB */
1450N/A { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
1450N/A 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 2560x1600@60Hz RB */
1450N/A { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
1450N/A 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 2560x1600@60Hz */
1450N/A { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1450N/A 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 2560x1600@75HZ */
1450N/A { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
1450N/A 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 2560x1600@85HZ */
1450N/A { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
1450N/A 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450N/A /* 2560x1600@120Hz RB */
1450N/A { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
1450N/A 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A};
1450N/A
1450N/Astatic const struct drm_display_mode edid_est_modes[] = {
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1450N/A 968, 1056, 0, 600, 601, 605, 628, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
1450N/A 896, 1024, 0, 600, 601, 603, 625, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
1450N/A { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
1450N/A 720, 840, 0, 480, 481, 484, 500, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
1450N/A { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
1450N/A 704, 832, 0, 480, 489, 491, 520, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
1450N/A { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
1450N/A 768, 864, 0, 480, 483, 486, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
1450N/A { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
1450N/A 752, 800, 0, 480, 490, 492, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
1450N/A { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
1450N/A 846, 900, 0, 400, 421, 423, 449, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
1450N/A { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
1450N/A 846, 900, 0, 400, 412, 414, 449, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
1450N/A { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
1450N/A 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
1450N/A { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
1450N/A 1136, 1312, 0, 768, 769, 772, 800, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
1450N/A { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
1450N/A 1184, 1328, 0, 768, 771, 777, 806, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
1450N/A { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1450N/A 1184, 1344, 0, 768, 771, 777, 806, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
1450N/A { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
1450N/A 1208, 1264, 0, 768, 768, 776, 817, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
1450N/A { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
1450N/A 928, 1152, 0, 624, 625, 628, 667, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
1450N/A 896, 1056, 0, 600, 601, 604, 625, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
1450N/A { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
1450N/A 976, 1040, 0, 600, 637, 643, 666, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
1450N/A { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1450N/A 1344, 1600, 0, 864, 865, 868, 900, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
1450N/A};
1450N/A
1450N/Astruct minimode {
1450N/A short w;
1450N/A short h;
1450N/A short r;
1450N/A short rb;
1450N/A};
1450N/A
1450N/Astatic const struct minimode est3_modes[] = {
1450N/A /* byte 6 */
1450N/A { 640, 350, 85, 0 },
1450N/A { 640, 400, 85, 0 },
1450N/A { 720, 400, 85, 0 },
1450N/A { 640, 480, 85, 0 },
1450N/A { 848, 480, 60, 0 },
1450N/A { 800, 600, 85, 0 },
1450N/A { 1024, 768, 85, 0 },
1450N/A { 1152, 864, 75, 0 },
1450N/A /* byte 7 */
1450N/A { 1280, 768, 60, 1 },
1450N/A { 1280, 768, 60, 0 },
1450N/A { 1280, 768, 75, 0 },
1450N/A { 1280, 768, 85, 0 },
1450N/A { 1280, 960, 60, 0 },
1450N/A { 1280, 960, 85, 0 },
1450N/A { 1280, 1024, 60, 0 },
1450N/A { 1280, 1024, 85, 0 },
1450N/A /* byte 8 */
1450N/A { 1360, 768, 60, 0 },
1450N/A { 1440, 900, 60, 1 },
1450N/A { 1440, 900, 60, 0 },
1450N/A { 1440, 900, 75, 0 },
1450N/A { 1440, 900, 85, 0 },
1450N/A { 1400, 1050, 60, 1 },
1450N/A { 1400, 1050, 60, 0 },
1450N/A { 1400, 1050, 75, 0 },
1450N/A /* byte 9 */
1450N/A { 1400, 1050, 85, 0 },
1450N/A { 1680, 1050, 60, 1 },
1450N/A { 1680, 1050, 60, 0 },
1450N/A { 1680, 1050, 75, 0 },
1450N/A { 1680, 1050, 85, 0 },
1450N/A { 1600, 1200, 60, 0 },
1450N/A { 1600, 1200, 65, 0 },
1450N/A { 1600, 1200, 70, 0 },
1450N/A /* byte 10 */
1450N/A { 1600, 1200, 75, 0 },
1450N/A { 1600, 1200, 85, 0 },
1450N/A { 1792, 1344, 60, 0 },
1450N/A { 1792, 1344, 85, 0 },
1450N/A { 1856, 1392, 60, 0 },
1450N/A { 1856, 1392, 75, 0 },
1450N/A { 1920, 1200, 60, 1 },
1450N/A { 1920, 1200, 60, 0 },
1450N/A /* byte 11 */
1450N/A { 1920, 1200, 75, 0 },
1450N/A { 1920, 1200, 85, 0 },
1450N/A { 1920, 1440, 60, 0 },
1450N/A { 1920, 1440, 75, 0 },
1450N/A};
1450N/A
1450N/Astatic const struct minimode extra_modes[] = {
1450N/A { 1024, 576, 60, 0 },
1450N/A { 1366, 768, 60, 0 },
1450N/A { 1600, 900, 60, 0 },
1450N/A { 1680, 945, 60, 0 },
1450N/A { 1920, 1080, 60, 0 },
1450N/A { 2048, 1152, 60, 0 },
1450N/A { 2048, 1536, 60, 0 },
1450N/A};
1450N/A
1450N/A/*
1450N/A * Probably taken from CEA-861 spec.
1450N/A * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
1450N/A */
1450N/Astatic const struct drm_display_mode edid_cea_modes[] = {
1450N/A /* 1 - 640x480@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1450N/A 752, 800, 0, 480, 490, 492, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 2 - 720x480@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
1450N/A 798, 858, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 3 - 720x480@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
1450N/A 798, 858, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1450N/A /* 4 - 1280x720@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
1450N/A 1430, 1650, 0, 720, 725, 730, 750, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 5 - 1920x1080i@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
1450N/A 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE)},
1450N/A /* 6 - 1440x480i@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
1450N/A 1602, 1716, 0, 480, 488, 494, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 7 - 1440x480i@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
1450N/A 1602, 1716, 0, 480, 488, 494, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 8 - 1440x240@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
1450N/A 1602, 1716, 0, 240, 244, 247, 262, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 9 - 1440x240@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
1450N/A 1602, 1716, 0, 240, 244, 247, 262, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 10 - 2880x480i@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
1450N/A 3204, 3432, 0, 480, 488, 494, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE)},
1450N/A /* 11 - 2880x480i@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
1450N/A 3204, 3432, 0, 480, 488, 494, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE)},
1450N/A /* 12 - 2880x240@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
1450N/A 3204, 3432, 0, 240, 244, 247, 262, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 13 - 2880x240@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
1450N/A 3204, 3432, 0, 240, 244, 247, 262, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 14 - 1440x480@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
1450N/A 1596, 1716, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 15 - 1440x480@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
1450N/A 1596, 1716, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 16 - 1920x1080@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
1450N/A 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 17 - 720x576@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
1450N/A 796, 864, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 18 - 720x576@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
1450N/A 796, 864, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 19 - 1280x720@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
1450N/A 1760, 1980, 0, 720, 725, 730, 750, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 20 - 1920x1080i@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
1450N/A 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE)},
1450N/A /* 21 - 1440x576i@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
1450N/A 1590, 1728, 0, 576, 580, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 22 - 1440x576i@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
1450N/A 1590, 1728, 0, 576, 580, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 23 - 1440x288@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
1450N/A 1590, 1728, 0, 288, 290, 293, 312, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 24 - 1440x288@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
1450N/A 1590, 1728, 0, 288, 290, 293, 312, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 25 - 2880x576i@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
1450N/A 3180, 3456, 0, 576, 580, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE)},
1450N/A /* 26 - 2880x576i@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
1450N/A 3180, 3456, 0, 576, 580, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE)},
1450N/A /* 27 - 2880x288@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
1450N/A 3180, 3456, 0, 288, 290, 293, 312, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 28 - 2880x288@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
1450N/A 3180, 3456, 0, 288, 290, 293, 312, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 29 - 1440x576@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
1450N/A 1592, 1728, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 30 - 1440x576@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
1450N/A 1592, 1728, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 31 - 1920x1080@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
1450N/A 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 32 - 1920x1080@24Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
1450N/A 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 33 - 1920x1080@25Hz */
1450N/A { .vrefresh = 25, DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
1450N/A 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 34 - 1920x1080@30Hz */
1450N/A { .vrefresh = 30, DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
1450N/A 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 35 - 2880x480@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
1450N/A 3192, 3432, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 36 - 2880x480@60Hz */
1450N/A { .vrefresh = 60, DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
1450N/A 3192, 3432, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 37 - 2880x576@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
1450N/A 3184, 3456, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 38 - 2880x576@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
1450N/A 3184, 3456, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 39 - 1920x1080i@50Hz */
1450N/A { .vrefresh = 50, DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
1450N/A 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE)},
1450N/A /* 40 - 1920x1080i@100Hz */
1450N/A { .vrefresh = 100, DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
1450N/A 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE)},
1450N/A /* 41 - 1280x720@100Hz */
1450N/A { .vrefresh = 100, DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
1450N/A 1760, 1980, 0, 720, 725, 730, 750, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 42 - 720x576@100Hz */
1450N/A { .vrefresh = 100, DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
1450N/A 796, 864, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 43 - 720x576@100Hz */
1450N/A { .vrefresh = 100, DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
1450N/A 796, 864, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 44 - 1440x576i@100Hz */
1450N/A { .vrefresh = 100, DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
1450N/A 1590, 1728, 0, 576, 580, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 45 - 1440x576i@100Hz */
1450N/A { .vrefresh = 100, DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
1450N/A 1590, 1728, 0, 576, 580, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 46 - 1920x1080i@120Hz */
1450N/A { .vrefresh = 120, DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
1450N/A 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE)},
1450N/A /* 47 - 1280x720@120Hz */
1450N/A { .vrefresh = 120, DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
1450N/A 1430, 1650, 0, 720, 725, 730, 750, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 48 - 720x480@120Hz */
1450N/A { .vrefresh = 120, DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
1450N/A 798, 858, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 49 - 720x480@120Hz */
1450N/A { .vrefresh = 120, DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
1450N/A 798, 858, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 50 - 1440x480i@120Hz */
1450N/A { .vrefresh = 120, DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
1450N/A 1602, 1716, 0, 480, 488, 494, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 51 - 1440x480i@120Hz */
1450N/A { .vrefresh = 120, DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
1450N/A 1602, 1716, 0, 480, 488, 494, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 52 - 720x576@200Hz */
1450N/A { .vrefresh = 200, DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
1450N/A 796, 864, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 53 - 720x576@200Hz */
1450N/A { .vrefresh = 200, DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
1450N/A 796, 864, 0, 576, 581, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 54 - 1440x576i@200Hz */
1450N/A { .vrefresh = 200, DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
1450N/A 1590, 1728, 0, 576, 580, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 55 - 1440x576i@200Hz */
1450N/A { .vrefresh = 200, DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
1450N/A 1590, 1728, 0, 576, 580, 586, 625, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 56 - 720x480@240Hz */
1450N/A { .vrefresh = 240, DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
1450N/A 798, 858, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 57 - 720x480@240Hz */
1450N/A { .vrefresh = 240, DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
1450N/A 798, 858, 0, 480, 489, 495, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)},
1450N/A /* 58 - 1440x480i@240 */
1450N/A { .vrefresh = 240, DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
1450N/A 1602, 1716, 0, 480, 488, 494, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 59 - 1440x480i@240 */
1450N/A { .vrefresh = 240, DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
1450N/A 1602, 1716, 0, 480, 488, 494, 525, 0,
1450N/A DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1450N/A DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK)},
1450N/A /* 60 - 1280x720@24Hz */
1450N/A { .vrefresh = 24, DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
1450N/A 3080, 3300, 0, 720, 725, 730, 750, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 61 - 1280x720@25Hz */
1450N/A { .vrefresh = 25, DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1450N/A 3740, 3960, 0, 720, 725, 730, 750, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 62 - 1280x720@30Hz */
1450N/A { .vrefresh = 30, DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1450N/A 3080, 3300, 0, 720, 725, 730, 750, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 63 - 1920x1080@120Hz */
1450N/A { .vrefresh = 120, DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1450N/A 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A /* 64 - 1920x1080@100Hz */
1450N/A { .vrefresh = 100, DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1450N/A 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
1450N/A DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC)},
1450N/A};
1450N/A
1450N/A/*** DDC fetch and block validation ***/
1450N/A
1450N/Astatic const u8 edid_header[] = {
1450N/A 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1450N/A};
1450N/A
1450N/A /*
1450N/A * Sanity check the header of the base EDID block. Return 8 if the header
1450N/A * is perfect, down to 0 if it's totally wrong.
1450N/A */
1450N/Aint drm_edid_header_is_valid(const u8 *raw_edid)
1450N/A{
1450N/A int i, score = 0;
1450N/A
1450N/A for (i = 0; i < sizeof(edid_header); i++)
1450N/A if (raw_edid[i] == edid_header[i])
1450N/A score++;
1450N/A
1450N/A return score;
1450N/A}
1450N/A
1450N/Astatic int edid_fixup = 6;
1450N/A/*
1450N/A * Sanity check the EDID block (base or extension). Return 0 if the block
1450N/A * doesn't check out, or 1 if it's valid.
1450N/A */
1450N/Abool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
1450N/A{
1450N/A int i;
1450N/A u8 csum = 0;
1450N/A struct edid *edid = (struct edid *)raw_edid;
1450N/A
1450N/A if (!raw_edid) {
1450N/A WARN_ON(1);
1450N/A return false;
1450N/A }
1450N/A if (edid_fixup > 8 || edid_fixup < 0)
1450N/A edid_fixup = 6;
1450N/A
1450N/A if (block == 0) {
1450N/A int score = drm_edid_header_is_valid(raw_edid);
1450N/A if (score == 8)
1450N/A DRM_DEBUG("edid header is perfect");
1450N/A else if (score >= edid_fixup) {
1450N/A DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1450N/A (void) memcpy(raw_edid, edid_header, sizeof(edid_header));
1450N/A } else {
1450N/A goto bad;
1450N/A }
1450N/A }
1450N/A
1450N/A for (i = 0; i < EDID_LENGTH; i++)
1450N/A csum += raw_edid[i];
1450N/A if (csum) {
1450N/A if (print_bad_edid) {
1450N/A DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1450N/A }
1450N/A
1450N/A /* allow CEA to slide through, switches mangle this */
1450N/A if (raw_edid[0] != 0x02)
1450N/A goto bad;
1450N/A }
1450N/A
1450N/A /* per-block-type checks */
1450N/A switch (raw_edid[0]) {
1450N/A case 0: /* base */
1450N/A if (edid->version != 1) {
1450N/A DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1450N/A goto bad;
1450N/A }
1450N/A
1450N/A if (edid->revision > 4)
1450N/A DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1450N/A break;
1450N/A
1450N/A default:
1450N/A break;
1450N/A }
1450N/A
1450N/A return true;
1450N/A
1450N/Abad:
1450N/A if (print_bad_edid) {
1450N/A DRM_DEBUG_KMS("Raw EDID:\n");
1450N/A// print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
1450N/A }
1450N/A return false;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_edid_is_valid - sanity check EDID data
1450N/A * @edid: EDID data
1450N/A *
1450N/A * Sanity-check an entire EDID record (including extensions)
1450N/A */
1450N/Abool drm_edid_is_valid(struct edid *edid)
1450N/A{
1450N/A int i;
1450N/A u8 *raw = (u8 *)edid;
1450N/A
1450N/A if (!edid)
1450N/A return false;
1450N/A
1450N/A for (i = 0; i <= edid->extensions; i++)
1450N/A if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1450N/A return false;
1450N/A
1450N/A return true;
1450N/A}
1450N/A
1450N/A#define DDC_SEGMENT_ADDR 0x30
1450N/A/**
1450N/A * Get EDID information via I2C.
1450N/A *
1450N/A * \param adapter : i2c device adaptor
1450N/A * \param buf : EDID data buffer to be filled
1450N/A * \param len : EDID data buffer length
1450N/A * \return 0 on success or -1 on failure.
1450N/A *
1450N/A * Try to fetch EDID information by calling i2c driver function.
1450N/A */
1450N/Astatic int
1450N/Adrm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
1450N/A int block, int len)
1450N/A{
1450N/A unsigned char start = block * EDID_LENGTH;
1450N/A unsigned char segment = block >> 1;
1450N/A unsigned char xfers = segment ? 3 : 2;
1450N/A int ret, retries = 5;
1450N/A
1450N/A /* The core i2c driver will automatically retry the transfer if the
1450N/A * adapter reports EAGAIN. However, we find that bit-banging transfers
1450N/A * are susceptible to errors under a heavily loaded machine and
1450N/A * generate spurious NAKs and timeouts. Retrying the transfer
1450N/A * of the individual block a few times seems to overcome this.
1450N/A */
1450N/A do {
1450N/A struct i2c_msg msgs[] = {
1450N/A {
1450N/A .addr = DDC_SEGMENT_ADDR,
1450N/A .flags = 0,
1450N/A .len = 1,
1450N/A .buf = &segment,
1450N/A }, {
1450N/A .addr = DDC_ADDR,
1450N/A .flags = 0,
1450N/A .len = 1,
1450N/A .buf = &start,
1450N/A }, {
1450N/A .addr = DDC_ADDR,
1450N/A .flags = I2C_M_RD,
1450N/A .len = (u16)len,
1450N/A .buf = buf,
1450N/A }
1450N/A };
1450N/A
1450N/A /*
1450N/A * Avoid sending the segment addr to not upset non-compliant ddc
1450N/A * monitors.
1450N/A */
1450N/A ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1450N/A
1450N/A if (ret == -ENXIO) {
1450N/A DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1450N/A adapter->name);
1450N/A break;
1450N/A }
1450N/A } while (ret != xfers && --retries);
1450N/A
1450N/A return ret == xfers ? 0 : -1;
1450N/A}
1450N/A
1450N/Astatic bool drm_edid_is_zero(u8 *in_edid, int length)
1450N/A{
1450N/A int i;
1450N/A u32 *raw_edid = (u32 *)(uintptr_t)(caddr_t)in_edid;
1450N/A
1450N/A for (i = 0; i < length / 4; i++)
1450N/A if (*(raw_edid + i) != 0)
1450N/A return false;
1450N/A return true;
1450N/A}
1450N/A
1450N/Astatic struct edid *
1450N/Adrm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
1450N/A{
1450N/A int i, j = 0;
1450N/A u8 *block, valid_extensions = 0;
1450N/A bool print_bad_edid = !connector->bad_edid_counter;
1450N/A
1450N/A /* try to allock max memory at first time */
1450N/A if ((block = kmalloc(EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1), GFP_KERNEL)) == NULL)
1450N/A return NULL;
1450N/A
1450N/A /* base block fetch */
1450N/A for (i = 0; i < 4; i++) {
1450N/A if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1450N/A goto out;
1450N/A if (drm_edid_block_valid(block, 0, print_bad_edid))
1450N/A break;
1450N/A if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1450N/A connector->null_edid_counter++;
1450N/A goto carp;
1450N/A }
1450N/A }
1450N/A if (i == 4)
1450N/A goto carp;
1450N/A
1450N/A /* if there's no extensions, we're done */
1450N/A if (block[0x7e] == 0)
1450N/A return (struct edid *) block;
1450N/A
1450N/A for (j = 1; j <= block[0x7e]; j++) {
1450N/A for (i = 0; i < 4; i++) {
1450N/A if (drm_do_probe_ddc_edid(adapter,
1450N/A block + (valid_extensions + 1) * EDID_LENGTH,
1450N/A j, EDID_LENGTH))
1450N/A goto out;
1450N/A if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1450N/A valid_extensions++;
1450N/A break;
1450N/A }
1450N/A }
1450N/A if (i == 4)
1450N/A DRM_ERROR("%s: Ignoring invalid EDID block %d.\n",
1450N/A drm_get_connector_name(connector), j);
1450N/A }
1450N/A
1450N/A if (valid_extensions != block[0x7e]) {
1450N/A block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1450N/A block[0x7e] = valid_extensions;
1450N/A }
1450N/A
1450N/A return (struct edid *) block;
1450N/A
1450N/Acarp:
1450N/A if (print_bad_edid) {
1450N/A DRM_DEBUG_KMS("%s: EDID block %d invalid.\n",
1450N/A drm_get_connector_name(connector), j);
1450N/A }
1450N/A connector->bad_edid_counter++;
1450N/A
1450N/Aout:
1450N/A kfree(block, EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1));
1450N/A return NULL;
1450N/A}
1450N/A
1450N/A/**
1450N/A * Probe DDC presence.
1450N/A *
1450N/A * \param adapter : i2c device adaptor
1450N/A * \return 1 on success
1450N/A */
1450N/Abool
1450N/Adrm_probe_ddc(struct i2c_adapter *adapter)
1450N/A{
1450N/A unsigned char out;
1450N/A
1450N/A return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_get_edid - get EDID data, if available
1450N/A * @connector: connector we're probing
1450N/A * @adapter: i2c adapter to use for DDC
1450N/A *
1450N/A * Poke the given i2c channel to grab EDID data if possible. If found,
1450N/A * attach it to the connector.
1450N/A *
1450N/A * Return edid data or NULL if we couldn't find any.
1450N/A */
1450N/Astruct edid *drm_get_edid(struct drm_connector *connector,
1450N/A struct i2c_adapter *adapter)
1450N/A{
1450N/A struct edid *edid = NULL;
1450N/A
1450N/A if (drm_probe_ddc(adapter))
1450N/A edid = drm_do_get_edid(connector, adapter);
1450N/A
1450N/A return edid;
1450N/A}
1450N/A
1450N/A/*** EDID parsing ***/
1450N/A
1450N/A/**
1450N/A * edid_vendor - match a string against EDID's obfuscated vendor field
1450N/A * @edid: EDID to match
1450N/A * @vendor: vendor string
1450N/A *
1450N/A * Returns true if @vendor is in @edid, false otherwise
1450N/A */
1450N/Astatic bool edid_vendor(struct edid *edid, char *vendor)
1450N/A{
1450N/A char edid_vendor[3];
1450N/A
1450N/A edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1450N/A edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1450N/A ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1450N/A edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1450N/A
1450N/A return !strncmp(edid_vendor, vendor, 3);
1450N/A}
1450N/A
1450N/A/**
1450N/A * edid_get_quirks - return quirk flags for a given EDID
1450N/A * @edid: EDID to process
1450N/A *
1450N/A * This tells subsequent routines what fixes they need to apply.
1450N/A */
1450N/Astatic u32 edid_get_quirks(struct edid *edid)
1450N/A{
1450N/A struct edid_quirk *quirk;
1450N/A int i;
1450N/A
1450N/A for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1450N/A quirk = &edid_quirk_list[i];
1450N/A
1450N/A if (edid_vendor(edid, quirk->vendor) &&
1450N/A (EDID_PRODUCT_ID(edid) == quirk->product_id))
1450N/A return quirk->quirks;
1450N/A }
1450N/A
1450N/A return 0;
1450N/A}
1450N/A
1450N/A#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1450N/A#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
1450N/A
1450N/A/**
1450N/A * edid_fixup_preferred - set preferred modes based on quirk list
1450N/A * @connector: has mode list to fix up
1450N/A * @quirks: quirks list
1450N/A *
1450N/A * Walk the mode list for @connector, clearing the preferred status
1450N/A * on existing modes and setting it anew for the right mode ala @quirks.
1450N/A */
1450N/Astatic void edid_fixup_preferred(struct drm_connector *connector,
1450N/A u32 quirks)
1450N/A{
1450N/A struct drm_display_mode *t, *cur_mode, *preferred_mode;
1450N/A int target_refresh = 0;
1450N/A
1450N/A if (list_empty(&connector->probed_modes))
1450N/A return;
1450N/A
1450N/A if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1450N/A target_refresh = 60;
1450N/A if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1450N/A target_refresh = 75;
1450N/A
1450N/A preferred_mode = list_first_entry(&connector->probed_modes,
1450N/A struct drm_display_mode, head);
1450N/A
1450N/A list_for_each_entry_safe(cur_mode, t, struct drm_display_mode, &connector->probed_modes, head) {
1450N/A cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1450N/A
1450N/A if (cur_mode == preferred_mode)
1450N/A continue;
1450N/A
1450N/A /* Largest mode is preferred */
1450N/A if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1450N/A preferred_mode = cur_mode;
1450N/A
1450N/A /* At a given size, try to get closest to target refresh */
1450N/A if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1450N/A MODE_REFRESH_DIFF(cur_mode, target_refresh) <
1450N/A MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
1450N/A preferred_mode = cur_mode;
1450N/A }
1450N/A }
1450N/A
1450N/A preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1450N/A}
1450N/A
1450N/Astatic bool
1450N/Amode_is_rb(const struct drm_display_mode *mode)
1450N/A{
1450N/A return (mode->htotal - mode->hdisplay == 160) &&
1450N/A (mode->hsync_end - mode->hdisplay == 80) &&
1450N/A (mode->hsync_end - mode->hsync_start == 32) &&
1450N/A (mode->vsync_start - mode->vdisplay == 3);
1450N/A}
1450N/A
1450N/A/*
1450N/A * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1450N/A * @dev: Device to duplicate against
1450N/A * @hsize: Mode width
1450N/A * @vsize: Mode height
1450N/A * @fresh: Mode refresh rate
1450N/A * @rb: Mode reduced-blanking-ness
1450N/A *
1450N/A * Walk the DMT mode list looking for a match for the given parameters.
1450N/A * Return a newly allocated copy of the mode, or NULL if not found.
1450N/A */
1450N/Astruct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1450N/A int hsize, int vsize, int fresh,
1450N/A bool rb)
1450N/A{
1450N/A int i;
1450N/A
1450N/A for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1450N/A const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1450N/A if (hsize != ptr->hdisplay)
1450N/A continue;
1450N/A if (vsize != ptr->vdisplay)
1450N/A continue;
1450N/A if (fresh != drm_mode_vrefresh(ptr))
1450N/A continue;
1450N/A if (rb != mode_is_rb(ptr))
1450N/A continue;
1450N/A
1450N/A return drm_mode_duplicate(dev, ptr);
1450N/A }
1450N/A
1450N/A return NULL;
1450N/A}
1450N/A
1450N/Atypedef void detailed_cb(struct detailed_timing *timing, void *closure);
1450N/A
1450N/Astatic void
1450N/Acea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1450N/A{
1450N/A int i, n = 0;
1450N/A u8 d = ext[0x02];
1450N/A u8 *det_base = ext + d;
1450N/A
1450N/A n = (127 - d) / 18;
1450N/A for (i = 0; i < n; i++)
1450N/A cb((struct detailed_timing *)(det_base + 18 * i), closure);
1450N/A}
1450N/A
1450N/Astatic void
1450N/Avtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1450N/A{
1450N/A unsigned int i, n = min((int)ext[0x02], 6);
1450N/A u8 *det_base = ext + 5;
1450N/A
1450N/A if (ext[0x01] != 1)
1450N/A return; /* unknown version */
1450N/A
1450N/A for (i = 0; i < n; i++)
1450N/A cb((struct detailed_timing *)(det_base + 18 * i), closure);
1450N/A}
1450N/A
1450N/Astatic void
1450N/Adrm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1450N/A{
1450N/A int i;
1450N/A struct edid *edid = (struct edid *)raw_edid;
1450N/A
1450N/A if (edid == NULL)
1450N/A return;
1450N/A
1450N/A for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1450N/A cb(&(edid->detailed_timings[i]), closure);
1450N/A
1450N/A for (i = 1; i <= raw_edid[0x7e]; i++) {
1450N/A u8 *ext = raw_edid + (i * EDID_LENGTH);
1450N/A switch (*ext) {
1450N/A case CEA_EXT:
1450N/A cea_for_each_detailed_block(ext, cb, closure);
1450N/A break;
1450N/A case VTB_EXT:
1450N/A vtb_for_each_detailed_block(ext, cb, closure);
1450N/A break;
1450N/A default:
1450N/A break;
1450N/A }
1450N/A }
1450N/A}
1450N/A
1450N/Astatic void
1450N/Ais_rb(struct detailed_timing *t, void *data)
1450N/A{
1450N/A u8 *r = (u8 *)t;
1450N/A if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1450N/A if (r[15] & 0x10)
1450N/A *(bool *)data = true;
1450N/A}
1450N/A
1450N/A/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1450N/Astatic bool
1450N/Adrm_monitor_supports_rb(struct edid *edid)
1450N/A{
1450N/A if (edid->revision >= 4) {
1450N/A bool ret = false;
1450N/A drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1450N/A return ret;
1450N/A }
1450N/A
1450N/A return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1450N/A}
1450N/A
1450N/Astatic void
1450N/Afind_gtf2(struct detailed_timing *t, void *data)
1450N/A{
1450N/A u8 *r = (u8 *)t;
1450N/A if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1450N/A *(u8 **)data = r;
1450N/A}
1450N/A
1450N/A/* Secondary GTF curve kicks in above some break frequency */
1450N/Astatic int
1450N/Adrm_gtf2_hbreak(struct edid *edid)
1450N/A{
1450N/A u8 *r = NULL;
1450N/A drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1450N/A return r ? (r[12] * 2) : 0;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Adrm_gtf2_2c(struct edid *edid)
1450N/A{
1450N/A u8 *r = NULL;
1450N/A drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1450N/A return r ? r[13] : 0;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Adrm_gtf2_m(struct edid *edid)
1450N/A{
1450N/A u8 *r = NULL;
1450N/A drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1450N/A return r ? (r[15] << 8) + r[14] : 0;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Adrm_gtf2_k(struct edid *edid)
1450N/A{
1450N/A u8 *r = NULL;
1450N/A drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1450N/A return r ? r[16] : 0;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Adrm_gtf2_2j(struct edid *edid)
1450N/A{
1450N/A u8 *r = NULL;
1450N/A drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1450N/A return r ? r[17] : 0;
1450N/A}
1450N/A
1450N/A/**
1450N/A * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1450N/A * @edid: EDID block to scan
1450N/A */
1450N/Astatic int standard_timing_level(struct edid *edid)
1450N/A{
1450N/A if (edid->revision >= 2) {
1450N/A if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1450N/A return LEVEL_CVT;
1450N/A if (drm_gtf2_hbreak(edid))
1450N/A return LEVEL_GTF2;
1450N/A return LEVEL_GTF;
1450N/A }
1450N/A return LEVEL_DMT;
1450N/A}
1450N/A
1450N/A/*
1450N/A * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1450N/A * monitors fill with ascii space (0x20) instead.
1450N/A */
1450N/Astatic int
1450N/Abad_std_timing(u8 a, u8 b)
1450N/A{
1450N/A return (a == 0x00 && b == 0x00) ||
1450N/A (a == 0x01 && b == 0x01) ||
1450N/A (a == 0x20 && b == 0x20);
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1450N/A * @t: standard timing params
1450N/A * @timing_level: standard timing level
1450N/A *
1450N/A * Take the standard timing params (in this case width, aspect, and refresh)
1450N/A * and convert them into a real mode using CVT/GTF/DMT.
1450N/A */
1450N/Astatic struct drm_display_mode *
1450N/Adrm_mode_std(struct drm_connector *connector, struct edid *edid,
1450N/A struct std_timing *t, int revision)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct drm_display_mode *m, *mode = NULL;
1450N/A int hsize, vsize;
1450N/A int vrefresh_rate;
1450N/A unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1450N/A >> EDID_TIMING_ASPECT_SHIFT;
1450N/A unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1450N/A >> EDID_TIMING_VFREQ_SHIFT;
1450N/A int timing_level = standard_timing_level(edid);
1450N/A
1450N/A if (bad_std_timing(t->hsize, t->vfreq_aspect))
1450N/A return NULL;
1450N/A
1450N/A /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1450N/A hsize = t->hsize * 8 + 248;
1450N/A /* vrefresh_rate = vfreq + 60 */
1450N/A vrefresh_rate = vfreq + 60;
1450N/A /* the vdisplay is calculated based on the aspect ratio */
1450N/A if (aspect_ratio == 0) {
1450N/A if (revision < 3)
1450N/A vsize = hsize;
1450N/A else
1450N/A vsize = (hsize * 10) / 16;
1450N/A } else if (aspect_ratio == 1)
1450N/A vsize = (hsize * 3) / 4;
1450N/A else if (aspect_ratio == 2)
1450N/A vsize = (hsize * 4) / 5;
1450N/A else
1450N/A vsize = (hsize * 9) / 16;
1450N/A
1450N/A /* HDTV hack, part 1 */
1450N/A if (vrefresh_rate == 60 &&
1450N/A ((hsize == 1360 && vsize == 765) ||
1450N/A (hsize == 1368 && vsize == 769))) {
1450N/A hsize = 1366;
1450N/A vsize = 768;
1450N/A }
1450N/A
1450N/A /*
1450N/A * If this connector already has a mode for this size and refresh
1450N/A * rate (because it came from detailed or CVT info), use that
1450N/A * instead. This way we don't have to guess at interlace or
1450N/A * reduced blanking.
1450N/A */
1450N/A list_for_each_entry(m, struct drm_display_mode, &connector->probed_modes, head)
1450N/A if (m->hdisplay == hsize && m->vdisplay == vsize &&
1450N/A drm_mode_vrefresh(m) == vrefresh_rate)
1450N/A return NULL;
1450N/A
1450N/A /* HDTV hack, part 2 */
1450N/A if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1450N/A mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1450N/A false);
1450N/A mode->hdisplay = 1366;
1450N/A mode->hsync_start = mode->hsync_start - 1;
1450N/A mode->hsync_end = mode->hsync_end - 1;
1450N/A return mode;
1450N/A }
1450N/A
1450N/A /* check whether it can be found in default mode table */
1450N/A if (drm_monitor_supports_rb(edid)) {
1450N/A mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1450N/A true);
1450N/A if (mode)
1450N/A return mode;
1450N/A }
1450N/A mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1450N/A if (mode)
1450N/A return mode;
1450N/A
1450N/A /* okay, generate it */
1450N/A switch (timing_level) {
1450N/A case LEVEL_DMT:
1450N/A break;
1450N/A case LEVEL_GTF:
1450N/A mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1450N/A break;
1450N/A case LEVEL_GTF2:
1450N/A /*
1450N/A * This is potentially wrong if there's ever a monitor with
1450N/A * more than one ranges section, each claiming a different
1450N/A * secondary GTF curve. Please don't do that.
1450N/A */
1450N/A mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1450N/A if (!mode)
1450N/A return NULL;
1450N/A if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1450N/A drm_mode_destroy(dev, mode);
1450N/A mode = drm_gtf_mode_complex(dev, hsize, vsize,
1450N/A vrefresh_rate, 0, 0,
1450N/A drm_gtf2_m(edid),
1450N/A drm_gtf2_2c(edid),
1450N/A drm_gtf2_k(edid),
1450N/A drm_gtf2_2j(edid));
1450N/A }
1450N/A break;
1450N/A case LEVEL_CVT:
1450N/A mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1450N/A false);
1450N/A break;
1450N/A }
1450N/A return mode;
1450N/A}
1450N/A
1450N/A/*
1450N/A * EDID is delightfully ambiguous about how interlaced modes are to be
1450N/A * encoded. Our internal representation is of frame height, but some
1450N/A * HDTV detailed timings are encoded as field height.
1450N/A *
1450N/A * The format list here is from CEA, in frame size. Technically we
1450N/A * should be checking refresh rate too. Whatever.
1450N/A */
1450N/Astatic void
1450N/Adrm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1450N/A struct detailed_pixel_timing *pt)
1450N/A{
1450N/A int i;
1450N/A static const struct {
1450N/A int w, h;
1450N/A } cea_interlaced[] = {
1450N/A { 1920, 1080 },
1450N/A { 720, 480 },
1450N/A { 1440, 480 },
1450N/A { 2880, 480 },
1450N/A { 720, 576 },
1450N/A { 1440, 576 },
1450N/A { 2880, 576 },
1450N/A };
1450N/A
1450N/A if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1450N/A return;
1450N/A
1450N/A for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1450N/A if ((mode->hdisplay == cea_interlaced[i].w) &&
1450N/A (mode->vdisplay == cea_interlaced[i].h / 2)) {
1450N/A mode->vdisplay *= 2;
1450N/A mode->vsync_start *= 2;
1450N/A mode->vsync_end *= 2;
1450N/A mode->vtotal *= 2;
1450N/A mode->vtotal |= 1;
1450N/A }
1450N/A }
1450N/A
1450N/A mode->flags |= DRM_MODE_FLAG_INTERLACE;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_mode_detailed - create a new mode from an EDID detailed timing section
1450N/A * @dev: DRM device (needed to create new mode)
1450N/A * @edid: EDID block
1450N/A * @timing: EDID detailed timing info
1450N/A * @quirks: quirks to apply
1450N/A *
1450N/A * An EDID detailed timing block contains enough info for us to create and
1450N/A * return a new struct drm_display_mode.
1450N/A */
1450N/Astatic struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1450N/A struct edid *edid,
1450N/A struct detailed_timing *timing,
1450N/A u32 quirks)
1450N/A{
1450N/A struct drm_display_mode *mode;
1450N/A struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1450N/A unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1450N/A unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1450N/A unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1450N/A unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1450N/A unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1450N/A unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1450N/A unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
1450N/A unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1450N/A
1450N/A /* ignore tiny modes */
1450N/A if (hactive < 64 || vactive < 64)
1450N/A return NULL;
1450N/A
1450N/A if (pt->misc & DRM_EDID_PT_STEREO) {
1450N/A DRM_ERROR("stereo mode not supported\n");
1450N/A return NULL;
1450N/A }
1450N/A if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1450N/A DRM_ERROR("integrated sync not supported\n");
1450N/A }
1450N/A
1450N/A /* it is incorrect if hsync/vsync width is zero */
1450N/A if (!hsync_pulse_width || !vsync_pulse_width) {
1450N/A DRM_DEBUG_KMS("Incorrect Detailed timing. "
1450N/A "Wrong Hsync/Vsync pulse width\n");
1450N/A return NULL;
1450N/A }
1450N/A
1450N/A if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1450N/A mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1450N/A if (!mode)
1450N/A return NULL;
1450N/A
1450N/A goto set_size;
1450N/A }
1450N/A
1450N/A mode = drm_mode_create(dev);
1450N/A if (!mode)
1450N/A return NULL;
1450N/A
1450N/A if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1450N/A timing->pixel_clock = cpu_to_le16(1088);
1450N/A
1450N/A mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1450N/A
1450N/A mode->hdisplay = hactive;
1450N/A mode->hsync_start = mode->hdisplay + hsync_offset;
1450N/A mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1450N/A mode->htotal = mode->hdisplay + hblank;
1450N/A
1450N/A mode->vdisplay = vactive;
1450N/A mode->vsync_start = mode->vdisplay + vsync_offset;
1450N/A mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1450N/A mode->vtotal = mode->vdisplay + vblank;
1450N/A
1450N/A /* Some EDIDs have bogus h/vtotal values */
1450N/A if (mode->hsync_end > mode->htotal)
1450N/A mode->htotal = mode->hsync_end + 1;
1450N/A if (mode->vsync_end > mode->vtotal)
1450N/A mode->vtotal = mode->vsync_end + 1;
1450N/A
1450N/A drm_mode_do_interlace_quirk(mode, pt);
1450N/A
1450N/A if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1450N/A pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1450N/A }
1450N/A
1450N/A mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1450N/A DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1450N/A mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1450N/A DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1450N/A
1450N/Aset_size:
1450N/A mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1450N/A mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1450N/A
1450N/A if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1450N/A mode->width_mm *= 10;
1450N/A mode->height_mm *= 10;
1450N/A }
1450N/A
1450N/A if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1450N/A mode->width_mm = edid->width_cm * 10;
1450N/A mode->height_mm = edid->height_cm * 10;
1450N/A }
1450N/A
1450N/A mode->type = DRM_MODE_TYPE_DRIVER;
1450N/A drm_mode_set_name(mode);
1450N/A
1450N/A return mode;
1450N/A}
1450N/A
1450N/Astatic bool
1450N/Amode_in_hsync_range(const struct drm_display_mode *mode,
1450N/A struct edid *edid, u8 *t)
1450N/A{
1450N/A int hsync, hmin, hmax;
1450N/A
1450N/A hmin = t[7];
1450N/A if (edid->revision >= 4)
1450N/A hmin += ((t[4] & 0x04) ? 255 : 0);
1450N/A hmax = t[8];
1450N/A if (edid->revision >= 4)
1450N/A hmax += ((t[4] & 0x08) ? 255 : 0);
1450N/A hsync = drm_mode_hsync(mode);
1450N/A
1450N/A return (hsync <= hmax && hsync >= hmin);
1450N/A}
1450N/A
1450N/Astatic bool
1450N/Amode_in_vsync_range(const struct drm_display_mode *mode,
1450N/A struct edid *edid, u8 *t)
1450N/A{
1450N/A int vsync, vmin, vmax;
1450N/A
1450N/A vmin = t[5];
1450N/A if (edid->revision >= 4)
1450N/A vmin += ((t[4] & 0x01) ? 255 : 0);
1450N/A vmax = t[6];
1450N/A if (edid->revision >= 4)
1450N/A vmax += ((t[4] & 0x02) ? 255 : 0);
1450N/A vsync = drm_mode_vrefresh(mode);
1450N/A
1450N/A return (vsync <= vmax && vsync >= vmin);
1450N/A}
1450N/A
1450N/Astatic u32
1450N/Arange_pixel_clock(struct edid *edid, u8 *t)
1450N/A{
1450N/A /* unspecified */
1450N/A if (t[9] == 0 || t[9] == 255)
1450N/A return 0;
1450N/A
1450N/A /* 1.4 with CVT support gives us real precision, yay */
1450N/A if (edid->revision >= 4 && t[10] == 0x04)
1450N/A return (t[9] * 10000) - ((t[12] >> 2) * 250);
1450N/A
1450N/A /* 1.3 is pathetic, so fuzz up a bit */
1450N/A return t[9] * 10000 + 5001;
1450N/A}
1450N/A
1450N/Astatic bool
1450N/Amode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1450N/A struct detailed_timing *timing)
1450N/A{
1450N/A u32 max_clock;
1450N/A u8 *t = (u8 *)timing;
1450N/A
1450N/A if (!mode_in_hsync_range(mode, edid, t))
1450N/A return false;
1450N/A
1450N/A if (!mode_in_vsync_range(mode, edid, t))
1450N/A return false;
1450N/A
1450N/A if ((max_clock = range_pixel_clock(edid, t)))
1450N/A if (mode->clock > max_clock)
1450N/A return false;
1450N/A
1450N/A /* 1.4 max horizontal check */
1450N/A if (edid->revision >= 4 && t[10] == 0x04)
1450N/A if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1450N/A return false;
1450N/A
1450N/A if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1450N/A return false;
1450N/A
1450N/A return true;
1450N/A}
1450N/A
1450N/Astatic bool valid_inferred_mode(const struct drm_connector *connector,
1450N/A const struct drm_display_mode *mode)
1450N/A{
1450N/A struct drm_display_mode *m;
1450N/A bool ok = false;
1450N/A
1450N/A list_for_each_entry(m, struct drm_display_mode, &connector->probed_modes, head) {
1450N/A if (mode->hdisplay == m->hdisplay &&
1450N/A mode->vdisplay == m->vdisplay &&
1450N/A drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1450N/A return false; /* duplicated */
1450N/A if (mode->hdisplay <= m->hdisplay &&
1450N/A mode->vdisplay <= m->vdisplay)
1450N/A ok = true;
1450N/A }
1450N/A return ok;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Adrm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1450N/A struct detailed_timing *timing)
1450N/A{
1450N/A int i, modes = 0;
1450N/A struct drm_display_mode *newmode;
1450N/A struct drm_device *dev = connector->dev;
1450N/A
1450N/A for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1450N/A if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1450N/A valid_inferred_mode(connector, drm_dmt_modes + i)) {
1450N/A newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1450N/A if (newmode) {
1450N/A drm_mode_probed_add(connector, newmode);
1450N/A modes++;
1450N/A }
1450N/A }
1450N/A }
1450N/A
1450N/A return modes;
1450N/A}
1450N/A
1450N/A/* fix up 1366x768 mode from 1368x768;
1450N/A * GFT/CVT can't express 1366 width which isn't dividable by 8
1450N/A */
1450N/Astatic void fixup_mode_1366x768(struct drm_display_mode *mode)
1450N/A{
1450N/A if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1450N/A mode->hdisplay = 1366;
1450N/A mode->hsync_start--;
1450N/A mode->hsync_end--;
1450N/A drm_mode_set_name(mode);
1450N/A }
1450N/A}
1450N/A
1450N/Astatic int
1450N/Adrm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1450N/A struct detailed_timing *timing)
1450N/A{
1450N/A int i, modes = 0;
1450N/A struct drm_display_mode *newmode;
1450N/A struct drm_device *dev = connector->dev;
1450N/A
1450N/A for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1450N/A const struct minimode *m = &extra_modes[i];
1450N/A newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
1450N/A if (!newmode)
1450N/A return modes;
1450N/A
1450N/A fixup_mode_1366x768(newmode);
1450N/A if (!mode_in_range(newmode, edid, timing) ||
1450N/A !valid_inferred_mode(connector, newmode)) {
1450N/A drm_mode_destroy(dev, newmode);
1450N/A continue;
1450N/A }
1450N/A
1450N/A drm_mode_probed_add(connector, newmode);
1450N/A modes++;
1450N/A }
1450N/A
1450N/A return modes;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Adrm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1450N/A struct detailed_timing *timing)
1450N/A{
1450N/A int i, modes = 0;
1450N/A struct drm_display_mode *newmode;
1450N/A struct drm_device *dev = connector->dev;
1450N/A bool rb = drm_monitor_supports_rb(edid);
1450N/A
1450N/A for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1450N/A const struct minimode *m = &extra_modes[i];
1450N/A newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
1450N/A if (!newmode)
1450N/A return modes;
1450N/A
1450N/A fixup_mode_1366x768(newmode);
1450N/A if (!mode_in_range(newmode, edid, timing) ||
1450N/A !valid_inferred_mode(connector, newmode)) {
1450N/A drm_mode_destroy(dev, newmode);
1450N/A continue;
1450N/A }
1450N/A
1450N/A drm_mode_probed_add(connector, newmode);
1450N/A modes++;
1450N/A }
1450N/A
1450N/A return modes;
1450N/A}
1450N/A
1450N/Astatic void
1450N/Ado_inferred_modes(struct detailed_timing *timing, void *c)
1450N/A{
1450N/A struct detailed_mode_closure *closure = c;
1450N/A struct detailed_non_pixel *data = &timing->data.other_data;
1450N/A struct detailed_data_monitor_range *range = &data->data.range;
1450N/A
1450N/A if (data->type != EDID_DETAIL_MONITOR_RANGE)
1450N/A return;
1450N/A
1450N/A closure->modes += drm_dmt_modes_for_range(closure->connector,
1450N/A closure->edid,
1450N/A timing);
1450N/A
1450N/A if (!version_greater(closure->edid, 1, 1))
1450N/A return; /* GTF not defined yet */
1450N/A
1450N/A switch (range->flags) {
1450N/A case 0x02: /* secondary gtf, XXX could do more */
1450N/A case 0x00: /* default gtf */
1450N/A closure->modes += drm_gtf_modes_for_range(closure->connector,
1450N/A closure->edid,
1450N/A timing);
1450N/A break;
1450N/A case 0x04: /* cvt, only in 1.4+ */
1450N/A if (!version_greater(closure->edid, 1, 3))
1450N/A break;
1450N/A
1450N/A closure->modes += drm_cvt_modes_for_range(closure->connector,
1450N/A closure->edid,
1450N/A timing);
1450N/A break;
1450N/A case 0x01: /* just the ranges, no formula */
1450N/A default:
1450N/A break;
1450N/A }
1450N/A}
1450N/A
1450N/Astatic int
1450N/Aadd_inferred_modes(struct drm_connector *connector, struct edid *edid)
1450N/A{
1450N/A struct detailed_mode_closure closure = {
1450N/A connector, edid, 0, 0, 0
1450N/A };
1450N/A
1450N/A if (version_greater(edid, 1, 0))
1450N/A drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1450N/A &closure);
1450N/A
1450N/A return closure.modes;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Adrm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1450N/A{
1450N/A int i, j, m, modes = 0;
1450N/A struct drm_display_mode *mode;
1450N/A u8 *est = ((u8 *)timing) + 5;
1450N/A
1450N/A for (i = 0; i < 6; i++) {
1450N/A for (j = 7; j > 0; j--) {
1450N/A m = (i * 8) + (7 - j);
1450N/A if (m >= ARRAY_SIZE(est3_modes))
1450N/A break;
1450N/A if (est[i] & (1 << j)) {
1450N/A mode = drm_mode_find_dmt(connector->dev,
1450N/A est3_modes[m].w,
1450N/A est3_modes[m].h,
1450N/A est3_modes[m].r,
1450N/A est3_modes[m].rb);
1450N/A if (mode) {
1450N/A drm_mode_probed_add(connector, mode);
1450N/A modes++;
1450N/A }
1450N/A }
1450N/A }
1450N/A }
1450N/A
1450N/A return modes;
1450N/A}
1450N/A
1450N/Astatic void
1450N/Ado_established_modes(struct detailed_timing *timing, void *c)
1450N/A{
1450N/A struct detailed_mode_closure *closure = c;
1450N/A struct detailed_non_pixel *data = &timing->data.other_data;
1450N/A
1450N/A if (data->type == EDID_DETAIL_EST_TIMINGS)
1450N/A closure->modes += drm_est3_modes(closure->connector, timing);
1450N/A}
1450N/A
1450N/A/**
1450N/A * add_established_modes - get est. modes from EDID and add them
1450N/A * @edid: EDID block to scan
1450N/A *
1450N/A * Each EDID block contains a bitmap of the supported "established modes" list
1450N/A * (defined above). Tease them out and add them to the global modes list.
1450N/A */
1450N/Astatic int
1450N/Aadd_established_modes(struct drm_connector *connector, struct edid *edid)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A unsigned long est_bits = edid->established_timings.t1 |
1450N/A (edid->established_timings.t2 << 8) |
1450N/A ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1450N/A int i, modes = 0;
1450N/A struct detailed_mode_closure closure = {
1450N/A connector, edid, 0, 0, 0
1450N/A };
1450N/A
1450N/A for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1450N/A if (est_bits & (1<<i)) {
1450N/A struct drm_display_mode *newmode;
1450N/A newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1450N/A if (newmode) {
1450N/A drm_mode_probed_add(connector, newmode);
1450N/A modes++;
1450N/A }
1450N/A }
1450N/A }
1450N/A
1450N/A if (version_greater(edid, 1, 0))
1450N/A drm_for_each_detailed_block((u8 *)edid,
1450N/A do_established_modes, &closure);
1450N/A
1450N/A return modes + closure.modes;
1450N/A}
1450N/A
1450N/Astatic void
1450N/Ado_standard_modes(struct detailed_timing *timing, void *c)
1450N/A{
1450N/A struct detailed_mode_closure *closure = c;
1450N/A struct detailed_non_pixel *data = &timing->data.other_data;
1450N/A struct drm_connector *connector = closure->connector;
1450N/A struct edid *edid = closure->edid;
1450N/A
1450N/A if (data->type == EDID_DETAIL_STD_MODES) {
1450N/A int i;
1450N/A for (i = 0; i < 6; i++) {
1450N/A struct std_timing *std;
1450N/A struct drm_display_mode *newmode;
1450N/A
1450N/A std = &data->data.timings[i];
1450N/A newmode = drm_mode_std(connector, edid, std,
1450N/A edid->revision);
1450N/A if (newmode) {
1450N/A drm_mode_probed_add(connector, newmode);
1450N/A closure->modes++;
1450N/A }
1450N/A }
1450N/A }
1450N/A}
1450N/A
1450N/A/**
1450N/A * add_standard_modes - get std. modes from EDID and add them
1450N/A * @edid: EDID block to scan
1450N/A *
1450N/A * Standard modes can be calculated using the appropriate standard (DMT,
1450N/A * GTF or CVT. Grab them from @edid and add them to the list.
1450N/A */
1450N/Astatic int
1450N/Aadd_standard_modes(struct drm_connector *connector, struct edid *edid)
1450N/A{
1450N/A int i, modes = 0;
1450N/A struct detailed_mode_closure closure = {
1450N/A connector, edid, 0, 0, 0
1450N/A };
1450N/A
1450N/A for (i = 0; i < EDID_STD_TIMINGS; i++) {
1450N/A struct drm_display_mode *newmode;
1450N/A
1450N/A newmode = drm_mode_std(connector, edid,
1450N/A &edid->standard_timings[i],
1450N/A edid->revision);
1450N/A if (newmode) {
1450N/A drm_mode_probed_add(connector, newmode);
1450N/A modes++;
1450N/A }
1450N/A }
1450N/A
1450N/A if (version_greater(edid, 1, 0))
1450N/A drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1450N/A &closure);
1450N/A
1450N/A /* XXX should also look for standard codes in VTB blocks */
1450N/A
1450N/A return modes + closure.modes;
1450N/A}
1450N/A
1450N/Astatic int drm_cvt_modes(struct drm_connector *connector,
1450N/A struct detailed_timing *timing)
1450N/A{
1450N/A int i, j, modes = 0;
1450N/A struct drm_display_mode *newmode;
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct cvt_timing *cvt;
1450N/A const int rates[] = { 60, 85, 75, 60, 50 };
1450N/A const u8 empty[3] = { 0, 0, 0 };
1450N/A
1450N/A for (i = 0; i < 4; i++) {
1450N/A int width, height;
1450N/A cvt = &(timing->data.other_data.data.cvt[i]);
1450N/A
1450N/A if (!memcmp(cvt->code, empty, 3))
1450N/A continue;
1450N/A
1450N/A height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1450N/A switch (cvt->code[1] & 0x0c) {
1450N/A case 0x00:
1450N/A width = height * 4 / 3;
1450N/A break;
1450N/A case 0x04:
1450N/A width = height * 16 / 9;
1450N/A break;
1450N/A case 0x08:
1450N/A width = height * 16 / 10;
1450N/A break;
1450N/A case 0x0c:
1450N/A width = height * 15 / 9;
1450N/A break;
1450N/A }
1450N/A
1450N/A for (j = 1; j < 5; j++) {
1450N/A if (cvt->code[2] & (1 << j)) {
1450N/A newmode = drm_cvt_mode(dev, width, height,
1450N/A rates[j], j == 0,
1450N/A false, false);
1450N/A if (newmode) {
1450N/A drm_mode_probed_add(connector, newmode);
1450N/A modes++;
1450N/A }
1450N/A }
1450N/A }
1450N/A }
1450N/A
1450N/A return modes;
1450N/A}
1450N/A
1450N/Astatic void
1450N/Ado_cvt_mode(struct detailed_timing *timing, void *c)
1450N/A{
1450N/A struct detailed_mode_closure *closure = c;
1450N/A struct detailed_non_pixel *data = &timing->data.other_data;
1450N/A
1450N/A if (data->type == EDID_DETAIL_CVT_3BYTE)
1450N/A closure->modes += drm_cvt_modes(closure->connector, timing);
1450N/A}
1450N/A
1450N/Astatic int
1450N/Aadd_cvt_modes(struct drm_connector *connector, struct edid *edid)
1450N/A{
1450N/A struct detailed_mode_closure closure = {
1450N/A connector, edid, 0, 0, 0
1450N/A };
1450N/A
1450N/A if (version_greater(edid, 1, 2))
1450N/A drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
1450N/A
1450N/A /* XXX should also look for CVT codes in VTB blocks */
1450N/A
1450N/A return closure.modes;
1450N/A}
1450N/A
1450N/Astatic void
1450N/Ado_detailed_mode(struct detailed_timing *timing, void *c)
1450N/A{
1450N/A struct detailed_mode_closure *closure = c;
1450N/A struct drm_display_mode *newmode;
1450N/A
1450N/A if (timing->pixel_clock) {
1450N/A newmode = drm_mode_detailed(closure->connector->dev,
1450N/A closure->edid, timing,
1450N/A closure->quirks);
1450N/A if (!newmode)
1450N/A return;
1450N/A
1450N/A if (closure->preferred)
1450N/A newmode->type |= DRM_MODE_TYPE_PREFERRED;
1450N/A
1450N/A drm_mode_probed_add(closure->connector, newmode);
1450N/A closure->modes++;
1450N/A closure->preferred = 0;
1450N/A }
1450N/A}
1450N/A
1450N/A/*
1450N/A * add_detailed_modes - Add modes from detailed timings
1450N/A * @connector: attached connector
1450N/A * @edid: EDID block to scan
1450N/A * @quirks: quirks to apply
1450N/A */
1450N/Astatic int
1450N/Aadd_detailed_modes(struct drm_connector *connector, struct edid *edid,
1450N/A u32 quirks)
1450N/A{
1450N/A struct detailed_mode_closure closure = {
1450N/A connector,
1450N/A edid,
1450N/A 1,
1450N/A quirks,
1450N/A 0
1450N/A };
1450N/A
1450N/A if (closure.preferred && !version_greater(edid, 1, 3))
1450N/A closure.preferred =
1450N/A (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1450N/A
1450N/A drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1450N/A
1450N/A return closure.modes;
1450N/A}
1450N/A
1450N/A#define HDMI_IDENTIFIER 0x000C03
1450N/A#define AUDIO_BLOCK 0x01
1450N/A#define VIDEO_BLOCK 0x02
1450N/A#define VENDOR_BLOCK 0x03
1450N/A#define SPEAKER_BLOCK 0x04
1450N/A#define VIDEO_CAPABILITY_BLOCK 0x07
1450N/A#define EDID_BASIC_AUDIO (1 << 6)
1450N/A#define EDID_CEA_YCRCB444 (1 << 5)
1450N/A#define EDID_CEA_YCRCB422 (1 << 4)
1450N/A#define EDID_CEA_VCDB_QS (1 << 6)
1450N/A
1450N/A/**
1450N/A * Search EDID for CEA extension block.
1450N/A */
1450N/Au8 *drm_find_cea_extension(struct edid *edid)
1450N/A{
1450N/A u8 *edid_ext = NULL;
1450N/A int i;
1450N/A
1450N/A /* No EDID or EDID extensions */
1450N/A if (edid == NULL || edid->extensions == 0)
1450N/A return NULL;
1450N/A
1450N/A /* Find CEA extension */
1450N/A for (i = 0; i < edid->extensions; i++) {
1450N/A edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1450N/A if (edid_ext[0] == CEA_EXT)
1450N/A break;
1450N/A }
1450N/A
1450N/A if (i == edid->extensions)
1450N/A return NULL;
1450N/A
1450N/A return edid_ext;
1450N/A}
1450N/A
1450N/A/*
1450N/A * Calculate the alternate clock for the CEA mode
1450N/A * (60Hz vs. 59.94Hz etc.)
1450N/A */
1450N/Astatic unsigned int
1450N/Acea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
1450N/A{
1450N/A unsigned int clock = cea_mode->clock;
1450N/A
1450N/A if (cea_mode->vrefresh % 6 != 0)
1450N/A return clock;
1450N/A
1450N/A /*
1450N/A * edid_cea_modes contains the 59.94Hz
1450N/A * variant for 240 and 480 line modes,
1450N/A * and the 60Hz variant otherwise.
1450N/A */
1450N/A if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
1450N/A clock = clock * 1001 / 1000;
1450N/A else
1450N/A clock = DIV_ROUND_UP(clock * 1000, 1001);
1450N/A
1450N/A return clock;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_match_cea_mode - look for a CEA mode matching given mode
1450N/A * @to_match: display mode
1450N/A *
1450N/A * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
1450N/A * mode.
1450N/A */
1450N/Au8 drm_match_cea_mode(const struct drm_display_mode *to_match)
1450N/A{
1450N/A u8 mode;
1450N/A
1450N/A if (!to_match->clock)
1450N/A return 0;
1450N/A
1450N/A for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
1450N/A const struct drm_display_mode *cea_mode = (struct drm_display_mode *)&edid_cea_modes[mode];
1450N/A unsigned int clock1, clock2;
1450N/A
1450N/A /* Check both 60Hz and 59.94Hz */
1450N/A clock1 = cea_mode->clock;
1450N/A clock2 = cea_mode_alternate_clock(cea_mode);
1450N/A
1450N/A if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
1450N/A KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
1450N/A drm_mode_equal_no_clocks(to_match, cea_mode))
1450N/A return mode + 1;
1450N/A }
1450N/A return 0;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Aadd_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A struct drm_display_mode *mode, *tmp;
1450N/A struct list_head list;
1450N/A
1450N/A INIT_LIST_HEAD(&list);
1450N/A
1450N/A int modes = 0;
1450N/A
1450N/A /* Don't add CEA modes if the CEA extension block is missing */
1450N/A if (!drm_find_cea_extension(edid))
1450N/A return 0;
1450N/A
1450N/A /*
1450N/A * Go through all probed modes and create a new mode
1450N/A * with the alternate clock for certain CEA modes.
1450N/A */
1450N/A list_for_each_entry(mode, struct drm_display_mode, &connector->probed_modes, head) {
1450N/A const struct drm_display_mode *cea_mode;
1450N/A struct drm_display_mode *newmode;
1450N/A u8 cea_mode_idx = drm_match_cea_mode(mode) - 1;
1450N/A unsigned int clock1, clock2;
1450N/A
1450N/A if (cea_mode_idx >= ARRAY_SIZE(edid_cea_modes))
1450N/A continue;
1450N/A
1450N/A cea_mode = &edid_cea_modes[cea_mode_idx];
1450N/A
1450N/A clock1 = cea_mode->clock;
1450N/A clock2 = cea_mode_alternate_clock(cea_mode);
1450N/A
1450N/A if (clock1 == clock2)
1450N/A continue;
1450N/A
1450N/A if (mode->clock != clock1 && mode->clock != clock2)
1450N/A continue;
1450N/A
1450N/A newmode = drm_mode_duplicate(dev, cea_mode);
1450N/A if (!newmode)
1450N/A continue;
1450N/A
1450N/A /*
1450N/A * The current mode could be either variant. Make
1450N/A * sure to pick the "other" clock for the new mode.
1450N/A */
1450N/A if (mode->clock != clock1)
1450N/A newmode->clock = clock1;
1450N/A else
1450N/A newmode->clock = clock2;
1450N/A
1450N/A list_add_tail(&newmode->head, &list, (caddr_t)newmode);
1450N/A }
1450N/A
1450N/A list_for_each_entry_safe(mode, tmp, struct drm_display_mode, &list, head) {
1450N/A list_del(&mode->head);
1450N/A drm_mode_probed_add(connector, mode);
1450N/A modes++;
1450N/A }
1450N/A
1450N/A return modes;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Ado_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1450N/A{
1450N/A struct drm_device *dev = connector->dev;
1450N/A u8 * mode, cea_mode;
1450N/A int modes = 0;
1450N/A
1450N/A for (mode = db; mode < db + len; mode++) {
1450N/A cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1450N/A if (cea_mode < ARRAY_SIZE(edid_cea_modes)) {
1450N/A struct drm_display_mode *newmode;
1450N/A newmode = drm_mode_duplicate(dev,
1450N/A &edid_cea_modes[cea_mode]);
1450N/A if (newmode) {
1450N/A newmode->vrefresh = 0;
1450N/A drm_mode_probed_add(connector, newmode);
1450N/A modes++;
1450N/A }
1450N/A }
1450N/A }
1450N/A
1450N/A return modes;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Acea_db_payload_len(const u8 *db)
1450N/A{
1450N/A return db[0] & 0x1f;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Acea_db_tag(const u8 *db)
1450N/A{
1450N/A return db[0] >> 5;
1450N/A}
1450N/A
1450N/Astatic int
1450N/Acea_revision(const u8 *cea)
1450N/A{
1450N/A return cea[1];
1450N/A}
1450N/A
1450N/Astatic int
1450N/Acea_db_offsets(const u8 *cea, int *start, int *end)
1450N/A{
1450N/A /* Data block offset in CEA extension block */
1450N/A *start = 4;
1450N/A *end = cea[2];
1450N/A if (*end == 0)
1450N/A *end = 127;
1450N/A if (*end < 4 || *end > 127)
1450N/A return -ERANGE;
1450N/A return 0;
1450N/A}
1450N/A
1450N/A#define for_each_cea_db(cea, i, start, end) \
1450N/A for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
1450N/A
1450N/Astatic int
1450N/Aadd_cea_modes(struct drm_connector *connector, struct edid *edid)
1450N/A{
1450N/A u8 * cea = drm_find_cea_extension(edid);
1450N/A u8 * db, dbl;
1450N/A int modes = 0;
1450N/A
1450N/A if (cea && cea_revision(cea) >= 3) {
1450N/A int i, start, end;
1450N/A
1450N/A if (cea_db_offsets(cea, &start, &end))
1450N/A return 0;
1450N/A
1450N/A for_each_cea_db(cea, i, start, end) {
1450N/A db = &cea[i];
1450N/A dbl = cea_db_payload_len(db);
1450N/A
1450N/A if (cea_db_tag(db) == VIDEO_BLOCK)
1450N/A modes += do_cea_modes (connector, db+1, dbl);
1450N/A }
1450N/A }
1450N/A
1450N/A return modes;
1450N/A}
1450N/A
1450N/Astatic void
1450N/Aparse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
1450N/A{
1450N/A u8 len = cea_db_payload_len(db);
1450N/A
1450N/A if (len >= 6) {
1450N/A connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1450N/A connector->dvi_dual = db[6] & 1;
1450N/A }
1450N/A if (len >= 7)
1450N/A connector->max_tmds_clock = db[7] * 5;
1450N/A if (len >= 8) {
1450N/A connector->latency_present[0] = db[8] >> 7;
1450N/A connector->latency_present[1] = (db[8] >> 6) & 1;
1450N/A }
1450N/A if (len >= 9)
1450N/A connector->video_latency[0] = db[9];
1450N/A if (len >= 10)
1450N/A connector->audio_latency[0] = db[10];
1450N/A if (len >= 11)
1450N/A connector->video_latency[1] = db[11];
1450N/A if (len >= 12)
1450N/A connector->audio_latency[1] = db[12];
1450N/A
1450N/A DRM_LOG_KMS("HDMI: DVI dual %d, "
1450N/A "max TMDS clock %d, "
1450N/A "latency present %d %d, "
1450N/A "video latency %d %d, "
1450N/A "audio latency %d %d\n",
1450N/A connector->dvi_dual,
1450N/A connector->max_tmds_clock,
1450N/A (int) connector->latency_present[0],
1450N/A (int) connector->latency_present[1],
1450N/A connector->video_latency[0],
1450N/A connector->video_latency[1],
1450N/A connector->audio_latency[0],
1450N/A connector->audio_latency[1]);
1450N/A}
1450N/A
1450N/Astatic void
1450N/Amonitor_name(struct detailed_timing *t, void *data)
1450N/A{
1450N/A if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1450N/A *(u8 **)data = t->data.other_data.data.str.str;
1450N/A}
1450N/A
1450N/Astatic bool cea_db_is_hdmi_vsdb(const u8 *db)
1450N/A{
1450N/A int hdmi_id;
1450N/A
1450N/A if (cea_db_tag(db) != VENDOR_BLOCK)
1450N/A return false;
1450N/A
1450N/A if (cea_db_payload_len(db) < 5)
1450N/A return false;
1450N/A
1450N/A hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
1450N/A
1450N/A return hdmi_id == HDMI_IDENTIFIER;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_edid_to_eld - build ELD from EDID
1450N/A * @connector: connector corresponding to the HDMI/DP sink
1450N/A * @edid: EDID to parse
1450N/A *
1450N/A * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1450N/A * Some ELD fields are left to the graphics driver caller:
1450N/A * - Conn_Type
1450N/A * - HDCP
1450N/A * - Port_ID
1450N/A */
1450N/Avoid drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1450N/A{
1450N/A uint8_t *eld = connector->eld;
1450N/A u8 *cea;
1450N/A u8 *name;
1450N/A u8 *db;
1450N/A int sad_count = 0;
1450N/A int mnl;
1450N/A int dbl;
1450N/A
1450N/A (void) memset(eld, 0, sizeof(connector->eld));
1450N/A
1450N/A cea = drm_find_cea_extension(edid);
1450N/A if (!cea) {
1450N/A DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1450N/A return;
1450N/A }
1450N/A
1450N/A name = NULL;
1450N/A drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1450N/A for (mnl = 0; name && mnl < 13; mnl++) {
1450N/A if (name[mnl] == 0x0a)
1450N/A break;
1450N/A eld[20 + mnl] = name[mnl];
1450N/A }
1450N/A eld[4] = (cea[1] << 5) | mnl;
1450N/A DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1450N/A
1450N/A eld[0] = 2 << 3; /* ELD version: 2 */
1450N/A
1450N/A eld[16] = edid->mfg_id[0];
1450N/A eld[17] = edid->mfg_id[1];
1450N/A eld[18] = edid->prod_code[0];
1450N/A eld[19] = edid->prod_code[1];
1450N/A
1450N/A if (cea_revision(cea) >= 3) {
1450N/A int i, start, end;
1450N/A
1450N/A if (cea_db_offsets(cea, &start, &end)) {
1450N/A start = 0;
1450N/A end = 0;
1450N/A }
1450N/A
1450N/A for_each_cea_db(cea, i, start, end) {
1450N/A db = &cea[i];
1450N/A dbl = cea_db_payload_len(db);
1450N/A
1450N/A switch (cea_db_tag(db)) {
1450N/A case AUDIO_BLOCK:
1450N/A /* Audio Data Block, contains SADs */
1450N/A sad_count = dbl / 3;
1450N/A if (dbl >= 1)
1450N/A (void) memcpy(eld + 20 + mnl, &db[1], dbl);
1450N/A break;
1450N/A case SPEAKER_BLOCK:
1450N/A /* Speaker Allocation Data Block */
1450N/A if (dbl >= 1)
1450N/A eld[7] = db[1];
1450N/A break;
1450N/A case VENDOR_BLOCK:
1450N/A /* HDMI Vendor-Specific Data Block */
1450N/A if (cea_db_is_hdmi_vsdb(db))
1450N/A parse_hdmi_vsdb(connector, db);
1450N/A break;
1450N/A default:
1450N/A break;
1450N/A }
1450N/A }
1450N/A }
1450N/A eld[5] |= sad_count << 4;
1450N/A eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1450N/A
1450N/A DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_edid_to_sad - extracts SADs from EDID
1450N/A * @edid: EDID to parse
1450N/A * @sads: pointer that will be set to the extracted SADs
1450N/A *
1450N/A * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
1450N/A * Note: returned pointer needs to be kfreed
1450N/A *
1450N/A * Return number of found SADs or negative number on error.
1450N/A */
1450N/Aint drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
1450N/A{
1450N/A int count = 0;
1450N/A int i, start, end, dbl;
1450N/A u8 *cea;
1450N/A
1450N/A cea = drm_find_cea_extension(edid);
1450N/A if (!cea) {
1450N/A DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
1450N/A return -ENOENT;
1450N/A }
1450N/A
1450N/A if (cea_revision(cea) < 3) {
1450N/A DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
1450N/A return -ENOTSUP;
1450N/A }
1450N/A
1450N/A if (cea_db_offsets(cea, &start, &end)) {
1450N/A DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
1450N/A return -EPROTO;
1450N/A }
1450N/A
1450N/A for_each_cea_db(cea, i, start, end) {
1450N/A u8 *db = &cea[i];
1450N/A
1450N/A if (cea_db_tag(db) == AUDIO_BLOCK) {
1450N/A int j;
1450N/A dbl = cea_db_payload_len(db);
1450N/A
1450N/A count = dbl / 3; /* SAD is 3B */
1450N/A *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
1450N/A if (!*sads)
1450N/A return -ENOMEM;
1450N/A for (j = 0; j < count; j++) {
1450N/A u8 *sad = &db[1 + j * 3];
1450N/A
1450N/A (*sads)[j].format = (sad[0] & 0x78) >> 3;
1450N/A (*sads)[j].channels = sad[0] & 0x7;
1450N/A (*sads)[j].freq = sad[1] & 0x7F;
1450N/A (*sads)[j].byte2 = sad[2];
1450N/A }
1450N/A break;
1450N/A }
1450N/A }
1450N/A
1450N/A return count;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1450N/A * @connector: connector associated with the HDMI/DP sink
1450N/A * @mode: the display mode
1450N/A */
1450N/Aint drm_av_sync_delay(struct drm_connector *connector,
1450N/A struct drm_display_mode *mode)
1450N/A{
1450N/A int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1450N/A int a, v;
1450N/A
1450N/A if (!connector->latency_present[0])
1450N/A return 0;
1450N/A if (!connector->latency_present[1])
1450N/A i = 0;
1450N/A
1450N/A a = connector->audio_latency[i];
1450N/A v = connector->video_latency[i];
1450N/A
1450N/A /*
1450N/A * HDMI/DP sink doesn't support audio or video?
1450N/A */
1450N/A if (a == 255 || v == 255)
1450N/A return 0;
1450N/A
1450N/A /*
1450N/A * Convert raw EDID values to millisecond.
1450N/A * Treat unknown latency as 0ms.
1450N/A */
1450N/A if (a)
1450N/A a = min(2 * (a - 1), 500);
1450N/A if (v)
1450N/A v = min(2 * (v - 1), 500);
1450N/A
1450N/A return max(v - a, 0);
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1450N/A * @encoder: the encoder just changed display mode
1450N/A * @mode: the adjusted display mode
1450N/A *
1450N/A * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1450N/A * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1450N/A */
1450N/Astruct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1450N/A /* LINTED E_FUNC_ARG_UNUSED */
1450N/A struct drm_display_mode *mode)
1450N/A{
1450N/A struct drm_connector *connector;
1450N/A struct drm_device *dev = encoder->dev;
1450N/A
1450N/A list_for_each_entry(connector, struct drm_connector, &dev->mode_config.connector_list, head)
1450N/A if (connector->encoder == encoder && connector->eld[0])
1450N/A return connector;
1450N/A
1450N/A return NULL;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1450N/A * @edid: monitor EDID information
1450N/A *
1450N/A * Parse the CEA extension according to CEA-861-B.
1450N/A * Return true if HDMI, false if not or unknown.
1450N/A */
1450N/Abool drm_detect_hdmi_monitor(struct edid *edid)
1450N/A{
1450N/A u8 *edid_ext;
1450N/A int i;
1450N/A int start_offset, end_offset;
1450N/A
1450N/A edid_ext = drm_find_cea_extension(edid);
1450N/A if (!edid_ext)
1450N/A return false;
1450N/A
1450N/A if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
1450N/A return false;
1450N/A
1450N/A /*
1450N/A * Because HDMI identifier is in Vendor Specific Block,
1450N/A * search it from all data blocks of CEA extension.
1450N/A */
1450N/A for_each_cea_db(edid_ext, i, start_offset, end_offset) {
1450N/A if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
1450N/A return true;
1450N/A }
1450N/A
1450N/A return false;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_detect_monitor_audio - check monitor audio capability
1450N/A *
1450N/A * Monitor should have CEA extension block.
1450N/A * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1450N/A * audio' only. If there is any audio extension block and supported
1450N/A * audio format, assume at least 'basic audio' support, even if 'basic
1450N/A * audio' is not defined in EDID.
1450N/A *
1450N/A */
1450N/Abool drm_detect_monitor_audio(struct edid *edid)
1450N/A{
1450N/A u8 *edid_ext;
1450N/A int i, j;
1450N/A bool has_audio = false;
1450N/A int start_offset, end_offset;
1450N/A
1450N/A edid_ext = drm_find_cea_extension(edid);
1450N/A if (!edid_ext)
1450N/A goto end;
1450N/A
1450N/A has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1450N/A
1450N/A if (has_audio) {
1450N/A DRM_DEBUG_KMS("Monitor has basic audio support\n");
1450N/A goto end;
1450N/A }
1450N/A
1450N/A if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
1450N/A goto end;
1450N/A
1450N/A for_each_cea_db(edid_ext, i, start_offset, end_offset) {
1450N/A if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
1450N/A has_audio = true;
1450N/A for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
1450N/A DRM_DEBUG_KMS("CEA audio format %d\n",
1450N/A (edid_ext[i + j] >> 3) & 0xf);
1450N/A goto end;
1450N/A }
1450N/A }
1450N/Aend:
1450N/A return has_audio;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
1450N/A *
1450N/A * Check whether the monitor reports the RGB quantization range selection
1450N/A * as supported. The AVI infoframe can then be used to inform the monitor
1450N/A * which quantization range (full or limited) is used.
1450N/A */
1450N/Abool drm_rgb_quant_range_selectable(struct edid *edid)
1450N/A{
1450N/A u8 *edid_ext;
1450N/A int i, start, end;
1450N/A
1450N/A edid_ext = drm_find_cea_extension(edid);
1450N/A if (!edid_ext)
1450N/A return false;
1450N/A
1450N/A if (cea_db_offsets(edid_ext, &start, &end))
1450N/A return false;
1450N/A
1450N/A for_each_cea_db(edid_ext, i, start, end) {
1450N/A if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
1450N/A cea_db_payload_len(&edid_ext[i]) == 2) {
1450N/A DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
1450N/A return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
1450N/A }
1450N/A }
1450N/A
1450N/A return false;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_add_display_info - pull display info out if present
1450N/A * @edid: EDID data
1450N/A * @info: display info (attached to connector)
1450N/A *
1450N/A * Grab any available display info and stuff it into the drm_display_info
1450N/A * structure that's part of the connector. Useful for tracking bpp and
1450N/A * color spaces.
1450N/A */
1450N/Astatic void drm_add_display_info(struct edid *edid,
1450N/A struct drm_display_info *info)
1450N/A{
1450N/A u8 *edid_ext;
1450N/A
1450N/A info->width_mm = edid->width_cm * 10;
1450N/A info->height_mm = edid->height_cm * 10;
1450N/A
1450N/A /* driver figures it out in this case */
1450N/A info->bpc = 0;
1450N/A info->color_formats = 0;
1450N/A
1450N/A if (edid->revision < 3)
1450N/A return;
1450N/A
1450N/A if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1450N/A return;
1450N/A
1450N/A /* Get data from CEA blocks if present */
1450N/A edid_ext = drm_find_cea_extension(edid);
1450N/A if (edid_ext) {
1450N/A info->cea_rev = edid_ext[1];
1450N/A
1450N/A /* The existence of a CEA block should imply RGB support */
1450N/A info->color_formats = DRM_COLOR_FORMAT_RGB444;
1450N/A if (edid_ext[3] & EDID_CEA_YCRCB444)
1450N/A info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1450N/A if (edid_ext[3] & EDID_CEA_YCRCB422)
1450N/A info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1450N/A }
1450N/A
1450N/A /* Only defined for 1.4 with digital displays */
1450N/A if (edid->revision < 4)
1450N/A return;
1450N/A
1450N/A switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1450N/A case DRM_EDID_DIGITAL_DEPTH_6:
1450N/A info->bpc = 6;
1450N/A break;
1450N/A case DRM_EDID_DIGITAL_DEPTH_8:
1450N/A info->bpc = 8;
1450N/A break;
1450N/A case DRM_EDID_DIGITAL_DEPTH_10:
1450N/A info->bpc = 10;
1450N/A break;
1450N/A case DRM_EDID_DIGITAL_DEPTH_12:
1450N/A info->bpc = 12;
1450N/A break;
1450N/A case DRM_EDID_DIGITAL_DEPTH_14:
1450N/A info->bpc = 14;
1450N/A break;
1450N/A case DRM_EDID_DIGITAL_DEPTH_16:
1450N/A info->bpc = 16;
1450N/A break;
1450N/A case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1450N/A default:
1450N/A info->bpc = 0;
1450N/A break;
1450N/A }
1450N/A
1450N/A info->color_formats |= DRM_COLOR_FORMAT_RGB444;
1450N/A if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
1450N/A info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1450N/A if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
1450N/A info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_add_edid_modes - add modes from EDID data, if available
1450N/A * @connector: connector we're probing
1450N/A * @edid: edid data
1450N/A *
1450N/A * Add the specified modes to the connector's mode list.
1450N/A *
1450N/A * Return number of modes added or 0 if we couldn't find any.
1450N/A */
1450N/Aint drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1450N/A{
1450N/A int num_modes = 0;
1450N/A u32 quirks;
1450N/A
1450N/A if (edid == NULL) {
1450N/A return 0;
1450N/A }
1450N/A if (!drm_edid_is_valid(edid)) {
1450N/A DRM_ERROR("%s: EDID invalid.\n",
1450N/A drm_get_connector_name(connector));
1450N/A return 0;
1450N/A }
1450N/A
1450N/A quirks = edid_get_quirks(edid);
1450N/A
1450N/A /*
1450N/A * EDID spec says modes should be preferred in this order:
1450N/A * - preferred detailed mode
1450N/A * - other detailed modes from base block
1450N/A * - detailed modes from extension blocks
1450N/A * - CVT 3-byte code modes
1450N/A * - standard timing codes
1450N/A * - established timing codes
1450N/A * - modes inferred from GTF or CVT range information
1450N/A *
1450N/A * We get this pretty much right.
1450N/A *
1450N/A * XXX order for additional mode types in extension blocks?
1450N/A */
1450N/A num_modes += add_detailed_modes(connector, edid, quirks);
1450N/A num_modes += add_cvt_modes(connector, edid);
1450N/A num_modes += add_standard_modes(connector, edid);
1450N/A num_modes += add_established_modes(connector, edid);
1450N/A if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
1450N/A num_modes += add_inferred_modes(connector, edid);
1450N/A num_modes += add_cea_modes(connector, edid);
1450N/A num_modes += add_alternate_cea_modes(connector, edid);
1450N/A
1450N/A if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1450N/A edid_fixup_preferred(connector, quirks);
1450N/A
1450N/A drm_add_display_info(edid, &connector->display_info);
1450N/A
1450N/A return num_modes;
1450N/A}
1450N/A
1450N/A/**
1450N/A * drm_add_modes_noedid - add modes for the connectors without EDID
1450N/A * @connector: connector we're probing
1450N/A * @hdisplay: the horizontal display limit
1450N/A * @vdisplay: the vertical display limit
1450N/A *
1450N/A * Add the specified modes to the connector's mode list. Only when the
1450N/A * hdisplay/vdisplay is not beyond the given limit, it will be added.
1450N/A *
1450N/A * Return number of modes added or 0 if we couldn't find any.
1450N/A */
1450N/Aint drm_add_modes_noedid(struct drm_connector *connector,
1450N/A int hdisplay, int vdisplay)
1450N/A{
1450N/A int i, count, num_modes = 0;
1450N/A struct drm_display_mode *mode;
1450N/A struct drm_device *dev = connector->dev;
1450N/A
1450N/A count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1450N/A if (hdisplay < 0)
1450N/A hdisplay = 0;
1450N/A if (vdisplay < 0)
1450N/A vdisplay = 0;
1450N/A
1450N/A for (i = 0; i < count; i++) {
1450N/A const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1450N/A if (hdisplay && vdisplay) {
1450N/A /*
1450N/A * Only when two are valid, they will be used to check
1450N/A * whether the mode should be added to the mode list of
1450N/A * the connector.
1450N/A */
1450N/A if (ptr->hdisplay > hdisplay ||
1450N/A ptr->vdisplay > vdisplay)
1450N/A continue;
1450N/A }
1450N/A if (drm_mode_vrefresh(ptr) > 61)
1450N/A continue;
1450N/A mode = drm_mode_duplicate(dev, ptr);
1450N/A if (mode) {
1450N/A drm_mode_probed_add(connector, mode);
1450N/A num_modes++;
1450N/A }
1450N/A }
1450N/A return num_modes;
1450N/A}
1450N/A