1445N/A--- a/src/ast.h Wed Nov 12 11:57:06 2014

1445N/A+++ b/src/ast.h Wed Nov 12 11:59:37 2014

1445N/A@@ -33,7 +33,12 @@

705N/A

705N/A #include <string.h>

705N/A #include <stdlib.h>

705N/A+#include <sys/visual_io.h>

1351N/A

705N/A+#ifdef __sparc

705N/A+#define __sparc__ 1

705N/A+#endif

705N/A+

1351N/A #ifdef HAVE_XAA_H

1351N/A #include "xaa.h"

1351N/A #endif

1445N/A@@ -305,10 +310,89 @@

1445N/A CreateScreenResourcesProcPtr CreateScreenResources;

1265N/A #endif

1265N/A

705N/A+#if defined(__sparc__)

1351N/A+ char *deviceName;

1351N/A+ int fd;

1351N/A+#endif

705N/A+

1265N/A } ASTRec, *ASTRecPtr, *ASTPtr;

1265N/A

705N/A #define ASTPTR(p) ((ASTRecPtr)((p)->driverPrivate))

705N/A

705N/A+#if defined(__sparc__)

705N/A+#ifndef VIS_GETPCICONFIG

705N/A+

705N/A+/*

705N/A+ * These definitions will be removed when they are included in the

705N/A+ * visual_io.h

705N/A+ */

705N/A+#define VIS_GETVIDEOMODENAME (VIOC | 12)

705N/A+#define VIS_STOREVIDEOMODENAME (VIOC | 13)

705N/A+#define VIS_MAX_VMODE_LEN 48

705N/A+

705N/A+typedef struct vis_video_mode {

705N/A+ char mode_name[VIS_MAX_VMODE_LEN];

705N/A+ uint32_t vRefresh;

705N/A+ char pad[96];

705N/A+} vis_video_mode_t;

705N/A+

705N/A+

1351N/A+#define VIS_GETPCICONFIG (VIOC | 14)

705N/A+

705N/A+typedef struct vis_pci_cfg {

1445N/A+ uint16_t VendorID;

705N/A+ uint16_t DeviceID;

705N/A+ uint16_t Command;

705N/A+ uint16_t Status;

705N/A+ uint8_t RevisionID;

705N/A+ uint8_t ProgIF;

705N/A+ uint8_t SubClass;

1445N/A+ uint8_t BaseClass;

705N/A+

705N/A+ uint8_t CacheLineSize;

705N/A+ uint8_t LatencyTimer;

705N/A+ uint8_t HeaderType;

705N/A+ uint8_t BIST;

705N/A+

1445N/A+ uint32_t bar[6];

705N/A+ uint32_t CIS;

705N/A+ uint16_t SubVendorID;

705N/A+ uint16_t SubSystemID;

705N/A+ uint32_t ROMBaseAddress;

705N/A+

705N/A+ uint8_t CapabilitiesPtr;

705N/A+ uint8_t Reserved_1[3];

705N/A+ uint32_t Reserved_2;

705N/A+

1445N/A+ uint8_t InterruptLine;

705N/A+ uint8_t InterruptPin;

705N/A+ uint8_t MinimumGrant;

705N/A+ uint8_t MaximumLatency;

705N/A+

1351N/A+ uint8_t pad[100];

705N/A+} vis_pci_cfg_t;

705N/A+

705N/A+

705N/A+#define VIS_SETIOREG (VIOC | 17)

705N/A+#define VIS_GETIOREG (VIOC | 18)

705N/A+

705N/A+typedef struct vis_io_reg {

705N/A+ uchar_t offset;

705N/A+ uchar_t value;

705N/A+} vis_io_reg_t;

705N/A+#endif

1445N/A+

705N/A+extern struct pci_device *ASTGetPciInfo(ASTRecPtr);

705N/A+extern ScrnInfoPtr ASTAllocScreen(DriverPtr, GDevPtr);

1351N/A+extern pointer ASTMapVidMem(ScrnInfoPtr, unsigned int, PCITAG,

1351N/A+ unsigned long, unsigned long);

1351N/A+extern void ASTUnmapVidMem(ScrnInfoPtr, pointer, unsigned long);

1351N/A+extern void ASTNotifyModeChanged(ScrnInfoPtr);

1351N/A+extern void ASTSaveHW(ScrnInfoPtr);

1351N/A+extern void ASTRestoreHW(ScrnInfoPtr);

705N/A+

705N/A+#endif

705N/A+

1445N/A /* ast_vgatool.c */

1445N/A extern Bool bASTIsVGAEnabled(ScrnInfoPtr pScrn);

1445N/A extern Bool ASTGetVGA2EDID(ScrnInfoPtr pScrn, unsigned char *pEDIDBuffer);

1445N/A--- a/src/ast_tool.c Wed Nov 12 11:59:48 2014

1445N/A+++ b/src/ast_tool.c Wed Nov 12 12:03:43 2014

1445N/A@@ -50,16 +50,27 @@

1445N/A /* Driver specific headers */

1445N/A #include "ast.h"

691N/A

691N/A+#if defined(__sparc__)

691N/A+extern pointer ASTMapVidMem(ScrnInfoPtr, unsigned int, PCITAG,

691N/A+ unsigned long, unsigned long);

691N/A+extern void ASTUnmapVidMem(ScrnInfoPtr, pointer, unsigned long);

691N/A+#endif /* __sparc__ */

691N/A+

691N/A Bool

691N/A ASTMapMem(ScrnInfoPtr pScrn)

691N/A {

691N/A ASTRecPtr pAST = ASTPTR(pScrn);

691N/A

691N/A-#ifndef XSERVER_LIBPCIACCESS

691N/A+#if !defined(XSERVER_LIBPCIACCESS) || defined(__sparc__)

691N/A+#if !defined(__sparc__)

691N/A pAST->FBVirtualAddr = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,

691N/A pAST->PciTag,

691N/A pAST->FBPhysAddr, pAST->FbMapSize);

691N/A #else

691N/A+ pAST->FBVirtualAddr = ASTMapVidMem(pScrn, VIDMEM_FRAMEBUFFER, NULL,

691N/A+ pAST->FBPhysAddr, pAST->FbMapSize);

691N/A+#endif /* sparc */

691N/A+#else

691N/A {

691N/A void** result = (void**)&pAST->FBVirtualAddr;

691N/A int err = pci_device_map_range(pAST->PciInfo,

1445N/A@@ -85,10 +96,14 @@

691N/A {

691N/A ASTRecPtr pAST = ASTPTR(pScrn);

691N/A

1445N/A-#ifndef XSERVER_LIBPCIACCESS

1351N/A+#if !defined(XSERVER_LIBPCIACCESS) || defined(__sparc__)

691N/A+#if !defined(__sparc__)

691N/A xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pAST->FBVirtualAddr,

691N/A pAST->FbMapSize);

691N/A #else

1265N/A+ ASTUnmapVidMem(pScrn, (pointer)pAST->FBVirtualAddr, pAST->FbMapSize);

691N/A+#endif

691N/A+#else

691N/A pci_device_unmap_range(pAST->PciInfo, pAST->FBVirtualAddr, pAST->FbMapSize);

691N/A #endif

1445N/A

1445N/A@@ -101,7 +116,7 @@

691N/A ASTMapMMIO(ScrnInfoPtr pScrn)

691N/A {

691N/A ASTRecPtr pAST = ASTPTR(pScrn);

691N/A-#ifndef XSERVER_LIBPCIACCESS

691N/A+#if !defined(XSERVER_LIBPCIACCESS) || defined(__sparc__)

691N/A int mmioFlags;

691N/A

691N/A #if !defined(__alpha__)

1445N/A@@ -110,12 +125,17 @@

1351N/A mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT | VIDMEM_SPARSE;

691N/A #endif

691N/A

1351N/A-

691N/A+#if !defined(__sparc__)

691N/A pAST->MMIOVirtualAddr = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,

691N/A pAST->PciTag,

691N/A pAST->MMIOPhysAddr, pAST->MMIOMapSize);

1445N/A

1351N/A #else

691N/A+ pAST->MMIOVirtualAddr = ASTMapVidMem(pScrn,

691N/A+ VIDMEM_MMIO | VIDMEM_READSIDEEFFECT, NULL,

691N/A+ pAST->MMIOPhysAddr, pAST->MMIOMapSize);

691N/A+#endif

1351N/A+#else

691N/A {

1351N/A void** result = (void**)&pAST->MMIOVirtualAddr;

1351N/A int err = pci_device_map_range(pAST->PciInfo,

1445N/A@@ -140,10 +160,14 @@

691N/A {

691N/A ASTRecPtr pAST = ASTPTR(pScrn);

691N/A

691N/A-#ifndef XSERVER_LIBPCIACCESS

691N/A+#if !defined(XSERVER_LIBPCIACCESS) || defined(__sparc__)

691N/A+#if !defined(__sparc__)

691N/A xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pAST->MMIOVirtualAddr,

691N/A pAST->MMIOMapSize);

691N/A #else

691N/A+ ASTUnmapVidMem(pScrn, (pointer)pAST->MMIOVirtualAddr, pAST->MMIOMapSize);

691N/A+#endif

691N/A+#else

691N/A pci_device_unmap_range(pAST->PciInfo, pAST->MMIOVirtualAddr, pAST->MMIOMapSize);

691N/A #endif

691N/A pAST->MMIOVirtualAddr = 0;

1445N/A--- a/src/ast_vgatool.h Wed Nov 12 12:03:58 2014

1445N/A+++ b/src/ast_vgatool.h Wed Nov 12 12:06:04 2014

1445N/A@@ -20,6 +20,12 @@

691N/A * PERFORMANCE OF THIS SOFTWARE.

691N/A */

1445N/A

691N/A+#ifndef ASTVGATOOL_H

691N/A+#define ASTVGATOOL_H

1445N/A+

691N/A+#include <unistd.h>

691N/A+#include <stropts.h>

691N/A+

691N/A /* VRAM Size Definition */

691N/A #define VIDEOMEM_SIZE_08M 0x00800000

691N/A #define VIDEOMEM_SIZE_16M 0x01000000

1351N/A@@ -40,6 +46,96 @@

1265N/A #define DRAMTYPE_2Gx16 6

1265N/A #define DRAMTYPE_4Gx16 7

691N/A

691N/A+#if defined(__sparc__)

691N/A+

1351N/A+#define SET_IO_REG 0x1000

1351N/A+#define GET_IO_REG 0x1001

691N/A+

1351N/A+#define AR_PORT_WRITE 0x40

1351N/A+#define MISC_PORT_WRITE 0x42

1351N/A+#define VGA_ENABLE_PORT 0x43

1351N/A+#define SEQ_PORT 0x44

1351N/A+#define DAC_INDEX_READ 0x47

1351N/A+#define DAC_INDEX_WRITE 0x48

1351N/A+#define DAC_DATA 0x49

1351N/A+#define GR_PORT 0x4E

1351N/A+#define CRTC_PORT 0x54

1351N/A+#define INPUT_STATUS1_READ 0x5A

1351N/A+#define MISC_PORT_READ 0x4C

691N/A+

1351N/A+static inline uchar_t

1265N/A+_GetRegFromFd(uchar_t off, int fd)

1265N/A+{

1351N/A+ struct vis_io_reg io_reg = {

1351N/A+ .offset = off

1351N/A+ };

1351N/A+ ioctl(fd, VIS_GETIOREG, &io_reg);

1351N/A+ return io_reg.value;

1265N/A+}

1265N/A+

1351N/A+#define GetReg(off) _GetRegFromFd(off, pAST->fd)

691N/A+

1351N/A+#define SetReg(off, val) do { \

1351N/A+ struct vis_io_reg io_reg = { \

1351N/A+ .offset = off, \

1351N/A+ .value = val \

1351N/A+ }; \

1351N/A+ ioctl(pAST->fd, VIS_SETIOREG, &io_reg); \

1351N/A+ } while (0)

691N/A+

1351N/A+#define GetIndexReg(off, index, val) do { \

1351N/A+ struct vis_io_reg io_reg = { \

1351N/A+ .offset = off, \

1351N/A+ .value = index \

1351N/A+ }; \

1351N/A+ ioctl(pAST->fd, VIS_SETIOREG, &io_reg); \

1351N/A+ io_reg.offset = off+1; \

1351N/A+ ioctl(pAST->fd, VIS_GETIOREG, &io_reg); \

1351N/A+ val = io_reg.value; \

1351N/A+ } while (0)

691N/A+

1351N/A+#define SetIndexReg(off, index, val) do { \

1351N/A+ struct vis_io_reg io_reg = { \

1351N/A+ .offset = off, \

1351N/A+ .value = index \

1351N/A+ }; \

1351N/A+ ioctl(pAST->fd, VIS_SETIOREG, &io_reg); \

1351N/A+ io_reg.offset = off+1; \

1351N/A+ io_reg.value = val; \

1351N/A+ ioctl(pAST->fd, VIS_SETIOREG, &io_reg); \

1351N/A+ } while (0)

691N/A+

1351N/A+#define GetIndexRegMask(off, index, and, val) do { \

1351N/A+ struct vis_io_reg io_reg = { \

1351N/A+ .offset = off, \

1351N/A+ .value = index \

1351N/A+ }; \

1351N/A+ ioctl(pAST->fd, VIS_SETIOREG, &io_reg); \

1351N/A+ io_reg.offset = off+1; \

1351N/A+ ioctl(pAST->fd, VIS_GETIOREG, &io_reg); \

1351N/A+ val = io_reg.value & and; \

1351N/A+ } while (0)

691N/A+

1351N/A+#define SetIndexRegMask(off, index, and, val) do { \

1351N/A+ UCHAR __Temp; \

1351N/A+ struct vis_io_reg io_reg = { \

1351N/A+ .offset = off, \

1351N/A+ .value = index \

1351N/A+ }; \

1351N/A+ ioctl(pAST->fd, VIS_SETIOREG, &io_reg); \

1351N/A+ io_reg.offset = off + 1; \

1351N/A+ ioctl(pAST->fd, VIS_GETIOREG, &io_reg); \

1351N/A+ __Temp = (io_reg.value & and) | val; \

1351N/A+ io_reg.offset = off; \

1351N/A+ io_reg.value = index; \

1351N/A+ ioctl(pAST->fd, VIS_SETIOREG, &io_reg); \

1351N/A+ io_reg.offset = off+1; \

1351N/A+ io_reg.value = __Temp; \

1351N/A+ ioctl(pAST->fd, VIS_SETIOREG, &io_reg); \

1351N/A+ } while (0)

691N/A+

1265N/A+#else /* !__sparc__ */

691N/A+

1351N/A #define AR_PORT_WRITE (pAST->MMIOVirtualAddr + 0x3c0)

1351N/A #define MISC_PORT_WRITE (pAST->MMIOVirtualAddr + 0x3c2)

1351N/A #define VGA_ENABLE_PORT (pAST->MMIOVirtualAddr + 0x3c3)

1351N/A@@ -72,6 +168,7 @@

1351N/A __Temp = (MMIO_IN8(base, 1)&(and))|(val); \

1351N/A SetIndexReg(base,index,__Temp); \

1351N/A }

1351N/A+#endif

691N/A

1265N/A #define VGA_GET_PALETTE_INDEX(index, red, green, blue) \

691N/A { \

1445N/A@@ -170,3 +267,5 @@

1445N/A /* Delay */

1445N/A #define DelayUS(x) usleep(x)

1445N/A #define DelayMS(x) DelayUS(1000*x)

691N/A+

691N/A+#endif /* ASTVGATOOL_H */

1445N/A--- a/src/ast_vgatool.c Wed Nov 12 12:06:20 2014

1445N/A+++ b/src/ast_vgatool.c Wed Nov 12 12:08:08 2014

1445N/A@@ -864,6 +864,7 @@

1445N/A void

1445N/A ASTDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)

1445N/A {

1445N/A+#if !defined(__sparc__)

1445N/A ASTRecPtr pAST;

1445N/A UCHAR SEQ01, CRB6;

1445N/A ULONG ulData, ulTemp;

1445N/A@@ -923,6 +924,7 @@

1445N/A { /* 3rd Tx */

1445N/A if (pAST->jTxChipType == Tx_DP501) SetDP501VideoOutput(pScrn, 1);

1445N/A }

1445N/A+#endif

1445N/A }

1445N/A

1445N/A

1445N/A@@ -1395,7 +1397,7 @@

1445N/A { 0x0030, 0x00000040 },

1445N/A { 0x0028, 0x00000003 },

1445N/A { 0x000C, 0x00005a21 },

1445N/A- { 0x0034, 0x00007c03 },

1445N/A+ { 0x0034, 0x00007c43 },

1445N/A { 0x0120, 0x00004c41 },

1445N/A { 0xffff, 0xffffffff },

1445N/A };

1445N/A@@ -1448,7 +1450,7 @@

1445N/A { 0x0030, 0x00000040 },

1445N/A { 0x0028, 0x00000003 },

1445N/A { 0x000C, 0x00005a21 },

1445N/A- { 0x0034, 0x00007c03 },

1445N/A+ { 0x0034, 0x00007c43 },

1445N/A { 0x0120, 0x00005061 },

1445N/A { 0xffff, 0xffffffff },

1445N/A };

1445N/A@@ -3061,9 +3063,11 @@

1445N/A

1445N/A {

1445N/A /* Enable PCI */

1445N/A+#if !defined(__sparc__)

1445N/A PCI_READ_LONG(pAST->PciInfo, &ulData, 0x04);

1445N/A ulData |= 0x03;

1445N/A PCI_WRITE_LONG(pAST->PciInfo, ulData, 0x04);

1445N/A+#endif

1445N/A

1445N/A /* Enable VGA */

1445N/A vEnableVGA(pScrn);

1445N/A@@ -3357,9 +3361,11 @@

1445N/A pAST = ASTPTR(pScrn);

1265N/A

1265N/A /* Enable PCI */

1265N/A+#if !defined(__sparc__)

1265N/A PCI_READ_LONG(pAST->PciInfo, &ulData, 0x04);

1265N/A ulData |= 0x03;

1445N/A PCI_WRITE_LONG(pAST->PciInfo, ulData, 0x04);

1265N/A+#endif

1445N/A

1265N/A /* init DRAM if no F/W */

1265N/A /* TODO */

1445N/A@@ -3451,9 +3457,11 @@

1445N/A if (jReg != 0x01)

1351N/A {

1351N/A /* Enable PCI */

1351N/A+#if !defined(__sparc__)

1351N/A PCI_READ_LONG(pAST->PciInfo, &ulData, 0x04);

1351N/A ulData |= 0x03;

1351N/A PCI_WRITE_LONG(pAST->PciInfo, ulData, 0x04);

1351N/A+#endif

1351N/A

1351N/A outb(pAST->RelocateIO + 0x43, 0x01);

1445N/A outb(pAST->RelocateIO + 0x42, 0x01);

1445N/A--- a/src/ast_driver.c Wed Nov 12 12:08:21 2014

1445N/A+++ b/src/ast_driver.c Wed Nov 12 12:30:17 2014

1445N/A@@ -74,7 +74,7 @@

1445N/A static ModeStatus ASTValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode, Bool verbose, int flags);

1445N/A

1445N/A /* Internally used functions */

1445N/A-static Bool ASTGetRec(ScrnInfoPtr pScrn);

1445N/A+extern Bool ASTGetRec(ScrnInfoPtr pScrn);

1445N/A static void ASTFreeRec(ScrnInfoPtr pScrn);

1445N/A static Bool ASTSaveScreen(ScreenPtr pScreen, Bool unblack);

1445N/A static Bool ASTCloseScreen(CLOSE_SCREEN_ARGS_DECL);

1445N/A@@ -244,7 +244,7 @@

1445N/A return FALSE;

1445N/A }

1445N/A

1445N/A-#ifndef XSERVER_LIBPCIACCESS

1445N/A+#if !defined(XSERVER_LIBPCIACCESS) && !defined(__sparc__)

1445N/A /*

1445N/A * This probing is just checking the PCI data the server already

1445N/A * collected.

1445N/A@@ -254,6 +254,8 @@

1445N/A }

1445N/A #endif

1445N/A

1445N/A+#if !defined(__sparc__)

1445N/A+

1445N/A numUsed = xf86MatchPciInstances(AST_NAME, PCI_VENDOR_AST,

1445N/A ASTChipsets, ASTPciChipsets,

1445N/A devSections, numDevSections,

1445N/A@@ -322,7 +324,37 @@

1445N/A

1445N/A free(devSections);

1445N/A free(usedChips);

1445N/A+#else

1445N/A+ if (flags & PROBE_DETECT) {

1445N/A+ foundScreen = TRUE;

1445N/A+ } else {

1445N/A+ for (i = 0; i < numDevSections; i++) {

1445N/A

1445N/A+ ScrnInfoPtr pScrn = NULL;

1445N/A+

1445N/A+ /* Allocate new ScrnInfoRec and claim the slot */

1445N/A+ if (pScrn = ASTAllocScreen(drv, devSections[i])) {

1445N/A+ pScrn->driverVersion = AST_VERSION;

1445N/A+ pScrn->driverName = AST_DRIVER_NAME;

1445N/A+ pScrn->name = AST_NAME;

1445N/A+

1445N/A+ pScrn->Probe = ASTProbe;

1445N/A+ pScrn->PreInit = ASTPreInit;

1445N/A+ pScrn->ScreenInit = ASTScreenInit;

1445N/A+ pScrn->SwitchMode = ASTSwitchMode;

1445N/A+ pScrn->AdjustFrame = ASTAdjustFrame;

1445N/A+ pScrn->EnterVT = ASTEnterVT;

1445N/A+ pScrn->LeaveVT = ASTLeaveVT;

1445N/A+ pScrn->FreeScreen = ASTFreeScreen;

1445N/A+ pScrn->ValidMode = ASTValidMode;

1445N/A+

1445N/A+ foundScreen = TRUE;

1445N/A+ }

1445N/A+ }

1445N/A+ }

1445N/A+ free(devSections);

1445N/A+#endif

1445N/A+

1445N/A return foundScreen;

1445N/A }

1445N/A

1445N/A@@ -393,6 +425,10 @@

1445N/A

1445N/A pEnt = xf86GetEntityInfo(pScrn->entityList[0]);

1445N/A

1445N/A+#if defined(__sparc__)

1445N/A+ pEnt->location.type = BUS_PCI;

1445N/A+#endif

1445N/A+

1445N/A if (flags & PROBE_DETECT) {

1445N/A ASTProbeDDC(pScrn, pEnt->index);

1445N/A return TRUE;

1445N/A@@ -495,7 +531,11 @@

1445N/A /* Fill AST Info */

1445N/A pAST = ASTPTR(pScrn);

1445N/A pAST->pEnt = xf86GetEntityInfo(pScrn->entityList[0]);

1445N/A+#if !defined(__sparc__)

1445N/A pAST->PciInfo = xf86GetPciInfoForEntity(pAST->pEnt->index);

1445N/A+#else

1445N/A+ pAST->PciInfo = ASTGetPciInfo(pAST);

1445N/A+#endif

1445N/A #ifndef XSERVER_LIBPCIACCESS

1445N/A pAST->PciTag = pciTag(pAST->PciInfo->bus, pAST->PciInfo->device,

1445N/A pAST->PciInfo->func);

1445N/A@@ -540,7 +580,7 @@

1445N/A xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n",

1445N/A (pScrn->chipset != NULL) ? pScrn->chipset : "Unknown ast");

1445N/A

1445N/A-

1445N/A+#if !(defined(__sparc__))

1445N/A #if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) < 12

1445N/A /* "Patch" the PIOOffset inside vgaHW in order to force

1445N/A * the vgaHW module to use our relocated i/o ports.

1445N/A@@ -547,15 +587,13 @@

1445N/A */

1445N/A VGAHWPTR(pScrn)->PIOOffset =

1445N/A pScrn->domainIOBase + PCI_REGION_BASE(pAST->PciInfo, 2, REGION_IO) - 0x380;

1445N/A-

1445N/A pAST->RelocateIO = pScrn->domainIOBase +

1445N/A PCI_REGION_BASE(pAST->PciInfo, 2, REGION_IO);

1445N/A #else

1445N/A+#endif

1445N/A pAST->RelocateIO = (PCI_REGION_BASE(pAST->PciInfo, 2, REGION_IO));

1445N/A-

1445N/A #endif

1445N/A

1445N/A-

1445N/A if (pAST->pEnt->device->MemBase != 0) {

1445N/A pAST->FBPhysAddr = pAST->pEnt->device->MemBase;

1445N/A from = X_CONFIG;

1445N/A@@ -620,8 +658,10 @@

1351N/A }

1445N/A else

1445N/A {

1445N/A+#if !(defined(__sparc__))

1445N/A /* Enable VGA MMIO Access */

1445N/A vASTEnableVGAMMIO(pScrn);

1351N/A+#endif

1445N/A

1351N/A /* Init VGA Adapter */

1351N/A if (!xf86IsPrimaryPci(pAST->PciInfo))

1445N/A@@ -866,6 +906,10 @@

1445N/A

1445N/A vFillASTModeInfo (pScrn);

1445N/A

1445N/A+#if (defined(__sparc__))

1445N/A+ ASTNotifyModeChanged(pScrn);

1445N/A+#endif

1445N/A+

1445N/A ASTSave(pScrn);

1445N/A if (!ASTModeInit(pScrn, pScrn->currentMode)) {

1445N/A xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Mode Init Failed \n");

1445N/A@@ -1243,7 +1287,7 @@

1445N/A * These two functions create and destroy that private data.

1445N/A *

1445N/A */

1445N/A-static Bool

1445N/A+Bool

1445N/A ASTGetRec(ScrnInfoPtr pScrn)

1445N/A {

1445N/A if (pScrn->driverPrivate)

1445N/A--- a/src/Makefile.am Wed Nov 12 12:30:37 2014

1445N/A+++ b/src/Makefile.am Wed Nov 12 12:31:00 2014

1445N/A@@ -44,4 +44,5 @@

1445N/A ast_vgatool.c \

1445N/A ast_vgatool.h \

1445N/A ast_dp501fw.h \

1445N/A+ ast_sparc_driver.c \

1445N/A compat-api.h

1445N/A--- a/src/ast_cursor.c Wed Nov 12 12:31:12 2014

1445N/A+++ b/src/ast_cursor.c Wed Nov 12 12:31:38 2014

1445N/A@@ -82,7 +82,11 @@

1445N/A

1445N/A infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |

1445N/A HARDWARE_CURSOR_INVERT_MASK |

1445N/A+#if !defined(__sparc__)

1445N/A HARDWARE_CURSOR_BIT_ORDER_MSBFIRST;

1445N/A+#else

1445N/A+ 0;

1445N/A+#endif

1445N/A

1445N/A infoPtr->MaxWidth = MAX_HWC_WIDTH;

1445N/A infoPtr->MaxHeight = MAX_HWC_HEIGHT;