1116N/Adiff --git a/src/AtomBios/Decoder.c b/src/AtomBios/Decoder.c
1116N/Aindex cdaa9ef..c6e3c9f 100644
1116N/A--- a/src/AtomBios/Decoder.c
1116N/A+++ b/src/AtomBios/Decoder.c
1116N/A@@ -210,7 +210,7 @@ CD_STATUS ParseTable(DEVICE_DATA STACK_BASED* pDeviceData, UINT8 IndexInMasterTa
1116N/A {
1116N/A IndexInMasterTable=ProcessCommandProperties((PARSER_TEMP_DATA STACK_BASED *)&ParserTempData);
1116N/A (*CallTable[IndexInMasterTable].function)((PARSER_TEMP_DATA STACK_BASED *)&ParserTempData);
1116N/A-#if (PARSER_TYPE!=DRIVER_TYPE_PARSER)
1116N/A+#if (!defined(__sparc__) && (PARSER_TYPE!=DRIVER_TYPE_PARSER))
1116N/A BIOS_STACK_MODIFIER();
1116N/A #endif
1116N/A }
1116N/Adiff --git a/src/AtomBios/hwserv_drv.c b/src/AtomBios/hwserv_drv.c
1116N/Aindex a5f5a5b..2a454a4 100644
1116N/A--- a/src/AtomBios/hwserv_drv.c
1116N/A+++ b/src/AtomBios/hwserv_drv.c
1116N/A@@ -105,6 +105,10 @@ UINT8 ReadPCIReg8(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A CailReadPCIConfigData(pWorkingTableData->pDeviceData->CAIL,&rvl,pWorkingTableData->Index,sizeof(UINT8));
1116N/A return rvl;
1116N/A }
1116N/A+#else
1116N/A+UINT8 ReadPCIReg8(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -117,6 +121,10 @@ UINT16 ReadPCIReg16(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A return rvl;
1116N/A
1116N/A }
1116N/A+#else
1116N/A+UINT16 ReadPCIReg16(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -129,6 +137,10 @@ UINT32 ReadPCIReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A CailReadPCIConfigData(pWorkingTableData->pDeviceData->CAIL,&rvl,pWorkingTableData->Index,sizeof(UINT32));
1116N/A return rvl;
1116N/A }
1116N/A+#else
1116N/A+UINT32 ReadPCIReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -142,6 +154,10 @@ VOID WritePCIReg8 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A
1116N/A }
1116N/A
1116N/A+#else
1116N/A+VOID WritePCIReg8 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -152,6 +168,10 @@ VOID WritePCIReg16 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A CailWritePCIConfigData(pWorkingTableData->pDeviceData->CAIL,&(pWorkingTableData->DestData32),pWorkingTableData->Index,sizeof(UINT16));
1116N/A }
1116N/A
1116N/A+#else
1116N/A+VOID WritePCIReg16 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -160,6 +180,10 @@ VOID WritePCIReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A {
1116N/A CailWritePCIConfigData(pWorkingTableData->pDeviceData->CAIL,&(pWorkingTableData->DestData32),pWorkingTableData->Index,sizeof(UINT32));
1116N/A }
1116N/A+#else
1116N/A+VOID WritePCIReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -174,6 +198,10 @@ UINT8 ReadSysIOReg8 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A //rvl= (UINT8) ReadGenericPciCfg(dev,reg,sizeof(UINT8));
1116N/A return rvl;
1116N/A }
1116N/A+#else
1116N/A+UINT8 ReadSysIOReg8 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -187,6 +215,10 @@ UINT16 ReadSysIOReg16(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A return rvl;
1116N/A
1116N/A }
1116N/A+#else
1116N/A+UINT16 ReadSysIOReg16(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -200,6 +232,10 @@ UINT32 ReadSysIOReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A //rvl= (UINT32) ReadGenericPciCfg(dev,reg,sizeof(UINT32));
1116N/A return rvl;
1116N/A }
1116N/A+#else
1116N/A+UINT32 ReadSysIOReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -212,6 +248,10 @@ VOID WriteSysIOReg8 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A //WriteGenericPciCfg(dev,reg,sizeof(UINT8),(UINT32)value);
1116N/A }
1116N/A
1116N/A+#else
1116N/A+VOID WriteSysIOReg8 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -222,6 +262,10 @@ VOID WriteSysIOReg16 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A //WriteGenericPciCfg(dev,reg,sizeof(UINT16),(UINT32)value);
1116N/A }
1116N/A
1116N/A+#else
1116N/A+VOID WriteSysIOReg16 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A
1116N/A@@ -230,6 +274,10 @@ VOID WriteSysIOReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A {
1116N/A //WriteGenericPciCfg(dev,reg,sizeof(UINT32),(UINT32)value);
1116N/A }
1116N/A+#else
1116N/A+VOID WriteSysIOReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A // ATI Registers Memory Mapped Access
1116N/A@@ -257,6 +305,24 @@ VOID WriteIndReg32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A CailWriteATIRegister(pWorkingTableData->pDeviceData->CAIL,*(UINT16*)(pWorkingTableData->IndirectIOTablePointer+1),pWorkingTableData->IndirectData );
1116N/A }
1116N/A
1116N/A+#else
1116N/A+UINT32 ReadReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A+
1116N/A+VOID WriteReg32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A+
1116N/A+
1116N/A+VOID ReadIndReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A+
1116N/A+VOID WriteIndReg32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A+
1116N/A #endif
1116N/A
1116N/A // ATI Registers IO Mapped Access
1116N/A@@ -271,8 +337,17 @@ VOID WriteRegIO(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A {
1116N/A // return CailWriteATIRegister(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index,pWorkingTableData->DestData32 );
1116N/A }
1116N/A+#else
1116N/A+UINT32 ReadRegIO (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+ return 0;
1116N/A+}
1116N/A+VOID WriteRegIO(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A #endif
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A // access to Frame buffer, dummy function, need more information to implement it
1116N/A UINT32 ReadFrameBuffer32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A {
1116N/A@@ -286,6 +361,15 @@ VOID WriteFrameBuffer32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A CailWriteFBData(pWorkingTableData->pDeviceData->CAIL,(pWorkingTableData->Index <<2), pWorkingTableData->DestData32);
1116N/A
1116N/A }
1116N/A+#else
1116N/A+UINT32 ReadFrameBuffer32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A+
1116N/A+VOID WriteFrameBuffer32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
1116N/A+{
1116N/A+}
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A
1116N/A VOID *AllocateMemory(DEVICE_DATA *pDeviceData , UINT16 MemSize)
1116N/Adiff --git a/src/AtomBios/includes/CD_Structs.h b/src/AtomBios/includes/CD_Structs.h
1116N/Aindex c43f81d..f61232a 100644
1116N/A--- a/src/AtomBios/includes/CD_Structs.h
1116N/A+++ b/src/AtomBios/includes/CD_Structs.h
1116N/A@@ -375,7 +375,7 @@ typedef UINT8 COMMAND_TYPE_OPCODE_ONLY;
1116N/A typedef UINT8 COMMAND_HEADER_POINTER;
1116N/A
1116N/A
1116N/A-#if (PARSER_TYPE==BIOS_TYPE_PARSER)
1116N/A+#if (!defined(__sparc__) && (PARSER_TYPE==BIOS_TYPE_PARSER))
1116N/A
1116N/A typedef struct _DEVICE_DATA {
1116N/A UINT32 STACK_BASED *pParameterSpace;
1116N/Adiff --git a/src/AtomBios/includes/CD_binding.h b/src/AtomBios/includes/CD_binding.h
1116N/Aindex 7b021d3..b74b5db 100644
1116N/A--- a/src/AtomBios/includes/CD_binding.h
1116N/A+++ b/src/AtomBios/includes/CD_binding.h
1116N/A@@ -36,7 +36,11 @@
1116N/A #define USE_SWITCH_COMMAND 1
1116N/A #define DRIVER_TYPE_PARSER 0x48
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A #define PARSER_TYPE DRIVER_TYPE_PARSER
1116N/A+#else
1116N/A+#define PARSER_TYPE 0
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A #define AllocateWorkSpace(x,y) AllocateMemory(pDeviceData,y)
1116N/A #define FreeWorkSpace(x,y) ReleaseMemory(x,y)
1116N/Adiff --git a/src/Makefile.am b/src/Makefile.am
1124N/Aindex 052bca6..2f147d0 100644
1116N/A--- a/src/Makefile.am
1116N/A+++ b/src/Makefile.am
1116N/A@@ -27,8 +27,6 @@
1116N/A # TODO: -nostdlib/-Bstatic/-lgcc platform magic, not installing the .a, etc.
1116N/A
1116N/A if DRI
1116N/A-ATIMISC_DRI_SRCS = atidri.c
1116N/A-R128_DRI_SRCS = r128_dri.c
1116N/A RADEON_DRI_SRCS = radeon_dri.c
1116N/A endif
1116N/A
1124N/A@@ -47,52 +45,17 @@ RADEON_ATOMBIOS_SOURCES = \
1124N/A AtomBios/includes/ObjectID.h \
1124N/A AtomBios/includes/regsdef.h
1116N/A
1116N/A-if ATIMISC_CPIO
1116N/A-ATIMISC_CPIO_SOURCES = ativga.c ativgaio.c atibank.c atiwonder.c atiwonderio.c
1116N/A-endif
1116N/A-
1116N/A-if ATIMISC_DGA
1116N/A-ATIMISC_DGA_SOURCES = atidga.c
1116N/A-endif
1116N/A-
1116N/A if USE_EXA
1116N/A-ATIMISC_EXA_SOURCES = atimach64exa.c
1116N/A RADEON_EXA_SOURCES = radeon_exa.c
1116N/A endif
1116N/A
1124N/A-AM_CFLAGS = @XORG_CFLAGS@ @DRI_CFLAGS@ -DDISABLE_EASF -DENABLE_ALL_SERVICE_FUNCTIONS -DATOM_BIOS -DATOM_BIOS_PARSER -DFGL_LINUX -DDRIVER_PARSER
1124N/A+AM_CFLAGS = @XORG_CFLAGS@ @DRI_CFLAGS@ -DDISABLE_EASF -DENABLE_ALL_SERVICE_FUNCTIONS -DATOM_BIOS -DATOM_BIOS_PARSER -DDRIVER_PARSER
1116N/A INCLUDES = -I$(srcdir)/AtomBios/includes
1116N/A
1116N/A-ati_drv_la_LTLIBRARIES = ati_drv.la
1116N/A-ati_drv_la_LDFLAGS = -module -avoid-version
1116N/A-ati_drv_ladir = @moduledir@/drivers
1116N/A-ati_drv_la_SOURCES = \
1116N/A- ati.c atimodule.c
1116N/A-
1116N/A-mach64_drv_la_LTLIBRARIES = mach64_drv.la
1116N/A-mach64_drv_la_LDFLAGS = -module -avoid-version
1116N/A-mach64_drv_ladir = @moduledir@/drivers
1116N/A-mach64_drv_la_SOURCES = \
1116N/A- atibus.c atichip.c atiprobe.c atividmem.c \
1116N/A- atiadjust.c atiaudio.c aticlock.c aticonfig.c aticonsole.c \
1116N/A- atidac.c atidecoder.c atidsp.c atii2c.c \
1116N/A- atilock.c atimach64.c atimach64accel.c atimach64cursor.c \
1116N/A- atimach64i2c.c atimach64io.c atimach64xv.c atimode.c atipreinit.c \
1116N/A- atiprint.c atirgb514.c atiscreen.c atituner.c atiutil.c ativalid.c \
1116N/A- atiload.c atimisc.c atimach64probe.c $(ATIMISC_CPIO_SOURCES) \
1116N/A- $(ATIMISC_DGA_SOURCES) $(ATIMISC_DRI_SRCS) $(ATIMISC_EXA_SOURCES)
1116N/A-
1116N/A-r128_drv_la_LTLIBRARIES = r128_drv.la
1116N/A-r128_drv_la_LDFLAGS = -module -avoid-version
1116N/A-r128_drv_ladir = @moduledir@/drivers
1116N/A-r128_drv_la_SOURCES = \
1116N/A- r128_accel.c r128_cursor.c r128_dga.c r128_driver.c \
1116N/A- r128_video.c r128_misc.c r128_probe.c $(R128_DRI_SRCS)
1116N/A-
1116N/A-radeon_drv_la_LTLIBRARIES = radeon_drv.la
1116N/A-radeon_drv_la_LDFLAGS = -module -avoid-version
1116N/A-radeon_drv_ladir = @moduledir@/drivers
1116N/A-radeon_drv_la_SOURCES = \
1116N/A+efb_drv_la_LTLIBRARIES = efb_drv.la
1116N/A+efb_drv_la_LDFLAGS = -module -avoid-version
1116N/A+efb_drv_ladir = @moduledir@/drivers
1116N/A+efb_drv_la_SOURCES = efb_driver.c \
1116N/A radeon_accel.c radeon_cursor.c radeon_dga.c \
1116N/A radeon_driver.c radeon_video.c radeon_bios.c radeon_mm_i2c.c \
1116N/A radeon_vip.c radeon_misc.c radeon_probe.c \
1124N/A@@ -101,27 +64,6 @@ radeon_drv_la_SOURCES = \
1124N/A $(RADEON_ATOMBIOS_SOURCES) radeon_atombios.c radeon_atomwrapper.c \
1116N/A $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) atombios_output.c atombios_crtc.c
1116N/A
1116N/A-theatre_detect_drv_la_LTLIBRARIES = theatre_detect_drv.la
1116N/A-theatre_detect_drv_la_LDFLAGS = -module -avoid-version
1116N/A-theatre_detect_drv_ladir = @moduledir@/multimedia
1116N/A-theatre_detect_drv_la_SOURCES = \
1116N/A- theatre_detect.c theatre_detect_module.c
1116N/A-
1116N/A-theatre_drv_la_LTLIBRARIES = theatre_drv.la
1116N/A-theatre_drv_la_LDFLAGS = -module -avoid-version
1116N/A-theatre_drv_ladir = @moduledir@/multimedia
1116N/A-
1116N/A-theatre_drv_la_SOURCES = \
1116N/A- theatre.c theatre_module.c
1116N/A-
1116N/A-theatre200_drv_la_LTLIBRARIES = theatre200_drv.la
1116N/A-theatre200_drv_la_LDFLAGS = -module -avoid-version
1116N/A-theatre200_drv_ladir = @moduledir@/multimedia
1116N/A-theatre200_drv_la_CFLAGS = \
1116N/A- $(AM_CFLAGS) -DMICROC_DIR=\"$(theatre200_drv_ladir)\"
1116N/A-theatre200_drv_la_SOURCES = \
1116N/A- theatre200.c theatre200_module.c
1116N/A-
1116N/A EXTRA_DIST = \
1116N/A atimach64render.c \
1124N/A radeon_render.c \
1116N/Adiff --git a/src/ati.c b/src/ati.c
1116N/Aindex b3f07ca..084b27f 100644
1116N/A--- a/src/ati.c
1116N/A+++ b/src/ati.c
1116N/A@@ -68,7 +68,12 @@
1116N/A /* names duplicated from version headers */
1116N/A #define MACH64_DRIVER_NAME "mach64"
1116N/A #define R128_DRIVER_NAME "r128"
1116N/A+
1116N/A+#if defined(__sparc__)
1116N/A+#define RADEON_DRIVER_NAME "efb"
1116N/A+#else
1116N/A #define RADEON_DRIVER_NAME "radeon"
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A enum
1116N/A {
1116N/Adiff --git a/src/aticonsole.c b/src/aticonsole.c
1116N/Aindex 8efe897..aa3905a 100644
1116N/A--- a/src/aticonsole.c
1116N/A+++ b/src/aticonsole.c
1116N/A@@ -514,6 +514,20 @@ ATIEnterGraphics
1116N/A ATIPtr pATI
1116N/A )
1116N/A {
1116N/A+ unsigned int PciReg;
1116N/A+ pciConfigPtr pPCI;
1116N/A+ pciVideoPtr pVideo, *xf86PciVideoInfo = xf86GetPciVideoInfo();
1116N/A+
1116N/A+ pVideo = xf86PciVideoInfo[pScreenInfo->scrnIndex];
1116N/A+ pPCI = pVideo->thisCard;
1116N/A+/*
1116N/A+* Possibly fix block I/O indicator in PCI configuration space.
1116N/A+*/
1116N/A+ PciReg = pciReadLong(pPCI->tag, PCI_REG_USERCONFIG);
1116N/A+ if (!(PciReg & 0x00000004U))
1116N/A+ pciWriteLong(pPCI->tag, PCI_REG_USERCONFIG, PciReg |
1116N/A+ 0x00000004U);
1116N/A+
1116N/A /* Map apertures */
1116N/A if (!ATIMapApertures(pScreenInfo->scrnIndex, pATI))
1116N/A return FALSE;
1116N/Adiff --git a/src/radeon.h b/src/radeon.h
1116N/Aindex 7d63f28..ddb779e 100644
1116N/A--- a/src/radeon.h
1116N/A+++ b/src/radeon.h
1116N/A@@ -167,7 +167,15 @@ typedef enum {
1116N/A OPTION_TVDAC_LOAD_DETECT,
1116N/A OPTION_FORCE_TVOUT,
1116N/A OPTION_TVSTD,
1116N/A- OPTION_IGNORE_LID_STATUS
1116N/A+ OPTION_IGNORE_LID_STATUS,
1116N/A+#if defined(__sparc__)
1116N/A+ OPTION_DUAL_DISPLAY,
1116N/A+ OPTION_DUAL_DISPLAY_VERTICAL,
1116N/A+ OPTION_STREAM_XOFFSET,
1116N/A+ OPTION_STREAM_YOFFSET,
1116N/A+ OPTION_OUTPUTS,
1116N/A+ OPTION_DISABLE_RANDR,
1116N/A+#endif
1116N/A } RADEONOpts;
1116N/A
1116N/A
1116N/A@@ -734,6 +742,12 @@ typedef struct {
1116N/A
1116N/A Bool r600_shadow_fb;
1116N/A void *fb_shadow;
1116N/A+
1116N/A+#if defined(__sparc__)
1116N/A+ char *deviceName;
1116N/A+ int fd;
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A } RADEONInfoRec, *RADEONInfoPtr;
1116N/A
1116N/A #define RADEONWaitForFifo(pScrn, entries) \
1116N/A@@ -1182,4 +1196,8 @@ static __inline__ int radeon_timedout(const struct timeval *endtime)
1116N/A now.tv_usec > endtime->tv_usec : now.tv_sec > endtime->tv_sec;
1116N/A }
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+#include "efb.h"
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A #endif /* _RADEON_H_ */
1116N/Adiff --git a/src/radeon_accel.c b/src/radeon_accel.c
1116N/Aindex 8b2f167..b581719 100644
1116N/A--- a/src/radeon_accel.c
1116N/A+++ b/src/radeon_accel.c
1116N/A@@ -280,7 +280,11 @@ void RADEONEngineReset(ScrnInfoPtr pScrn)
1116N/A INREG(RADEON_RBBM_SOFT_RESET);
1116N/A }
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A+ // soft reset the HDP causes system panic on some SPARC machines
1116N/A OUTREG(RADEON_HOST_PATH_CNTL, host_path_cntl | RADEON_HDP_SOFT_RESET);
1116N/A+#endif
1116N/A+
1116N/A INREG(RADEON_HOST_PATH_CNTL);
1116N/A OUTREG(RADEON_HOST_PATH_CNTL, host_path_cntl);
1116N/A
1116N/Adiff --git a/src/radeon_accelfuncs.c b/src/radeon_accelfuncs.c
1116N/Aindex e3b37c1..52856ec 100644
1116N/A--- a/src/radeon_accelfuncs.c
1116N/A+++ b/src/radeon_accelfuncs.c
1116N/A@@ -723,7 +723,11 @@ FUNC_NAME(RADEONSetupForScanlineCPUToScreenColorExpandFill)(ScrnInfoPtr pScrn,
1116N/A #else
1116N/A BEGIN_ACCEL(5);
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A OUT_ACCEL_REG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_NONE);
1116N/A+#else
1116N/A+ OUT_ACCEL_REG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_32BIT);
1116N/A+#endif
1116N/A #endif
1116N/A OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
1116N/A OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
1116N/Adiff --git a/src/radeon_atombios.h b/src/radeon_atombios.h
1116N/Aindex 9cb279e..ba1b462 100644
1116N/A--- a/src/radeon_atombios.h
1116N/A+++ b/src/radeon_atombios.h
1116N/A@@ -245,9 +245,13 @@ typedef struct _atomBiosHandle {
1116N/A unsigned int BIOSImageSize;
1116N/A } atomBiosHandleRec;
1116N/A
1116N/A-# endif
1116N/A-
1116N/A extern Bool
1116N/A RADEONATOMGetTVTimings(ScrnInfoPtr pScrn, int index, SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing, int32_t *pixel_clock);
1116N/A
1116N/A+#else
1116N/A+
1116N/A+extern Bool
1116N/A+RADEONATOMGetTVTimings(ScrnInfoPtr pScrn, int index, void *crtc_timing, int32_t *pixel_clock);
1116N/A+
1116N/A+#endif
1116N/A #endif /* RHD_ATOMBIOS_H_ */
1116N/Adiff --git a/src/radeon_common.h b/src/radeon_common.h
1116N/Aindex 467addf..c081088 100644
1116N/A--- a/src/radeon_common.h
1116N/A+++ b/src/radeon_common.h
1116N/A@@ -73,6 +73,7 @@
1116N/A #define DRM_RADEON_SETPARAM 0x19
1116N/A #define DRM_RADEON_SURF_ALLOC 0x1a
1116N/A #define DRM_RADEON_SURF_FREE 0x1b
1116N/A+#define DRM_RADEON_GET_PCICONFIG 0x1c
1116N/A #define DRM_RADEON_MAX_DRM_COMMAND_INDEX 0x39
1116N/A
1116N/A
1116N/Adiff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
1116N/Aindex 8c4b598..2ff5bcb 100644
1116N/A--- a/src/radeon_commonfuncs.c
1116N/A+++ b/src/radeon_commonfuncs.c
1116N/A@@ -285,12 +285,34 @@ void FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn)
1116N/A RADEONWaitForFifoFunction(pScrn, 64);
1116N/A
1116N/A for (;;) {
1116N/A+
1116N/A+ /* execute a tight loop to wait for idle. If timeout, then
1116N/A+ execute a slower loop for half a second. If then timeout,
1116N/A+ reset the engine.
1116N/A+ */
1116N/A for (i = 0; i < RADEON_TIMEOUT; i++) {
1116N/A if (!(INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_ACTIVE)) {
1116N/A RADEONEngineFlush(pScrn);
1116N/A return;
1116N/A }
1116N/A }
1116N/A+
1116N/A+#ifdef __sparc__
1116N/A+ {
1116N/A+ hrtime_t limit;
1116N/A+ limit = gethrtime() + (hrtime_t)1000000000; /* 1000 ms from now */
1116N/A+ while (((unsigned int)(INREG(RADEON_RBBM_STATUS)) & RADEON_RBBM_ACTIVE)
1116N/A+ && (gethrtime() < limit)) {
1116N/A+ yield();
1116N/A+ }
1116N/A+ }
1116N/A+
1116N/A+ if (!(INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_ACTIVE)) {
1116N/A+ RADEONEngineFlush(pScrn);
1116N/A+ return;
1116N/A+ }
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
1116N/A "Idle timed out: %u entries, stat=0x%08x\n",
1116N/A (unsigned int)INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
1116N/Adiff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
1116N/Aindex 3524b75..da1153a 100644
1116N/A--- a/src/radeon_crtc.c
1116N/A+++ b/src/radeon_crtc.c
1116N/A@@ -218,6 +218,11 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
1116N/A } else {
1116N/A legacy_crtc_mode_set(crtc, mode, adjusted_mode, x, y);
1116N/A }
1116N/A+
1116N/A+#if defined(__sparc__)
1116N/A+ pScrn->currentMode = mode;
1116N/A+ EFBNotifyModeChanged(pScrn);
1116N/A+#endif
1116N/A }
1116N/A
1116N/A static void
1116N/A@@ -238,6 +243,9 @@ radeon_crtc_mode_commit(xf86CrtcPtr crtc)
1116N/A }
1116N/A
1116N/A radeon_crtc_dpms(crtc, DPMSModeOn);
1116N/A+
1116N/A+ if (crtc->scrn->pScreen != NULL)
1116N/A+ xf86_reload_cursors (crtc->scrn->pScreen);
1116N/A }
1116N/A
1116N/A void
1116N/Adiff --git a/src/radeon_dri.h b/src/radeon_dri.h
1116N/Aindex 3b54626..57ff2d8 100644
1116N/A--- a/src/radeon_dri.h
1116N/A+++ b/src/radeon_dri.h
1116N/A@@ -80,20 +80,25 @@ typedef struct {
1116N/A /* MMIO register data */
1116N/A drm_handle_t registerHandle;
1116N/A drmSize registerSize;
1116N/A+ int padding0;
1116N/A
1116N/A /* CP in-memory status information */
1116N/A drm_handle_t statusHandle;
1116N/A drmSize statusSize;
1116N/A+ int padding1;
1116N/A
1116N/A /* CP GART Texture data */
1116N/A drm_handle_t gartTexHandle;
1116N/A drmSize gartTexMapSize;
1116N/A+ int padding2;
1116N/A int log2GARTTexGran;
1116N/A int gartTexOffset;
1116N/A unsigned int sarea_priv_offset;
1116N/A
1116N/A #ifdef PER_CONTEXT_SAREA
1116N/A drmSize perctx_sarea_size;
1116N/A+#else
1116N/A+ int padding3;
1116N/A #endif
1116N/A } RADEONDRIRec, *RADEONDRIPtr;
1116N/A
1116N/Adiff --git a/src/radeon_driver.c b/src/radeon_driver.c
1116N/Aindex 25d912d..095d71b 100644
1116N/A--- a/src/radeon_driver.c
1116N/A+++ b/src/radeon_driver.c
1116N/A@@ -115,6 +115,10 @@
1116N/A
1116N/A #include "radeon_chipinfo_gen.h"
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+#include "efb.h"
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A /* Forward definitions for driver functions */
1116N/A static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen);
1116N/A static Bool RADEONSaveScreen(ScreenPtr pScreen, int mode);
1116N/A@@ -221,6 +225,14 @@ static const OptionInfoRec RADEONOptions[] = {
1116N/A { OPTION_FORCE_TVOUT, "ForceTVOut", OPTV_BOOLEAN, {0}, FALSE },
1116N/A { OPTION_TVSTD, "TVStandard", OPTV_STRING, {0}, FALSE },
1116N/A { OPTION_IGNORE_LID_STATUS, "IgnoreLidStatus", OPTV_BOOLEAN, {0}, FALSE },
1116N/A+#if defined(__sparc__)
1116N/A+ { OPTION_DUAL_DISPLAY, "DoubleWide", OPTV_STRING, {0}, FALSE },
1116N/A+ { OPTION_DUAL_DISPLAY_VERTICAL, "DoubleHigh", OPTV_STRING, {0}, FALSE },
1116N/A+ { OPTION_STREAM_XOFFSET, "StreamXOffset", OPTV_INTEGER, {0}, FALSE },
1116N/A+ { OPTION_STREAM_YOFFSET, "StreamYOffset", OPTV_INTEGER, {0}, FALSE },
1116N/A+ { OPTION_OUTPUTS, "Outputs", OPTV_STRING, {0}, FALSE },
1116N/A+ { OPTION_DISABLE_RANDR, "DisableRANDR", OPTV_BOOLEAN, {0}, FALSE },
1116N/A+#endif /* __sparc__ */
1116N/A { -1, NULL, OPTV_NONE, {0}, FALSE }
1116N/A };
1116N/A
1116N/A@@ -367,7 +379,7 @@ RADEONPostInt10Check(ScrnInfoPtr pScrn, void *ptr)
1116N/A }
1116N/A
1116N/A /* Allocate our private RADEONInfoRec */
1116N/A-static Bool RADEONGetRec(ScrnInfoPtr pScrn)
1116N/A+Bool RADEONGetRec(ScrnInfoPtr pScrn)
1116N/A {
1116N/A if (pScrn->driverPrivate) return TRUE;
1116N/A
1116N/A@@ -383,6 +395,41 @@ static void RADEONFreeRec(ScrnInfoPtr pScrn)
1116N/A pScrn->driverPrivate = NULL;
1116N/A }
1116N/A
1116N/A+static pciVideoPtr RADEONGetPciInfo(RADEONInfoPtr info)
1116N/A+{
1116N/A+#if !defined(__sparc__)
1116N/A+ return (xf86GetPciInfoForEntity(info->pEnt->index));
1116N/A+#else
1116N/A+ return (EFBGetPciInfo(info));
1116N/A+#endif
1116N/A+}
1116N/A+
1116N/A+
1116N/A+pointer
1116N/A+RADEONMapVidMem(ScrnInfoPtr pScrn, unsigned int flags, PCITAG picTag,
1116N/A+ unsigned long base, unsigned long size)
1116N/A+{
1116N/A+#if !defined(__sparc__)
1116N/A+ return (xf86MapPciMem(pScrn->scrnIndex, flags, pciTag, base, size));
1116N/A+#else
1116N/A+ return (EFBMapVidMem(pScrn, flags, picTag, base, size));
1116N/A+#endif /* sparc */
1116N/A+}
1116N/A+
1116N/A+void
1116N/A+RADEONUnmapVidMem(ScrnInfoPtr pScrn, pointer base, unsigned long size)
1116N/A+{
1116N/A+#if !defined(__sparc__)
1116N/A+ xf86UnMapVidMem(pScrn->scrnIndex, base, size);
1116N/A+#else
1116N/A+ EFBUnmapVidMem(pScrn, base, size);
1116N/A+#endif
1116N/A+
1116N/A+ return;
1116N/A+}
1116N/A+
1116N/A+
1116N/A+
1116N/A /* Memory map the MMIO region. Used during pre-init and by RADEONMapMem,
1116N/A * below
1116N/A */
1116N/A@@ -390,9 +437,9 @@ static Bool RADEONMapMMIO(ScrnInfoPtr pScrn)
1116N/A {
1116N/A RADEONInfoPtr info = RADEONPTR(pScrn);
1116N/A
1116N/A-#ifndef XSERVER_LIBPCIACCESS
1116N/A+#if !defined(XSERVER_LIBPCIACCESS) || defined(__sparc__)
1116N/A
1116N/A- info->MMIO = xf86MapPciMem(pScrn->scrnIndex,
1116N/A+ info->MMIO = RADEONMapVidMem(pScrn,
1116N/A VIDMEM_MMIO | VIDMEM_READSIDEEFFECT,
1116N/A info->PciTag,
1116N/A info->MMIOAddr,
1116N/A@@ -428,8 +475,8 @@ static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn)
1116N/A {
1116N/A RADEONInfoPtr info = RADEONPTR(pScrn);
1116N/A
1116N/A-#ifndef XSERVER_LIBPCIACCESS
1116N/A- xf86UnMapVidMem(pScrn->scrnIndex, info->MMIO, info->MMIOSize);
1116N/A+#if !defined(XSERVER_LIBPCIACCESS) || defined(__sparc__)
1116N/A+ RADEONUnmapVidMem(pScrn, info->MMIO, info->MMIOSize);
1116N/A #else
1116N/A pci_device_unmap_range(info->PciInfo, info->MMIO, info->MMIOSize);
1116N/A #endif
1116N/A@@ -446,9 +493,9 @@ static Bool RADEONMapFB(ScrnInfoPtr pScrn)
1116N/A xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
1116N/A "Map: 0x%08lx, 0x%08lx\n", info->LinearAddr, info->FbMapSize);
1116N/A
1116N/A-#ifndef XSERVER_LIBPCIACCESS
1116N/A+#if !defined(XSERVER_LIBPCIACCESS) || defined(__sparc__)
1116N/A
1116N/A- info->FB = xf86MapPciMem(pScrn->scrnIndex,
1116N/A+ info->FB = RADEONMapVidMem(pScrn,
1116N/A VIDMEM_FRAMEBUFFER,
1116N/A info->PciTag,
1116N/A info->LinearAddr,
1116N/A@@ -482,8 +529,8 @@ static Bool RADEONUnmapFB(ScrnInfoPtr pScrn)
1116N/A {
1116N/A RADEONInfoPtr info = RADEONPTR(pScrn);
1116N/A
1116N/A-#ifndef XSERVER_LIBPCIACCESS
1116N/A- xf86UnMapVidMem(pScrn->scrnIndex, info->FB, info->FbMapSize);
1116N/A+#if !defined(XSERVER_LIBPCIACCESS) || defined(__sparc__)
1116N/A+ RADEONUnmapVidMem(pScrn, info->FB, info->FbMapSize);
1116N/A #else
1116N/A pci_device_unmap_range(info->PciInfo, info->FB, info->FbMapSize);
1116N/A #endif
1116N/A@@ -1261,6 +1308,10 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
1116N/A }
1116N/A #endif
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A+ //
1116N/A+ // don't reinitialize mc_fb_location on sparc
1116N/A+ //
1116N/A if (info->ChipFamily != CHIP_FAMILY_RS690) {
1116N/A if (info->IsIGP)
1116N/A info->mc_fb_location = INREG(RADEON_NB_TOM);
1116N/A@@ -1306,6 +1357,8 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
1116N/A }
1116N/A }
1116N/A }
1116N/A+#endif
1116N/A+
1116N/A if (info->ChipFamily >= CHIP_FAMILY_R600) {
1116N/A info->fbLocation = (info->mc_fb_location & 0xffff) << 24;
1116N/A } else {
1116N/A@@ -1429,6 +1482,12 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn)
1116N/A return aper_size * 2;
1116N/A }
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+ else if (info->ChipFamily == CHIP_FAMILY_RV100) {
1116N/A+ return aper_size;
1116N/A+ }
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A /* Older cards have all sorts of funny issues to deal with. First
1116N/A * check if it's a multifunction card by reading the PCI config
1116N/A * header type... Limit those to one aperture size
1116N/A@@ -1492,8 +1551,12 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn)
1116N/A bar_size = PCI_REGION_SIZE(info->PciInfo, 0) / 1024;
1116N/A if (bar_size == 0)
1116N/A bar_size = 0x20000;
1116N/A+
1116N/A+
1116N/A+#if ccl
1116N/A if (accessible > bar_size)
1116N/A accessible = bar_size;
1116N/A+#endif
1116N/A
1116N/A xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1116N/A "Detected total video RAM=%dK, accessible=%uK (PCI BAR=%uK)\n",
1116N/A@@ -2190,8 +2253,16 @@ static void RADEONPreInitColorTiling(ScrnInfoPtr pScrn)
1116N/A {
1116N/A RADEONInfoPtr info = RADEONPTR(pScrn);
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A info->allowColorTiling = xf86ReturnOptValBool(info->Options,
1116N/A OPTION_COLOR_TILING, TRUE);
1116N/A+#else
1116N/A+ /*
1116N/A+ * disable Tiling for now because of coherent console
1116N/A+ */
1116N/A+ info->allowColorTiling = FALSE;
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A if (IS_R300_VARIANT || IS_AVIVO_VARIANT) {
1116N/A /* this may be 4096 on r4xx -- need to double check */
1116N/A info->MaxSurfaceWidth = 3968; /* one would have thought 4096...*/
1116N/A@@ -2551,6 +2622,16 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
1116N/A info->IsPrimary = FALSE;
1116N/A
1116N/A info->pEnt = xf86GetEntityInfo(pScrn->entityList[pScrn->numEntities - 1]);
1116N/A+
1116N/A+#if defined(__sparc__)
1116N/A+ if (info->fd == -1) {
1116N/A+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1116N/A+ "invalid device %s\n", info->deviceName);
1116N/A+ goto fail1;
1116N/A+ }
1116N/A+ info->pEnt->location.type = BUS_PCI;
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A if (info->pEnt->location.type != BUS_PCI) goto fail;
1116N/A
1116N/A pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
1116N/A@@ -2580,7 +2661,7 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
1116N/A info->ModeReg = &pRADEONEnt->ModeReg;
1116N/A }
1116N/A
1116N/A- info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index);
1116N/A+ info->PciInfo = RADEONGetPciInfo(info);
1116N/A info->PciTag = pciTag(PCI_DEV_BUS(info->PciInfo),
1116N/A PCI_DEV_DEV(info->PciInfo),
1116N/A PCI_DEV_FUNC(info->PciInfo));
1116N/A@@ -2639,8 +2720,10 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
1116N/A if (xf86RegisterResources(info->pEnt->index, 0, ResExclusive))
1116N/A goto fail;
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A if (xf86SetOperatingState(resVga, info->pEnt->index, ResUnusedOpr))
1116N/A goto fail;
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_VIEWPORT | RAC_CURSOR;
1116N/A #endif
1116N/A@@ -2693,7 +2776,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
1116N/A if (!RADEONPreInitWeight(pScrn))
1116N/A goto fail;
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A info->DispPriority = 1;
1116N/A+#else
1116N/A+ info->DispPriority = 2;
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A if ((s = xf86GetOptValString(info->Options, OPTION_DISP_PRIORITY))) {
1116N/A if (strcmp(s, "AUTO") == 0) {
1116N/A info->DispPriority = 1;
1116N/A@@ -2713,7 +2801,9 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
1116N/A if (!RADEONPreInitChipType(pScrn))
1116N/A goto fail;
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A RADEONPreInitBIOS(pScrn, pInt10);
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A #ifdef XF86DRI
1116N/A /* PreInit DRI first of all since we need that for getting a proper
1116N/A@@ -2726,6 +2816,15 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
1116N/A
1116N/A RADEONPreInitColorTiling(pScrn);
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+ RADEONPreInitDDC(pScrn);
1116N/A+
1116N/A+ if (!RADEONPreInitControllers(pScrn))
1116N/A+ goto fail;
1116N/A+
1116N/A+ EFBPreInitOutputConfiguration(pScrn, xf86_config);
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A /* we really need an FB manager... */
1116N/A if (pScrn->display->virtualX) {
1116N/A crtc_max_X = pScrn->display->virtualX;
1116N/A@@ -2767,10 +2866,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
1116N/A /*xf86CrtcSetSizeRange (pScrn, 320, 200, info->MaxSurfaceWidth, info->MaxLines);*/
1116N/A xf86CrtcSetSizeRange (pScrn, 320, 200, crtc_max_X, crtc_max_Y);
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A RADEONPreInitDDC(pScrn);
1116N/A
1116N/A if (!RADEONPreInitControllers(pScrn))
1116N/A goto fail;
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A
1116N/A ErrorF("before xf86InitialConfiguration\n");
1116N/A@@ -2985,6 +3086,7 @@ RADEONPointerMoved(int index, int x, int y)
1116N/A (*info->PointerMoved)(index, newX, newY);
1116N/A }
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A static void
1116N/A RADEONInitBIOSRegisters(ScrnInfoPtr pScrn)
1116N/A {
1116N/A@@ -3028,6 +3130,7 @@ RADEONInitBIOSRegisters(ScrnInfoPtr pScrn)
1116N/A }
1116N/A
1116N/A }
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A
1116N/A /* Called at the start of each server generation. */
1116N/A@@ -3077,8 +3180,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
1116N/A
1116N/A RADEONSave(pScrn);
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A /* set initial bios scratch reg state */
1116N/A RADEONInitBIOSRegisters(pScrn);
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A /* blank the outputs/crtcs */
1116N/A RADEONBlank(pScrn);
1116N/A@@ -3514,6 +3619,13 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
1116N/A if (!xf86CrtcScreenInit (pScreen))
1116N/A return FALSE;
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+ /*
1116N/A+ * Give the sparc driver a chance to do any necessary initialization
1116N/A+ */
1116N/A+ EFBScreenInit(pScrn);
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A /* Wrap pointer motion to flip touch screen around */
1116N/A info->PointerMoved = pScrn->PointerMoved;
1116N/A pScrn->PointerMoved = RADEONPointerMoved;
1116N/A@@ -3623,7 +3735,8 @@ void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
1116N/A * reprogrammed
1116N/A */
1116N/A if (mc_fb_loc != restore->mc_fb_location ||
1116N/A- mc_agp_loc != restore->mc_agp_location) {
1116N/A+ mc_agp_loc != restore->mc_agp_location)
1116N/A+ {
1116N/A CARD32 crtc_ext_cntl, crtc_gen_cntl, crtc2_gen_cntl=0, ov0_scale_cntl;
1116N/A CARD32 old_mc_status, status_idle;
1116N/A
1116N/A@@ -4509,6 +4622,7 @@ void RADEONRestore(ScrnInfoPtr pScrn)
1116N/A RADEONRestoreMemMapRegisters(pScrn, restore);
1116N/A RADEONRestoreCommonRegisters(pScrn, restore);
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A if (pRADEONEnt->HasCRTC2) {
1116N/A RADEONRestoreCrtc2Registers(pScrn, restore);
1116N/A RADEONRestorePLL2Registers(pScrn, restore);
1116N/A@@ -4516,6 +4630,25 @@ void RADEONRestore(ScrnInfoPtr pScrn)
1116N/A
1116N/A RADEONRestoreCrtcRegisters(pScrn, restore);
1116N/A RADEONRestorePLLRegisters(pScrn, restore);
1116N/A+#else
1116N/A+ /*
1116N/A+ On sparc, leave the mode untouched when switching
1116N/A+ back to the console mode, but make sure to leave
1116N/A+ the CRT on
1116N/A+ */
1116N/A+ if (pRADEONEnt->HasCRTC2) {
1116N/A+ OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_EN | 0x200),
1116N/A+ ~(RADEON_CRTC2_EN | RADEON_CRTC2_DISP_REQ_EN_B |
1116N/A+ 0xf00));
1116N/A+ }
1116N/A+
1116N/A+ OUTREGP(RADEON_CRTC_EXT_CNTL, RADEON_CRTC_CRT_ON,
1116N/A+ ~(RADEON_CRTC_CRT_ON));
1116N/A+ OUTREGP(RADEON_CRTC_GEN_CNTL, (RADEON_CRTC_EN),
1116N/A+ ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B
1116N/A+ ));
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A RADEONRestoreRMXRegisters(pScrn, restore);
1116N/A RADEONRestoreFPRegisters(pScrn, restore);
1116N/A RADEONRestoreFP2Registers(pScrn, restore);
1116N/A@@ -4710,6 +4843,7 @@ ModeStatus RADEONValidMode(int scrnIndex, DisplayModePtr mode,
1116N/A RADEONInfoPtr info = RADEONPTR(pScrn);
1116N/A RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A /*
1116N/A * RN50 has effective maximum mode bandwidth of about 300MiB/s.
1116N/A * XXX should really do this for all chips by properly computing
1116N/A@@ -4719,6 +4853,7 @@ ModeStatus RADEONValidMode(int scrnIndex, DisplayModePtr mode,
1116N/A if (xf86ModeBandwidth(mode, pScrn->bitsPerPixel) > 300)
1116N/A return MODE_BANDWIDTH;
1116N/A }
1116N/A+#endif
1116N/A
1116N/A /* There are problems with double scan mode at high clocks
1116N/A * They're likely related PLL and display buffer settings.
1116N/A@@ -5046,9 +5181,15 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
1116N/A }
1116N/A #endif /* USE_XAA */
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A+ //
1116N/A+ // When running on sparc, no need to restore the video state when
1116N/A+ // switch back to console mode
1116N/A+ //
1116N/A if (pScrn->vtSema) {
1116N/A RADEONRestore(pScrn);
1116N/A }
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
1116N/A "Disposing accel...\n");
1116N/A@@ -5088,6 +5229,13 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
1116N/A
1116N/A xf86ClearPrimInitDone(info->pEnt->index);
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+ /*
1116N/A+ * Give the sparc driver a chance to do any necessary cleanup
1116N/A+ */
1116N/A+ EFBCloseScreen(pScrn);
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A pScreen->BlockHandler = info->BlockHandler;
1116N/A pScreen->CloseScreen = info->CloseScreen;
1116N/A return (*pScreen->CloseScreen)(scrnIndex, pScreen);
1116N/Adiff --git a/src/radeon_macros.h b/src/radeon_macros.h
1116N/Aindex 7f532a8..b8e8218 100644
1116N/A--- a/src/radeon_macros.h
1116N/A+++ b/src/radeon_macros.h
1116N/A@@ -60,12 +60,40 @@
1116N/A (info->VBIOS[(v) + 3] << 24))
1116N/A
1116N/A /* Memory mapped register access macros */
1116N/A+#if defined(__sparc__)
1116N/A+
1116N/A+#define READ_MMIO_UCHAR(base, offset) \
1116N/A+ *((unsigned char *)((unsigned char *)base + (offset)))
1116N/A+
1116N/A+#define READ_MMIO_USHORT(base, offset) \
1116N/A+ *((unsigned short *)((unsigned char *)base + (offset)))
1116N/A+
1116N/A+#define READ_MMIO_UINT(base, offset) \
1116N/A+ *((unsigned int *)((unsigned char *)base + (offset)))
1116N/A+
1116N/A+#define WRITE_MMIO_UCHAR(base, offset, val) \
1116N/A+ *((unsigned char *)((unsigned char *)base + (offset))) = val
1116N/A+
1116N/A+#define WRITE_MMIO_USHORT(base, offset, val) \
1116N/A+ *((unsigned short *)((unsigned char *)base + (offset))) = val
1116N/A+
1116N/A+#define WRITE_MMIO_UINT(base, offset, val) \
1116N/A+ *((unsigned int *)((unsigned char *)base + (offset))) = val
1116N/A+
1116N/A+#define INREG8(addr) READ_MMIO_UCHAR(RADEONMMIO, addr)
1116N/A+#define INREG16(addr) READ_MMIO_USHORT(RADEONMMIO, addr)
1116N/A+#define INREG(addr) READ_MMIO_UINT(RADEONMMIO, addr)
1116N/A+#define OUTREG8(addr, val) WRITE_MMIO_UCHAR(RADEONMMIO, addr, val)
1116N/A+#define OUTREG16(addr, val) WRITE_MMIO_USHORT(RADEONMMIO, addr, val)
1116N/A+#define OUTREG(addr, val) WRITE_MMIO_UINT(RADEONMMIO, addr, val)
1116N/A+#else
1116N/A #define INREG8(addr) MMIO_IN8(RADEONMMIO, addr)
1116N/A #define INREG16(addr) MMIO_IN16(RADEONMMIO, addr)
1116N/A #define INREG(addr) MMIO_IN32(RADEONMMIO, addr)
1116N/A #define OUTREG8(addr, val) MMIO_OUT8(RADEONMMIO, addr, val)
1116N/A #define OUTREG16(addr, val) MMIO_OUT16(RADEONMMIO, addr, val)
1116N/A #define OUTREG(addr, val) MMIO_OUT32(RADEONMMIO, addr, val)
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A #define ADDRREG(addr) ((volatile CARD32 *)(pointer)(RADEONMMIO + (addr)))
1116N/A
1116N/Adiff --git a/src/radeon_modes.c b/src/radeon_modes.c
1116N/Aindex 2c72395..140975f 100644
1116N/A--- a/src/radeon_modes.c
1116N/A+++ b/src/radeon_modes.c
1116N/A@@ -258,6 +258,18 @@ static void RADEONAddScreenModes(xf86OutputPtr output, DisplayModePtr *modeList)
1116N/A }
1116N/A
1116N/A DisplayModePtr
1116N/A+RADEONOutputGetEDIDModes(xf86OutputPtr output)
1116N/A+{
1116N/A+#if !defined(__sparc__)
1116N/A+ return (xf86OutputGetEDIDModes(output));
1116N/A+#else
1116N/A+ extern DisplayModePtr EFBOutputGetEDIDModes();
1116N/A+
1116N/A+ return (EFBOutputGetEDIDModes(output));
1116N/A+#endif /* __sparc__ */
1116N/A+}
1116N/A+
1116N/A+DisplayModePtr
1116N/A RADEONProbeOutputModes(xf86OutputPtr output)
1116N/A {
1116N/A RADEONOutputPrivatePtr radeon_output = output->driver_private;
1116N/A@@ -283,7 +295,8 @@ RADEONProbeOutputModes(xf86OutputPtr output)
1116N/A }
1116N/A } else {
1116N/A if (output->MonInfo)
1116N/A- modes = xf86OutputGetEDIDModes (output);
1116N/A+ modes = RADEONOutputGetEDIDModes (output);
1116N/A+
1116N/A if (modes == NULL) {
1116N/A if ((radeon_output->type == OUTPUT_LVDS) && info->IsAtomBios) {
1116N/A atomBiosResult = RHDAtomBiosFunc(pScrn->scrnIndex,
1116N/A@@ -292,7 +305,7 @@ RADEONProbeOutputModes(xf86OutputPtr output)
1116N/A if (atomBiosResult == ATOM_SUCCESS) {
1116N/A output->MonInfo = xf86InterpretEDID(pScrn->scrnIndex,
1116N/A atomBiosArg.EDIDBlock);
1116N/A- modes = xf86OutputGetEDIDModes(output);
1116N/A+ modes = RADEONOutputGetEDIDModes(output);
1116N/A }
1116N/A }
1116N/A if (modes == NULL) {
1116N/Adiff --git a/src/radeon_output.c b/src/radeon_output.c
1116N/Aindex aceb3d8..93c5654 100644
1116N/A--- a/src/radeon_output.c
1116N/A+++ b/src/radeon_output.c
1116N/A@@ -514,6 +514,7 @@ radeon_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
1116N/A RADEONInfoPtr info = RADEONPTR(pScrn);
1116N/A RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A /*
1116N/A * RN50 has effective maximum mode bandwidth of about 300MiB/s.
1116N/A * XXX should really do this for all chips by properly computing
1116N/A@@ -523,6 +524,7 @@ radeon_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
1116N/A if (xf86ModeBandwidth(pMode, pScrn->bitsPerPixel) > 300)
1116N/A return MODE_BANDWIDTH;
1116N/A }
1116N/A+#endif
1116N/A
1116N/A if (OUTPUT_IS_TV) {
1116N/A /* FIXME: Update when more modes are added */
1116N/A@@ -670,6 +672,10 @@ radeon_bios_output_lock(xf86OutputPtr output, Bool lock)
1116N/A unsigned char *RADEONMMIO = info->MMIO;
1116N/A RADEONSavePtr save = info->ModeReg;
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+ return;
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A if (info->IsAtomBios) {
1116N/A if (lock) {
1116N/A save->bios_6_scratch |= (ATOM_S6_CRITICAL_STATE | ATOM_S6_ACC_MODE);
1116N/A@@ -698,6 +704,10 @@ radeon_bios_output_dpms(xf86OutputPtr output, int mode)
1116N/A unsigned char *RADEONMMIO = info->MMIO;
1116N/A RADEONSavePtr save = info->ModeReg;
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+ return;
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A if (info->IsAtomBios) {
1116N/A if (mode == DPMSModeOn) {
1116N/A if (radeon_output->MonType == MT_STV ||
1116N/A@@ -845,6 +855,10 @@ radeon_bios_output_crtc(xf86OutputPtr output)
1116N/A xf86CrtcPtr crtc = output->crtc;
1116N/A RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+ return;
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A if (info->IsAtomBios) {
1116N/A if (radeon_output->MonType == MT_STV ||
1116N/A radeon_output->MonType == MT_CTV) {
1116N/A@@ -924,6 +938,10 @@ radeon_bios_output_connected(xf86OutputPtr output, Bool connected)
1116N/A unsigned char *RADEONMMIO = info->MMIO;
1116N/A RADEONSavePtr save = info->ModeReg;
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+ return;
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A if (info->ChipFamily >= CHIP_FAMILY_R600)
1116N/A return;
1116N/A
1116N/A@@ -1577,6 +1595,23 @@ radeon_set_property(xf86OutputPtr output, Atom property,
1116N/A return TRUE;
1116N/A }
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+static const xf86OutputFuncsRec radeon_output_funcs = {
1116N/A+ .create_resources = radeon_create_resources,
1116N/A+ .dpms = radeon_dpms,
1116N/A+ .save = radeon_save,
1116N/A+ .restore = radeon_restore,
1116N/A+ .mode_valid = radeon_mode_valid,
1116N/A+ .mode_fixup = radeon_mode_fixup,
1116N/A+ .prepare = radeon_mode_prepare,
1116N/A+ .mode_set = radeon_mode_set,
1116N/A+ .commit = radeon_mode_commit,
1116N/A+ .detect = radeon_detect,
1116N/A+ .get_modes = efb_get_modes,
1116N/A+ .set_property = radeon_set_property,
1116N/A+ .destroy = radeon_destroy
1116N/A+};
1116N/A+#else
1116N/A static const xf86OutputFuncsRec radeon_output_funcs = {
1116N/A .create_resources = radeon_create_resources,
1116N/A .dpms = radeon_dpms,
1116N/A@@ -1592,6 +1627,7 @@ static const xf86OutputFuncsRec radeon_output_funcs = {
1116N/A .set_property = radeon_set_property,
1116N/A .destroy = radeon_destroy
1116N/A };
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A void RADEONSetOutputType(ScrnInfoPtr pScrn, RADEONOutputPrivatePtr radeon_output)
1116N/A {
1116N/A@@ -2439,6 +2475,17 @@ static void RADEONSetupGenericConnectors(ScrnInfoPtr pScrn)
1116N/A info->BiosConnector[1].TMDSType = TMDS_EXT;
1116N/A info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I;
1116N/A info->BiosConnector[1].valid = TRUE;
1116N/A+#elif defined(__sparc__)
1116N/A+ info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1116N/A+ info->BiosConnector[1].DACType = DAC_PRIMARY;
1116N/A+ info->BiosConnector[1].TMDSType = TMDS_EXT;
1116N/A+ info->BiosConnector[1].valid = TRUE;
1116N/A+
1116N/A+ if (info->ChipFamily == CHIP_FAMILY_RV380) {
1116N/A+ info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I;
1116N/A+ } else {
1116N/A+ info->BiosConnector[1].ConnectorType = CONNECTOR_VGA;
1116N/A+ }
1116N/A #else
1116N/A info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1116N/A info->BiosConnector[1].DACType = DAC_PRIMARY;
1116N/A@@ -2782,6 +2829,10 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
1116N/A but I'm not sure it's worth the trouble */
1116N/A output->possible_clones = 0;
1116N/A
1116N/A+#if defined(__sparc__)
1116N/A+ xf86OutputUseScreenMonitor(output, TRUE);
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A RADEONInitConnector(output);
1116N/A }
1116N/A }
1116N/Adiff --git a/src/radeon_probe.c b/src/radeon_probe.c
1116N/Aindex 36451f9..6f7eafa 100644
1116N/A--- a/src/radeon_probe.c
1116N/A+++ b/src/radeon_probe.c
1116N/A@@ -31,7 +31,9 @@
1116N/A #endif
1116N/A
1116N/A #include <string.h>
1116N/A+#include <sys/fcntl.h>
1116N/A
1116N/A+#include <sys/visual_io.h>
1116N/A /*
1116N/A * Authors:
1116N/A * Kevin E. Martin <martin@xfree86.org>
1116N/A@@ -53,6 +55,7 @@
1116N/A #include "radeon_chipset_gen.h"
1116N/A
1116N/A #include "radeon_pci_chipset_gen.h"
1116N/A+#include "radeon.h"
1116N/A
1116N/A
1116N/A #ifdef XSERVER_LIBPCIACCESS
1116N/A@@ -63,6 +66,7 @@
1116N/A static Bool RADEONProbe(DriverPtr drv, int flags);
1116N/A #endif
1116N/A
1116N/A+_X_EXPORT
1116N/A int gRADEONEntityIndex = -1;
1116N/A
1116N/A /* Return the options for supported chipset 'n'; NULL otherwise */
1116N/A@@ -81,18 +85,22 @@ RADEONIdentify(int flags)
1116N/A RADEONChipsets);
1116N/A }
1116N/A
1116N/A-static Bool
1116N/A+static ScrnInfoPtr
1116N/A radeon_get_scrninfo(int entity_num)
1116N/A {
1116N/A ScrnInfoPtr pScrn = NULL;
1116N/A EntityInfoPtr pEnt;
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A pScrn = xf86ConfigPciEntity(pScrn, 0, entity_num, RADEONPciChipsets,
1116N/A NULL,
1116N/A NULL, NULL, NULL, NULL);
1116N/A+#else
1116N/A+ pScrn = xf86ConfigFbEntity(pScrn, 0, entity_num, NULL,NULL,NULL,NULL);
1116N/A+#endif
1116N/A
1116N/A if (!pScrn)
1116N/A- return FALSE;
1116N/A+ return NULL;
1116N/A
1116N/A pScrn->driverVersion = RADEON_VERSION_CURRENT;
1116N/A pScrn->driverName = RADEON_DRIVER_NAME;
1116N/A@@ -146,10 +154,14 @@ radeon_get_scrninfo(int entity_num)
1116N/A
1116N/A xfree(pEnt);
1116N/A
1116N/A- return TRUE;
1116N/A+ return pScrn;
1116N/A }
1116N/A
1116N/A-#ifndef XSERVER_LIBPCIACCESS
1116N/A+#if defined(__sparc__)
1116N/A+#define RADEON_DEFAULT_DEVICE_PATH "/dev/fb"
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A+#if !defined(XSERVER_LIBPCIACCESS) || defined(__sparc__)
1116N/A
1116N/A /* Return TRUE if chipset is present; FALSE otherwise. */
1116N/A static Bool
1116N/A@@ -161,13 +173,17 @@ RADEONProbe(DriverPtr drv, int flags)
1116N/A GDevPtr *devSections;
1116N/A Bool foundScreen = FALSE;
1116N/A int i;
1116N/A+ ScrnInfoPtr pScrn;
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A if (!xf86GetPciVideoInfo()) return FALSE;
1116N/A+#endif /* __sparc__ */
1116N/A
1116N/A numDevSections = xf86MatchDevice(RADEON_NAME, &devSections);
1116N/A
1116N/A if (!numDevSections) return FALSE;
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A numUsed = xf86MatchPciInstances(RADEON_NAME,
1116N/A PCI_VENDOR_ATI,
1116N/A RADEONChipsets,
1116N/A@@ -183,12 +199,50 @@ RADEONProbe(DriverPtr drv, int flags)
1116N/A foundScreen = TRUE;
1116N/A } else {
1116N/A for (i = 0; i < numUsed; i++) {
1116N/A- if (radeon_get_scrninfo(usedChips[i]))
1116N/A+ if (pScrn = radeon_get_scrninfo(usedChips[i]))
1116N/A foundScreen = TRUE;
1116N/A }
1116N/A }
1116N/A
1116N/A xfree(usedChips);
1116N/A+#else
1116N/A+
1116N/A+
1116N/A+ // CR 6876840 - fix the core dump, but it still won't support
1116N/A+ // -configure option
1116N/A+
1116N/A+ if (flags & PROBE_DETECT) {
1116N/A+ if (devSections)
1116N/A+ xfree(devSections);
1116N/A+ return TRUE;
1116N/A+ }
1116N/A+
1116N/A+ for (i = 0; i < numDevSections; i++) {
1116N/A+ char * dev;
1116N/A+ int entity;
1116N/A+ RADEONInfoPtr info;
1116N/A+ int fd;
1116N/A+
1116N/A+ entity = xf86ClaimFbSlot(drv, 0, devSections[i], TRUE);
1116N/A+ if (pScrn = radeon_get_scrninfo(entity)) {
1116N/A+ dev = xf86FindOptionValue(devSections[i]->options, "device");
1116N/A+ if (dev == NULL) {
1116N/A+ dev = RADEON_DEFAULT_DEVICE_PATH;
1116N/A+ }
1116N/A+
1116N/A+ if (((fd = open(dev, O_RDWR, 0)) >= 0)) {
1116N/A+ foundScreen = TRUE;
1116N/A+ }
1116N/A+
1116N/A+ if (RADEONGetRec(pScrn)) {
1116N/A+ info = RADEONPTR(pScrn);
1116N/A+ info->deviceName = dev;
1116N/A+ info->fd = fd;
1116N/A+ }
1116N/A+ }
1116N/A+ }
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A xfree(devSections);
1116N/A
1116N/A return foundScreen;
1116N/A@@ -196,7 +250,7 @@ RADEONProbe(DriverPtr drv, int flags)
1116N/A
1116N/A #else /* XSERVER_LIBPCIACCESS */
1116N/A
1116N/A-static Bool
1116N/A+static ScrnInfoPtr
1116N/A radeon_pci_probe(
1116N/A DriverPtr pDriver,
1116N/A int entity_num,
1116N/A@@ -204,7 +258,48 @@ radeon_pci_probe(
1116N/A intptr_t match_data
1116N/A )
1116N/A {
1116N/A- return radeon_get_scrninfo(entity_num);
1116N/A+ ScrnInfoPtr pScrn;
1116N/A+ pScrn = radeon_get_scrninfo(entity_num);
1116N/A+
1116N/A+#if defined(__sparc__)
1116N/A+ if (pScrn != NULL) {
1116N/A+ char * dev;
1116N/A+ RADEONInfoPtr info = NULL;
1116N/A+ int fd = -1;
1116N/A+ int i, numDevSections;
1116N/A+ GDevPtr *devSections;
1116N/A+
1116N/A+ numDevSections = xf86MatchDevice(RADEON_NAME, &devSections);
1116N/A+
1116N/A+ if (RADEONGetRec(pScrn)) {
1116N/A+ info = RADEONPTR(pScrn);
1116N/A+ info->fd = -1;
1116N/A+ }
1116N/A+
1116N/A+ for (i = 0; i < numDevSections; i++) {
1116N/A+ dev = xf86FindOptionValue(devSections[i]->options, "device");
1116N/A+ if (dev == NULL) {
1116N/A+ dev = RADEON_DEFAULT_DEVICE_PATH;
1116N/A+ }
1116N/A+
1116N/A+ if (((fd = open(dev, O_RDWR, 0)) >= 0)) {
1116N/A+ if (RADEONGetRec(pScrn)) {
1116N/A+ info = RADEONPTR(pScrn);
1116N/A+ info->deviceName = dev;
1116N/A+ info->fd = fd;
1116N/A+ }
1116N/A+ }
1116N/A+ }
1116N/A+
1116N/A+ if (info->fd == -1) {
1116N/A+ dev = RADEON_DEFAULT_DEVICE_PATH;
1116N/A+ info->deviceName = dev;
1116N/A+ info->fd = open(dev, O_RDWR, 0);
1116N/A+ }
1116N/A+ }
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A+ return pScrn;
1116N/A }
1116N/A
1116N/A #endif /* XSERVER_LIBPCIACCESS */
1116N/A@@ -214,7 +309,7 @@ _X_EXPORT DriverRec RADEON =
1116N/A RADEON_VERSION_CURRENT,
1116N/A RADEON_DRIVER_NAME,
1116N/A RADEONIdentify,
1116N/A-#ifdef XSERVER_LIBPCIACCESS
1116N/A+#if defined(XSERVER_LIBPCIACCESS) && !defined(__sparc__)
1116N/A NULL,
1116N/A #else
1116N/A RADEONProbe,
1116N/A@@ -223,7 +318,7 @@ _X_EXPORT DriverRec RADEON =
1116N/A NULL,
1116N/A 0,
1116N/A NULL,
1116N/A-#ifdef XSERVER_LIBPCIACCESS
1116N/A+#if defined(XSERVER_LIBPCIACCESS) && !defined(__sparc__)
1116N/A radeon_device_match,
1116N/A radeon_pci_probe
1116N/A #endif
1116N/Adiff --git a/src/radeon_version.h b/src/radeon_version.h
1116N/Aindex ccc1367..01958af 100644
1116N/A--- a/src/radeon_version.h
1116N/A+++ b/src/radeon_version.h
1116N/A@@ -34,8 +34,14 @@
1116N/A #undef RADEON_VERSION_STRINGIFY
1116N/A #undef RADEON_VERSION_NAME
1116N/A
1116N/A+#if !defined(__sparc__)
1116N/A #define RADEON_NAME "RADEON"
1116N/A #define RADEON_DRIVER_NAME "radeon"
1116N/A+#else
1116N/A+#define RADEON_NAME "efb"
1116N/A+#define RADEON_DRIVER_NAME "efb"
1116N/A+#endif /* __sparc__ */
1116N/A+
1116N/A #define R200_DRIVER_NAME "r200"
1116N/A #define R300_DRIVER_NAME "r300"
1116N/A
1351N/A--- a/src/radeon_driver.c Thu Apr 4 08:18:50 2013
1351N/A+++ b/src/radeon_driver.c Thu Apr 4 08:19:41 2013
1351N/A@@ -3362,9 +3362,9 @@
1351N/A int maxy = info->FbMapSize / width_bytes;
1351N/A
1351N/A if (maxy <= pScrn->virtualY * 3) {
1351N/A- xf86DrvMsg(scrnIndex, X_ERROR,
1351N/A+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1351N/A "Static buffer allocation failed. Disabling DRI.\n");
1351N/A- xf86DrvMsg(scrnIndex, X_ERROR,
1351N/A+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1351N/A "At least %d kB of video memory needed at this "
1351N/A "resolution and depth.\n",
1351N/A (pScrn->displayWidth * pScrn->virtualY *
1351N/A@@ -3477,7 +3477,6 @@
1351N/A /* Backing store setup */
1351N/A xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
1351N/A "Initializing backing store\n");
1351N/A- miInitializeBackingStore(pScreen);
1351N/A xf86SetBackingStore(pScreen);
1351N/A
1351N/A /* DRI finalisation */
1351N/A--- a/src/atiscreen.c Thu Apr 4 08:19:09 2013
1351N/A+++ b/src/atiscreen.c Thu Apr 4 08:19:16 2013
1351N/A@@ -550,7 +550,6 @@
1351N/A #endif /* AVOID_DGA */
1351N/A
1351N/A /* Initialise backing store */
1351N/A- miInitializeBackingStore(pScreen);
1351N/A xf86SetBackingStore(pScreen);
1351N/A
1351N/A /* Initialise cursor */
1351N/A--- a/src/r128_driver.c Thu Apr 4 08:18:37 2013
1351N/A+++ b/src/r128_driver.c Thu Apr 4 08:18:44 2013
1351N/A@@ -2550,7 +2550,6 @@
1351N/A R128DGAInit(pScreen);
1351N/A
1351N/A /* Backing store setup */
1351N/A- miInitializeBackingStore(pScreen);
1351N/A xf86SetBackingStore(pScreen);
1351N/A
1351N/A /* Set Silken Mouse */