ast.h revision 1385
1117N/A/*
1385N/A * Copyright (c) 2006, 2014, Oracle and/or its affiliates. All rights reserved.
1117N/A *
1117N/A * Permission is hereby granted, free of charge, to any person obtaining a
1117N/A * copy of this software and associated documentation files (the "Software"),
1117N/A * to deal in the Software without restriction, including without limitation
1117N/A * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1117N/A * and/or sell copies of the Software, and to permit persons to whom the
1117N/A * Software is furnished to do so, subject to the following conditions:
1117N/A *
1117N/A * The above copyright notice and this permission notice (including the next
1117N/A * paragraph) shall be included in all copies or substantial portions of the
1117N/A * Software.
1117N/A *
1117N/A * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1117N/A * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1117N/A * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
1117N/A * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1117N/A * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1117N/A * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
1117N/A * DEALINGS IN THE SOFTWARE.
1117N/A */
1117N/A
1117N/A#ifndef AST_H
1385N/A#define AST_H
1117N/A
1385N/A#define AST_REG_SIZE_LOG2 18
1117N/A
1385N/A#define PCI_MAP_MEMORY 0x00000000
1385N/A#define PCI_MAP_IO 0x00000001
1117N/A
1385N/A#define PCI_MAP_MEMORY_TYPE 0x00000007
1385N/A#define PCI_MAP_IO_TYPE 0x00000003
1117N/A
1385N/A#define PCI_MAP_MEMORY_TYPE_32BIT 0x00000000
1385N/A#define PCI_MAP_MEMORY_TYPE_32BIT_1M 0x00000002
1385N/A#define PCI_MAP_MEMORY_TYPE_64BIT 0x00000004
1385N/A#define PCI_MAP_MEMORY_TYPE_MASK 0x00000006
1385N/A#define PCI_MAP_MEMORY_CACHABLE 0x00000008
1385N/A#define PCI_MAP_MEMORY_ATTR_MASK 0x0000000e
1385N/A#define PCI_MAP_MEMORY_ADDRESS_MASK 0xfffffff0
1117N/A
1385N/A#define PCI_MAP_IO_ATTR_MASK 0x00000003
1385N/A#define PCI_MAP_IS_IO(b) ((b) & PCI_MAP_IO)
1385N/A#define PCI_MAP_IO_ADDRESS_MASK 0xfffffffc
1117N/A
1385N/A#define PCIGETIO(b) ((b) & PCI_MAP_IO_ADDRESS_MASK)
1117N/A
1385N/A#define PCI_MAP_IS64BITMEM(b) \
1385N/A (((b) & PCI_MAP_MEMORY_TYPE) == PCI_MAP_MEMORY_TYPE_64BIT)
1117N/A
1385N/A#define PCIGETMEMORY(b) ((b) & PCI_MAP_MEMORY_ADDRESS_MASK)
1117N/A
1385N/A#define PCI_REGION_BASE(_pcidev, _b, _type) \
1385N/A (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] : \
1385N/A (_pcidev)->ioBase[(_b)])
1117N/A
1385N/A#define AR_PORT_WRITE 0x40
1385N/A#define MISC_PORT_WRITE 0x42
1385N/A#define SEQ_PORT 0x44
1385N/A#define DAC_INDEX_READ 0x47
1385N/A#define DAC_INDEX_WRITE 0x48
1385N/A#define DAC_DATA 0x49
1385N/A#define GR_PORT 0x4E
1385N/A#define CRTC_PORT 0x54
1385N/A#define INPUT_STATUS1_READ 0x5A
1385N/A#define MISC_PORT_READ 0x4C
1117N/A
1385N/A#define AST_MMIO_SIZE 0x00020000
1385N/A#define AST_VRAM_SIZE_08M 0x00800000
1385N/A#define AST_VRAM_SIZE_16M 0x01000000
1385N/A#define AST_VRAM_SIZE_32M 0x02000000
1385N/A#define AST_VRAM_SIZE_64M 0x04000000
1385N/A#define AST_VRAM_SIZE_128M 0x08000000
1117N/A
1117N/A
1385N/A#define MASK_SRC_PITCH 0x1FFF
1385N/A#define MASK_DST_PITCH 0x1FFF
1385N/A#define MASK_DST_HEIGHT 0x7FF
1385N/A#define MASK_SRC_X 0xFFF
1385N/A#define MASK_SRC_Y 0xFFF
1385N/A#define MASK_DST_X 0xFFF
1385N/A#define MASK_DST_Y 0xFFF
1385N/A#define MASK_RECT_WIDTH 0x7FF
1385N/A#define MASK_RECT_HEIGHT 0x7FF
1385N/A#define MASK_CLIP 0xFFF
1117N/A
1385N/A#define MASK_LINE_X 0xFFF
1385N/A#define MASK_LINE_Y 0xFFF
1385N/A#define MASK_LINE_ERR 0x3FFFFF
1385N/A#define MASK_LINE_WIDTH 0x7FF
1385N/A#define MASK_LINE_K1 0x3FFFFF
1385N/A#define MASK_LINE_K2 0x3FFFFF
1385N/A#define MASK_AIPLINE_X 0xFFF
1385N/A#define MASK_AIPLINE_Y 0xFFF
1117N/A
1117N/A
1117N/A/* CMDQ Reg */
1385N/A#define CMDQREG_SRC_BASE (0x00 << 24)
1385N/A#define CMDQREG_SRC_PITCH (0x01 << 24)
1385N/A#define CMDQREG_DST_BASE (0x02 << 24)
1385N/A#define CMDQREG_DST_PITCH (0x03 << 24)
1385N/A#define CMDQREG_DST_XY (0x04 << 24)
1385N/A#define CMDQREG_SRC_XY (0x05 << 24)
1385N/A#define CMDQREG_RECT_XY (0x06 << 24)
1385N/A#define CMDQREG_FG (0x07 << 24)
1385N/A#define CMDQREG_BG (0x08 << 24)
1385N/A#define CMDQREG_FG_SRC (0x09 << 24)
1385N/A#define CMDQREG_BG_SRC (0x0A << 24)
1385N/A#define CMDQREG_MONO1 (0x0B << 24)
1385N/A#define CMDQREG_MONO2 (0x0C << 24)
1385N/A#define CMDQREG_CLIP1 (0x0D << 24)
1385N/A#define CMDQREG_CLIP2 (0x0E << 24)
1385N/A#define CMDQREG_CMD (0x0F << 24)
1385N/A#define CMDQREG_PAT (0x40 << 24)
1117N/A
1385N/A#define CMDQREG_LINE_XY (0x04 << 24)
1385N/A#define CMDQREG_LINE_ERR (0x05 << 24)
1385N/A#define CMDQREG_LINE_WIDTH (0x06 << 24)
1385N/A#define CMDQREG_LINE_K1 (0x09 << 24)
1385N/A#define CMDQREG_LINE_K2 (0x0A << 24)
1385N/A#define CMDQREG_LINE_STYLE1 (0x0B << 24)
1385N/A#define CMDQREG_LINE_STYLE2 (0x0C << 24)
1385N/A#define CMDQREG_LINE_XY2 (0x05 << 24)
1385N/A#define CMDQREG_LINE_NUMBER (0x06 << 24)
1117N/A
1385N/A#define CMD_BITBLT 0x00000000
1385N/A#define CMD_LINEDRAW 0x00000001
1385N/A#define CMD_COLOREXP 0x00000002
1385N/A#define CMD_ENHCOLOREXP 0x00000003
1385N/A#define CMD_TRANSPARENTBLT 0x00000004
1385N/A#define CMD_MASK 0x00000007
1117N/A
1385N/A#define CMD_DISABLE_CLIP 0x00000000
1385N/A#define CMD_ENABLE_CLIP 0x00000008
1117N/A
1385N/A#define CMD_COLOR_08 0x00000000
1385N/A#define CMD_COLOR_16 0x00000010
1385N/A#define CMD_COLOR_32 0x00000020
1117N/A
1385N/A#define CMD_SRC_SIQ 0x00000040
1117N/A
1385N/A#define CMD_TRANSPARENT 0x00000080
1117N/A
1385N/A#define CMD_PAT_FGCOLOR 0x00000000
1385N/A#define CMD_PAT_MONOMASK 0x00010000
1385N/A#define CMD_PAT_PATREG 0x00020000
1117N/A
1385N/A#define CMD_OPAQUE 0x00000000
1385N/A#define CMD_FONT_TRANSPARENT 0x00040000
1117N/A
1385N/A#define CMD_X_INC 0x00000000
1385N/A#define CMD_X_DEC 0x00200000
1117N/A
1385N/A#define CMD_Y_INC 0x00000000
1385N/A#define CMD_Y_DEC 0x00100000
1117N/A
1385N/A#define CMD_NT_LINE 0x00000000
1385N/A#define CMD_NORMAL_LINE 0x00400000
1117N/A
1385N/A#define CMD_DRAW_LAST_PIXEL 0x00000000
1385N/A#define CMD_NOT_DRAW_LAST_PIXEL 0x00800000
1117N/A
1385N/A#define CMD_DISABLE_LINE_STYLE 0x00000000
1385N/A#define CMD_ENABLE_LINE_STYLE 0x40000000
1385N/A
1385N/A#define CMD_RESET_STYLE_COUNTER 0x80000000
1385N/A#define CMD_NOT_RESET_STYLE_COUNTER 0x00000000
1117N/A
1385N/A#define QUEUE_MEMORY_MAP 0x02000000
1385N/A#define STAT_BUSY 0x80000000
1117N/A
1385N/A#define BURST_FORCE_CMD 0x80000000
1117N/A
1385N/A#define MMIOREG_DST_BASE 0x8008
1385N/A#define MMIOREG_DST_PITCH 0x800C
1385N/A#define MMIOREG_DST_XY 0x8010
1385N/A#define MMIOREG_SRC_XY 0x8014
1385N/A#define MMIOREG_RECT_XY 0x8018
1385N/A#define MMIOREG_FG 0x801C
1385N/A#define MMIOREG_BG 0x8020
1385N/A#define MMIOREG_MONO1 0x802C
1385N/A#define MMIOREG_MONO2 0x8030
1385N/A#define MMIOREG_CLIP1 0x8034
1385N/A#define MMIOREG_CLIP2 0x8038
1385N/A#define MMIOREG_CMD 0x803C
1385N/A#define MMIOREG_QUEUE 0x8044
1385N/A#define MMIOREG_STAT 0x804C
1385N/A#define MMIOREG_PAT 0x8100
1117N/A
1385N/A#define MMIOREG_LINE_XY 0x8010
1385N/A#define MMIOREG_LINE_ERR 0x8014
1385N/A#define MMIOREG_LINE_WIDTH 0x8018
1385N/A#define MMIOREG_LINE_K1 0x8024
1385N/A#define MMIOREG_LINE_K2 0x8028
1117N/A
1117N/A
1117N/A#endif /* AST_H */