gdb.features.sparc64-cpu.xml.patch revision 4729
2074N/A# XML representation of 64-bit SPARC int registers.
2074N/A--- /dev/null 2013-10-05 19:42:45.000000000 -0700
2074N/A+++ gdb-7.6/gdb/features/sparc64-cpu.xml 2013-08-28 00:21:13.000000000 -0700
2074N/A@@ -0,0 +1,42 @@
2074N/A+<?xml version="1.0"?>
2074N/A+<!-- Copyright (c) Oracle and/or its affiliates. All rights reserved.
2074N/A+
2074N/A+ Copying and distribution of this file, with or without modification,
2074N/A+ are permitted in any medium without royalty provided the copyright
2074N/A+ notice and this notice are preserved. -->
2074N/A+
2074N/A+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
2074N/A+<feature name="org.gnu.gdb.sparc.cpu">
2074N/A+ <reg name="g0" bitsize="64" type="uint64" regnum="0"/>
2074N/A+ <reg name="g1" bitsize="64" type="uint64" regnum="1"/>
2074N/A+ <reg name="g2" bitsize="64" type="uint64" regnum="2"/>
2074N/A+ <reg name="g3" bitsize="64" type="uint64" regnum="3"/>
2074N/A+ <reg name="g4" bitsize="64" type="uint64" regnum="4"/>
2074N/A+ <reg name="g5" bitsize="64" type="uint64" regnum="5"/>
2074N/A+ <reg name="g6" bitsize="64" type="uint64" regnum="6"/>
2074N/A+ <reg name="g7" bitsize="64" type="uint64" regnum="7"/>
2074N/A+ <reg name="o0" bitsize="64" type="uint64" regnum="8"/>
2074N/A+ <reg name="o1" bitsize="64" type="uint64" regnum="9"/>
2074N/A+ <reg name="o2" bitsize="64" type="uint64" regnum="10"/>
2074N/A+ <reg name="o3" bitsize="64" type="uint64" regnum="11"/>
2074N/A+ <reg name="o4" bitsize="64" type="uint64" regnum="12"/>
2074N/A+ <reg name="o5" bitsize="64" type="uint64" regnum="13"/>
2074N/A+ <reg name="sp" bitsize="64" type="uint64" regnum="14"/>
2074N/A+ <reg name="o7" bitsize="64" type="uint64" regnum="15"/>
2074N/A+ <reg name="l0" bitsize="64" type="uint64" regnum="16"/>
2074N/A+ <reg name="l1" bitsize="64" type="uint64" regnum="17"/>
2074N/A+ <reg name="l2" bitsize="64" type="uint64" regnum="18"/>
2074N/A+ <reg name="l3" bitsize="64" type="uint64" regnum="19"/>
2074N/A+ <reg name="l4" bitsize="64" type="uint64" regnum="20"/>
2074N/A+ <reg name="l5" bitsize="64" type="uint64" regnum="21"/>
2074N/A+ <reg name="l6" bitsize="64" type="uint64" regnum="22"/>
2074N/A+ <reg name="l7" bitsize="64" type="uint64" regnum="23"/>
2074N/A+ <reg name="i0" bitsize="64" type="uint64" regnum="24"/>
2074N/A+ <reg name="i1" bitsize="64" type="uint64" regnum="25"/>
2074N/A+ <reg name="i2" bitsize="64" type="uint64" regnum="26"/>
2074N/A+ <reg name="i3" bitsize="64" type="uint64" regnum="27"/>
2074N/A+ <reg name="i4" bitsize="64" type="uint64" regnum="28"/>
2074N/A+ <reg name="i5" bitsize="64" type="uint64" regnum="29"/>
4729N/A+ <reg name="fp" bitsize="64" type="uint64" regnum="30"/>
2074N/A+ <reg name="i7" bitsize="64" type="uint64" regnum="31"/>
2074N/A+</feature>