5810N/A * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved. 5810N/A * Redistribution and use in source and binary forms, with or without modification, 5810N/A * are permitted provided that the following conditions are met: 5810N/A * 1. Redistributions of source code must retain the above copyright notice, 5810N/A * this list of conditions and the following disclaimer. 5810N/A * 2. Redistributions in binary form must reproduce the above copyright notice, 5810N/A * this list of conditions and the following disclaimer in the documentation 5810N/A * and/or other materials provided with the distribution. 5810N/A * 3. Neither the name of the copyright holder nor the names of its contributors 5810N/A * may be used to endorse or promote products derived from this software without 5810N/A * specific prior written permission. 5810N/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 5810N/A * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 5810N/A * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 5810N/A * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 5810N/A * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 5810N/A * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 5810N/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 5810N/A * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 5810N/A * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 5810N/A * OF THE POSSIBILITY OF SUCH DAMAGE. 5810N/A/* The psif base address setup access ids */ 5810N/A/* The psif base address setup access ids as offset in a struct */ 5810N/A/* *** DEPRECATED DATA TYPE *** */ 5810N/A /* HW:TSU_HOST_QP_BASE_ADDR_0 -> struct base_addr_atsp [165 bits] */ 5810N/A /* HW:TSU_QPS_AHA_BASE_ADDR_0 -> struct base_addr_ah [165 bits] */ 5810N/A /* HW:TSU_QPS_QP_BASE_ADDR_0 -> struct base_addr_qp [165 bits] */ 5810N/A /* HW:TSU_CMPL_SQ_BASE_ADDR_0 -> struct base_addr_sq_cmpl [165 bits] */ 5810N/A /* HW:TSU_VAL_KEY_BASE_ADDR_0 -> struct base_addr_key [165 bits] */ 5810N/A /* HW:TSU_RQH_QP_BASE_ADDR_0 -> struct base_addr_rqsp [165 bits] */ 5810N/A /* HW:TSU_DSCR_RQ_BASE_ADDR_SW_0 -> struct base_addr_rq_sw [165 bits] */ 5810N/A /* HW:TSU_DSCR_RQ_BASE_ADDR_HW_0 -> struct base_addr_rq_hw [165 bits] */ 5810N/A /* HW:TSU_IBPR_P1_EOIB_MAC1 SW:ibpr_p1_eoib_mac1 5810N/A * -> struct psif_csr_ibpr_p1_eoib_mac1 [64 bits] */ 5810N/A /* HW:TSU_IBPR_P1_EOIB_MAC2 SW:ibpr_p1_eoib_mac2 5810N/A * -> struct psif_csr_ibpr_p1_eoib_mac2 [64 bits] */ 5810N/A /* HW:TSU_IBPR_P2_EOIB_MAC1 SW:ibpr_p2_eoib_mac1 5810N/A * -> struct psif_csr_ibpr_p2_eoib_mac1 [64 bits] */ 5810N/A /* HW:TSU_IBPR_P2_EOIB_MAC2 SW:ibpr_p2_eoib_mac2 5810N/A * -> struct psif_csr_ibpr_p2_eoib_mac2 [64 bits] */ 5810N/A /* HW:TSU_SQS_SQ_BASE_ADDR_SW_0 -> struct base_addr_sq_sw [165 bits] */ 5810N/A /* HW:TSU_SQS_SQ_BASE_ADDR_HW_0 -> struct base_addr_sq_hw [165 bits] */ 5810N/A /* HW:TSU_SQS_PIO_RING_BASE_ADDR_0 -> struct base_addr_sq_ring [165 bits] */ 5810N/A /* HW:TSU_SQS_RSPQ_BASE_ADDR_0 -> struct base_addr_sq_rspq [165 bits] */ 5810N/A /* HW:TSU_SQS_RSPQ_TVL_BASE_ADDR_0 -> struct base_addr_sq_tvl [165 bits] */ 5810N/A /* HW:TSU_CBLD_CQ_BASE_ADDR_SW_0 -> struct base_addr_cq_sw [165 bits] */ 5810N/A /* HW:TSU_CBLD_CQ_BASE_ADDR_HW_0 -> struct base_addr_cq_hw [165 bits] */ 5810N/A};
/* struct psif_csr_be [6770560 bits] */