2N/A/*
2N/A * CDDL HEADER START
2N/A *
2N/A * The contents of this file are subject to the terms of the
2N/A * Common Development and Distribution License (the "License").
2N/A * You may not use this file except in compliance with the License.
2N/A *
2N/A * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
2N/A * or http://www.opensolaris.org/os/licensing.
2N/A * See the License for the specific language governing permissions
2N/A * and limitations under the License.
2N/A *
2N/A * When distributing Covered Code, include this CDDL HEADER in each
2N/A * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
2N/A * If applicable, add the following below this CDDL HEADER, with the
2N/A * fields enclosed by brackets "[]" replaced with your own identifying
2N/A * information: Portions Copyright [yyyy] [name of copyright owner]
2N/A *
2N/A * CDDL HEADER END
2N/A */
2N/A/*
2N/A * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
2N/A */
2N/A
2N/A#ifndef _LIBCPC_IMPL_H
2N/A#define _LIBCPC_IMPL_H
2N/A
2N/A#include <libcpc.h>
2N/A#include <inttypes.h>
2N/A#include <thread.h>
2N/A#include <synch.h>
2N/A#include <sys/types.h>
2N/A#include <sys/cpc_impl.h>
2N/A
2N/A#ifdef __cplusplus
2N/Aextern "C" {
2N/A#endif
2N/A
2N/A#define CPC_VER_1 1
2N/A#define CPC1_BUFSIZE (2 * sizeof (uint64_t))
2N/A
2N/Astruct _cpc_attr {
2N/A char ca_name[CPC_MAX_ATTR_LEN];
2N/A uint64_t ca_val;
2N/A};
2N/A
2N/Atypedef struct __cpc_request cpc_request_t;
2N/A
2N/Astruct __cpc_request {
2N/A char cr_event[CPC_MAX_EVENT_LEN];
2N/A uint64_t cr_preset; /* Initial value */
2N/A uint16_t cr_index; /* Index of request in data */
2N/A uint_t cr_flags;
2N/A uint_t cr_nattrs; /* # CPU-specific attrs */
2N/A kcpc_attr_t *cr_attr;
2N/A cpc_request_t *cr_next; /* next request in set */
2N/A};
2N/A
2N/Astruct __cpc_buf {
2N/A uint64_t *cb_data; /* Pointer to data store */
2N/A hrtime_t cb_hrtime; /* hrtime at last sample */
2N/A uint64_t cb_tick; /* virtualized tsc/tick */
2N/A size_t cb_size; /* Size of data store, bytes */
2N/A cpc_buf_t *cb_next; /* List of all bufs */
2N/A};
2N/A
2N/A/*
2N/A * Possible cpc_set_t states:
2N/A */
2N/Atypedef enum {
2N/A CS_UNBOUND, /* Set is not currently bound */
2N/A CS_BOUND_CURLWP, /* Set has been bound to curlwp */
2N/A CS_BOUND_PCTX, /* Set has been bound via libpctx */
2N/A CS_BOUND_CPU /* Set has been bound to a CPU */
2N/A} __cpc_state_t;
2N/A
2N/Astruct __cpc_set {
2N/A cpc_request_t *cs_request; /* linked list of requests */
2N/A __cpc_state_t cs_state; /* State of this set */
2N/A int cs_nreqs; /* Number of requests in set */
2N/A int cs_fd; /* file descriptor of cpc dev */
2N/A processorid_t cs_obind; /* previous proc binding */
2N/A pctx_t *cs_pctx; /* pctx of process bound to */
2N/A id_t cs_id; /* lwp ID of pctx binding */
2N/A thread_t cs_thr; /* thread ID which bound set */
2N/A cpc_set_t *cs_next; /* Linked list of all sets */
2N/A char *cs_packed; /* Cached packed set buffer */
2N/A size_t cs_packsz; /* Size of cached packed buf */
2N/A uint32_t cs_flags;
2N/A};
2N/A
2N/Astruct __cpc {
2N/A cpc_set_t *cpc_sets; /* List of existing sets */
2N/A cpc_buf_t *cpc_bufs; /* List of existing bufs */
2N/A cpc_errhndlr_t *cpc_errfn; /* Handles library errors */
2N/A rwlock_t cpc_lock; /* Protect various ops */
2N/A char *cpc_attrlist; /* List of supported attrs */
2N/A char **cpc_evlist; /* List of events per pic */
2N/A char cpc_cpuref[CPC_MAX_CPUREF];
2N/A char cpc_cciname[CPC_MAX_IMPL_NAME];
2N/A uint_t cpc_caps;
2N/A uint_t cpc_npic;
2N/A};
2N/A
2N/A/*
2N/A * cpc_t handle for CPCv1 clients.
2N/A */
2N/Aextern cpc_t *__cpc;
2N/A
2N/A/*PRINTFLIKE2*/
2N/Aextern void __cpc_error(const char *fn, const char *fmt, ...);
2N/A
2N/Aextern const char *__cpc_reg_to_name(int cpuver, int regno, uint8_t bits);
2N/Aextern int __cpc_name_to_reg(int cpuver, int regno,
2N/A const char *name, uint8_t *bits);
2N/A
2N/Aextern uint_t __cpc_workver;
2N/Aextern int __cpc_v1_cpuver;
2N/A#ifdef __sparc
2N/Aextern uint64_t __cpc_v1_pcr;
2N/A#else
2N/Aextern uint32_t __cpc_v1_pes[2];
2N/A#endif /* __sparc */
2N/A
2N/Aextern char *__cpc_pack_set(cpc_set_t *set, uint_t flags, size_t *buflen);
2N/A
2N/Atypedef struct __cpc_strhash cpc_strhash_t;
2N/A
2N/Astruct __cpc_strhash {
2N/A char *str;
2N/A struct __cpc_strhash *cur;
2N/A struct __cpc_strhash *next;
2N/A};
2N/A
2N/Aextern cpc_strhash_t *__cpc_strhash_alloc(void);
2N/Aextern void __cpc_strhash_free(cpc_strhash_t *hash);
2N/Aextern int __cpc_strhash_add(cpc_strhash_t *hash, char *key);
2N/Aextern char *__cpc_strhash_next(cpc_strhash_t *hash);
2N/A
2N/A/*
2N/A * Implementation-private system call used by libcpc
2N/A */
2N/Astruct __cpc;
2N/Aextern int __pctx_cpc(pctx_t *pctx, struct __cpc *cpc, int cmd, id_t lwpid,
2N/A void *data1, void *data2, void *data3, int bufsize);
2N/A
2N/A#define CPUDRV "/devices/pseudo/cpc@0"
2N/A#define CPUDRV_SHARED CPUDRV":shared"
2N/A
2N/A#if defined(__sparc) || defined(__i386)
2N/A/*
2N/A * These two are only used for backwards compatibility to the Obsolete CPCv1.
2N/A */
2N/Aextern int __cpc_init(void);
2N/Aextern cpc_set_t *__cpc_eventtoset(cpc_t *cpc, cpc_event_t *event, int flags);
2N/A
2N/A/*
2N/A * ce_cpuver values
2N/A */
2N/A#define CPC_ULTRA1 1000
2N/A#define CPC_ULTRA2 1001 /* same as ultra1 for these purposes */
2N/A#define CPC_ULTRA3 1002
2N/A#define CPC_ULTRA3_PLUS 1003
2N/A#define CPC_ULTRA3_I 1004
2N/A#define CPC_ULTRA4_PLUS 1005
2N/A
2N/A#define CPC_PENTIUM 2000
2N/A#define CPC_PENTIUM_MMX 2001
2N/A#define CPC_PENTIUM_PRO 2002
2N/A#define CPC_PENTIUM_PRO_MMX 2003
2N/A
2N/A#define CPC_SPARC64_III 3000
2N/A#define CPC_SPARC64_V 3002
2N/A
2N/A#endif /* __sparc || __i386 */
2N/A
2N/A#if defined(__i386) || defined(__amd64)
2N/A/*
2N/A * This is common between i386 and amd64, because amd64 implements %tick.
2N/A * Currently only used by the cpc tools to print the label atop the CPU ticks
2N/A * column on amd64.
2N/A */
2N/A#define CPC_TICKREG_NAME "tsc"
2N/A#endif /* __i386 || __amd64 */
2N/A
2N/A#if defined(__sparc)
2N/A
2N/A/*
2N/A * UltraSPARC I, II, III and IV processors
2N/A *
2N/A * The performance counters on these processors allow up to two 32-bit
2N/A * performance events to be captured simultaneously from a selection
2N/A * of metrics. The metrics are selected by writing to the performance
2N/A * control register, and subsequent values collected by reading from the
2N/A * performance instrumentation counter registers. Both registers are
2N/A * priviliged by default, and implemented as ASRs.
2N/A */
2N/A
2N/Astruct _cpc_event {
2N/A int ce_cpuver;
2N/A hrtime_t ce_hrt; /* gethrtime() */
2N/A uint64_t ce_tick; /* virtualized %tick */
2N/A uint64_t ce_pic[2]; /* virtualized %pic */
2N/A uint64_t ce_pcr; /* %pcr */
2N/A};
2N/A
2N/A#define CPC_TICKREG(ev) ((ev)->ce_tick)
2N/A#define CPC_TICKREG_NAME "%tick"
2N/A
2N/A/*
2N/A * "Well known" bitfields in the UltraSPARC %pcr register
2N/A * The interfaces in libcpc should make these #defines uninteresting.
2N/A */
2N/A#define CPC_ULTRA_PCR_USR 2
2N/A#define CPC_ULTRA_PCR_SYS 1
2N/A#define CPC_ULTRA_PCR_PRIVPIC 0
2N/A
2N/A#define CPC_ULTRA_PCR_PIC0_SHIFT 4
2N/A#define CPC_ULTRA2_PCR_PIC0_MASK UINT64_C(0xf)
2N/A#define CPC_ULTRA3_PCR_PIC0_MASK UINT64_C(0x3f)
2N/A#define CPC_ULTRA_PCR_PIC1_SHIFT 11
2N/A#define CPC_ULTRA2_PCR_PIC1_MASK UINT64_C(0xf)
2N/A#define CPC_ULTRA3_PCR_PIC1_MASK UINT64_C(0x3f)
2N/A
2N/A#elif defined(__i386)
2N/A
2N/A/*
2N/A * Pentium I, II and III processors
2N/A *
2N/A * These CPUs allow pairs of events to captured.
2N/A * The hardware counters count up to 40-bits of significance, but
2N/A * only allow 32 (signed) bits to be programmed into them.
2N/A * Pentium I and Pentium II processors are programmed differently, but
2N/A * the resulting counters and timestamps can be handled portably.
2N/A */
2N/A
2N/Astruct _cpc_event {
2N/A int ce_cpuver;
2N/A hrtime_t ce_hrt; /* gethrtime() */
2N/A uint64_t ce_tsc; /* virtualized rdtsc value */
2N/A uint64_t ce_pic[2]; /* virtualized PerfCtr[01] */
2N/A uint32_t ce_pes[2]; /* Pentium II */
2N/A#define ce_cesr ce_pes[0] /* Pentium I */
2N/A};
2N/A
2N/A#define CPC_TICKREG(ev) ((ev)->ce_tsc)
2N/A
2N/A/*
2N/A * "Well known" bit fields in the Pentium CES register
2N/A * The interfaces in libcpc should make these #defines uninteresting.
2N/A */
2N/A#define CPC_P5_CESR_ES0_SHIFT 0
2N/A#define CPC_P5_CESR_ES0_MASK 0x3f
2N/A#define CPC_P5_CESR_ES1_SHIFT 16
2N/A#define CPC_P5_CESR_ES1_MASK 0x3f
2N/A
2N/A#define CPC_P5_CESR_OS0 6
2N/A#define CPC_P5_CESR_USR0 7
2N/A#define CPC_P5_CESR_CLK0 8
2N/A#define CPC_P5_CESR_PC0 9
2N/A#define CPC_P5_CESR_OS1 (CPC_P5_CESR_OS0 + 16)
2N/A#define CPC_P5_CESR_USR1 (CPC_P5_CESR_USR0 + 16)
2N/A#define CPC_P5_CESR_CLK1 (CPC_P5_CESR_CLK0 + 16)
2N/A#define CPC_P5_CESR_PC1 (CPC_P5_CESR_PC0 + 16)
2N/A
2N/A/*
2N/A * "Well known" bit fields in the Pentium Pro PerfEvtSel registers
2N/A * The interfaces in libcpc should make these #defines uninteresting.
2N/A */
2N/A#define CPC_P6_PES_INV 23
2N/A#define CPC_P6_PES_EN 22
2N/A#define CPC_P6_PES_INT 20
2N/A#define CPC_P6_PES_PC 19
2N/A#define CPC_P6_PES_E 18
2N/A#define CPC_P6_PES_OS 17
2N/A#define CPC_P6_PES_USR 16
2N/A
2N/A#define CPC_P6_PES_UMASK_SHIFT 8
2N/A#define CPC_P6_PES_UMASK_MASK (0xffu)
2N/A
2N/A#define CPC_P6_PES_CMASK_SHIFT 24
2N/A#define CPC_P6_PES_CMASK_MASK (0xffu)
2N/A
2N/A#define CPC_P6_PES_PIC0_MASK (0xffu)
2N/A#define CPC_P6_PES_PIC1_MASK (0xffu)
2N/A
2N/A#endif /* __i386 */
2N/A
2N/A#ifdef __cplusplus
2N/A}
2N/A#endif
2N/A
2N/A#endif /* _LIBCPC_IMPL_H */