2N/A * The contents of this file are subject to the terms of the 2N/A * Common Development and Distribution License (the "License"). 2N/A * You may not use this file except in compliance with the License. 2N/A * See the License for the specific language governing permissions 2N/A * and limitations under the License. 2N/A * When distributing Covered Code, include this CDDL HEADER in each 2N/A * If applicable, add the following below this CDDL HEADER, with the 2N/A * fields enclosed by brackets "[]" replaced with your own identifying 2N/A * information: Portions Copyright [yyyy] [name of copyright owner] 2N/A * Copyright (c) 2009, 2012, Oracle and/or its affiliates. All rights reserved. 2N/A * AMD memory enumeration 2N/A * Serials, Labels are obtained from SMBIOS, so 2N/A * we leave out the related methods, any other 2N/A * methods that will be added to gen_cs_methods 2N/A * should be added to x86pi_gen_cs_methods too 2N/A * Called when there is no memory-controller driver to provide topology 2N/A * information. Generate a maximal memory topology that is appropriate 2N/A * for the chip revision. The memory-controller node has already been 2N/A * bound as mcnode, and the parent of that is cnode. 2N/A * We create a tree of dram-channel and chip-select nodes below the 2N/A * memory-controller node. There will be two dram channels and 8 chip-selects 2N/A * below each, regardless of actual socket type, processor revision and so on. 2N/A * This is adequate for generic diagnosis up to family 0x10 revision E and 2N/A * models 00h - 0Fh of family 0x15. 2N/A * Elsewhere we have already returned for families less than 0xf. 2N/A * This "generic" topology is adequate for all of family 0xf and 2N/A * for revisions A to E of family 0x10, and for models 00h - 0Fh 2N/A * of family 0x15 (for the list of models in each revision, refer 2N/A * We cover all family 0x10 models, till model A. 2N/A /* supports all revisions of family 0xf */ 2N/A /* supports revisions A to E of family 0x10 */ 2N/A /* supports family 0x15 models 00h-0Fh */ 2N/A "channels failed\n");
2N/A "topo_node_label_set\n");
2N/A "topo_node_fru_set failed\n");
2N/A "range create for cs failed\n");
2N/A "mkrsrc for cs failed\n");
2N/A "bind for cs failed\n");
2N/A * Dynamic ASRU for page faults within a chip-select. 2N/A * The topology does not represent pages (there are 2N/A * too many) so when a page is faulted we generate 2N/A * an ASRU to represent the individual page. 2N/A * If SMBIOS meets FMA needs, derive labels & serials 2N/A * for DIMMS and apply to chip-select nodes. 2N/A * If deriving from SMBIOS, skip IPMI 2N/A "amd_generic_mc_create: " 2N/A "method registration failed\n");
2N/A "amd_generic_mc_create: method" 2N/A "registration failed\n");
2N/A * If SMBIOS meets FMA needs, set DIMM as the FRU for 2N/A * the chip-select node. Use the channel & chip-select 2N/A * numbers to get the DIMM instance. 2N/A * Send via inst : dram channel number 2N/A * Receive via inst : dimm instance 2N/A * We apply DIMM labels to chip-select nodes, 2N/A * FRU for chip-selects should be DIMMs, and 2N/A * we do not derive dimm nodes for Family 0x10 2N/A * so FRU fmri is NULL, but FRU Labels are set, 2N/A * the FRU labels point to the DIMM. 2N/A * Some v20z and v40z systems may have had the 3rd-party 2N/A * NWSnps packagae installed which installs a /dev/mc 2N/A * link. So try again via /devices. 2N/A * If a rank is faulted the asru is the associated 2N/A * chip-select, but if a page within a rank is faulted 2N/A * the asru is just that page. Hence the dual preconstructed 2N/A * and computed ASRU. 2N/A "topo_method_register failed");
2N/A "topo_method_register failed");
2N/A return (0);
/* no dimms present on this node */ 2N/A "nvlist_add_string failed\n");
2N/A "topo_method_register failed");
2N/A continue;
/* used in amd_rank_create() */ 2N/A return (0);
/* no chip-selects configured on this node */ 2N/A * We will enumerate the number of channels present even if only 2N/A * channel A is in use (i.e., running in 64-bit mode). Only 2N/A * the socket 754 package has a single channel. 2N/A * Return with no error for anything before AMD family 0xf - we 2N/A * won't generate even a generic memory topology for earlier 2N/A * If a memory-controller driver exists for this chip model 2N/A * it has not attached or has otherwise malfunctioned; 2N/A * alternatively no memory-controller driver exists for this 2N/A * (presumably newly-released) cpu model. We fallback to 2N/A * creating a generic maximal topology. 2N/A "mc_create: amd_generic_mc_create failed\n");
2N/A * Add memory controller properties 2N/A "mc_create: amd_htconfig failed\n");
2N/A "mc_create: nvprop_add failed\n");
2N/A * Free the fmris for the chip-selects allocated in amd_cs_create