0N/A/*
3845N/A * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#include "precompiled.hpp"
1879N/A#include "memory/allocation.inline.hpp"
1879N/A#include "opto/chaitin.hpp"
1879N/A#include "opto/machnode.hpp"
0N/A
3845N/A// See if this register (or pairs, or vector) already contains the value.
3845N/Astatic bool register_contains_value(Node* val, OptoReg::Name reg, int n_regs,
3845N/A Node_List& value) {
3845N/A for (int i = 0; i < n_regs; i++) {
3845N/A OptoReg::Name nreg = OptoReg::add(reg,-i);
3845N/A if (value[nreg] != val)
3845N/A return false;
3845N/A }
3845N/A return true;
0N/A}
0N/A
400N/A//---------------------------may_be_copy_of_callee-----------------------------
0N/A// Check to see if we can possibly be a copy of a callee-save value.
0N/Abool PhaseChaitin::may_be_copy_of_callee( Node *def ) const {
0N/A // Short circuit if there are no callee save registers
0N/A if (_matcher.number_of_saved_registers() == 0) return false;
0N/A
0N/A // Expect only a spill-down and reload on exit for callee-save spills.
0N/A // Chains of copies cannot be deep.
0N/A // 5008997 - This is wishful thinking. Register allocator seems to
0N/A // be splitting live ranges for callee save registers to such
0N/A // an extent that in large methods the chains can be very long
0N/A // (50+). The conservative answer is to return true if we don't
605N/A // know as this prevents optimizations from occurring.
0N/A
0N/A const int limit = 60;
0N/A int i;
0N/A for( i=0; i < limit; i++ ) {
0N/A if( def->is_Proj() && def->in(0)->is_Start() &&
0N/A _matcher.is_save_on_entry(lrgs(n2lidx(def)).reg()) )
0N/A return true; // Direct use of callee-save proj
0N/A if( def->is_Copy() ) // Copies carry value through
0N/A def = def->in(def->is_Copy());
0N/A else if( def->is_Phi() ) // Phis can merge it from any direction
0N/A def = def->in(1);
0N/A else
0N/A break;
0N/A guarantee(def != NULL, "must not resurrect dead copy");
0N/A }
0N/A // If we reached the end and didn't find a callee save proj
0N/A // then this may be a callee save proj so we return true
0N/A // as the conservative answer. If we didn't reach then end
0N/A // we must have discovered that it was not a callee save
0N/A // else we would have returned.
0N/A return i == limit;
0N/A}
0N/A
2767N/A//------------------------------yank-----------------------------------
2767N/A// Helper function for yank_if_dead
2767N/Aint PhaseChaitin::yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
2767N/A int blk_adjust=0;
2767N/A Block *oldb = _cfg._bbs[old->_idx];
2767N/A oldb->find_remove(old);
2767N/A // Count 1 if deleting an instruction from the current block
2767N/A if( oldb == current_block ) blk_adjust++;
2767N/A _cfg._bbs.map(old->_idx,NULL);
2767N/A OptoReg::Name old_reg = lrgs(n2lidx(old)).reg();
2767N/A if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available?
2767N/A value->map(old_reg,NULL); // Yank from value/regnd maps
2767N/A regnd->map(old_reg,NULL); // This register's value is now unknown
2767N/A }
2767N/A return blk_adjust;
2767N/A}
0N/A
3056N/A#ifdef ASSERT
3056N/Astatic bool expected_yanked_node(Node *old, Node *orig_old) {
3056N/A // This code is expected only next original nodes:
3056N/A // - load from constant table node which may have next data input nodes:
3056N/A // MachConstantBase, Phi, MachTemp, MachSpillCopy
3056N/A // - load constant node which may have next data input nodes:
3056N/A // MachTemp, MachSpillCopy
3056N/A // - MachSpillCopy
3056N/A // - MachProj and Copy dead nodes
3056N/A if (old->is_MachSpillCopy()) {
3056N/A return true;
3056N/A } else if (old->is_Con()) {
3056N/A return true;
3056N/A } else if (old->is_MachProj()) { // Dead kills projection of Con node
3056N/A return (old == orig_old);
3056N/A } else if (old->is_Copy()) { // Dead copy of a callee-save value
3056N/A return (old == orig_old);
3056N/A } else if (old->is_MachTemp()) {
3056N/A return orig_old->is_Con();
3056N/A } else if (old->is_Phi() || old->is_MachConstantBase()) {
3056N/A return (orig_old->is_Con() && orig_old->is_MachConstant());
3056N/A }
3056N/A return false;
3056N/A}
3056N/A#endif
3056N/A
0N/A//------------------------------yank_if_dead-----------------------------------
3056N/A// Removed edges from 'old'. Yank if dead. Return adjustment counts to
0N/A// iterators in the current block.
3056N/Aint PhaseChaitin::yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
3056N/A Node_List *value, Node_List *regnd) {
0N/A int blk_adjust=0;
3056N/A if (old->outcnt() == 0 && old != C->top()) {
3056N/A#ifdef ASSERT
3056N/A if (!expected_yanked_node(old, orig_old)) {
3056N/A tty->print_cr("==============================================");
3056N/A tty->print_cr("orig_old:");
3056N/A orig_old->dump();
3056N/A tty->print_cr("old:");
3056N/A old->dump();
3056N/A assert(false, "unexpected yanked node");
3056N/A }
3056N/A if (old->is_Con())
3056N/A orig_old = old; // Reset to satisfy expected nodes checks.
3056N/A#endif
2767N/A blk_adjust += yank(old, current_block, value, regnd);
2767N/A
2767N/A for (uint i = 1; i < old->req(); i++) {
3056N/A Node* n = old->in(i);
3056N/A if (n != NULL) {
3056N/A old->set_req(i, NULL);
3056N/A blk_adjust += yank_if_dead_recurse(n, orig_old, current_block, value, regnd);
2767N/A }
0N/A }
3056N/A // Disconnect control and remove precedence edges if any exist
4123N/A old->disconnect_inputs(NULL, C);
0N/A }
0N/A return blk_adjust;
0N/A}
0N/A
0N/A//------------------------------use_prior_register-----------------------------
0N/A// Use the prior value instead of the current value, in an effort to make
0N/A// the current value go dead. Return block iterator adjustment, in case
0N/A// we yank some instructions from this block.
0N/Aint PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List &regnd ) {
0N/A // No effect?
0N/A if( def == n->in(idx) ) return 0;
0N/A // Def is currently dead and can be removed? Do not resurrect
0N/A if( def->outcnt() == 0 ) return 0;
0N/A
0N/A // Not every pair of physical registers are assignment compatible,
0N/A // e.g. on sparc floating point registers are not assignable to integer
0N/A // registers.
0N/A const LRG &def_lrg = lrgs(n2lidx(def));
0N/A OptoReg::Name def_reg = def_lrg.reg();
0N/A const RegMask &use_mask = n->in_RegMask(idx);
0N/A bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0)
0N/A : (use_mask.is_AllStack() != 0));
3845N/A if (!RegMask::is_vector(def->ideal_reg())) {
3845N/A // Check for a copy to or from a misaligned pair.
3845N/A // It is workaround for a sparc with misaligned pairs.
3845N/A can_use = can_use && !use_mask.is_misaligned_pair() && !def_lrg.mask().is_misaligned_pair();
3845N/A }
0N/A if (!can_use)
0N/A return 0;
0N/A
0N/A // Capture the old def in case it goes dead...
0N/A Node *old = n->in(idx);
0N/A
0N/A // Save-on-call copies can only be elided if the entire copy chain can go
0N/A // away, lest we get the same callee-save value alive in 2 locations at
0N/A // once. We check for the obvious trivial case here. Although it can
0N/A // sometimes be elided with cooperation outside our scope, here we will just
0N/A // miss the opportunity. :-(
0N/A if( may_be_copy_of_callee(def) ) {
0N/A if( old->outcnt() > 1 ) return 0; // We're the not last user
0N/A int idx = old->is_Copy();
0N/A assert( idx, "chain of copies being removed" );
0N/A Node *old2 = old->in(idx); // Chain of copies
0N/A if( old2->outcnt() > 1 ) return 0; // old is not the last user
0N/A int idx2 = old2->is_Copy();
0N/A if( !idx2 ) return 0; // Not a chain of 2 copies
0N/A if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies
0N/A }
0N/A
0N/A // Use the new def
0N/A n->set_req(idx,def);
0N/A _post_alloc++;
0N/A
0N/A // Is old def now dead? We successfully yanked a copy?
0N/A return yank_if_dead(old,current_block,&value,&regnd);
0N/A}
0N/A
0N/A
0N/A//------------------------------skip_copies------------------------------------
0N/A// Skip through any number of copies (that don't mod oop-i-ness)
0N/ANode *PhaseChaitin::skip_copies( Node *c ) {
0N/A int idx = c->is_Copy();
0N/A uint is_oop = lrgs(n2lidx(c))._is_oop;
0N/A while (idx != 0) {
0N/A guarantee(c->in(idx) != NULL, "must not resurrect dead copy");
0N/A if (lrgs(n2lidx(c->in(idx)))._is_oop != is_oop)
0N/A break; // casting copy, not the same value
0N/A c = c->in(idx);
0N/A idx = c->is_Copy();
0N/A }
0N/A return c;
0N/A}
0N/A
0N/A//------------------------------elide_copy-------------------------------------
0N/A// Remove (bypass) copies along Node n, edge k.
0N/Aint PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List &regnd, bool can_change_regs ) {
0N/A int blk_adjust = 0;
0N/A
0N/A uint nk_idx = n2lidx(n->in(k));
0N/A OptoReg::Name nk_reg = lrgs(nk_idx ).reg();
0N/A
0N/A // Remove obvious same-register copies
0N/A Node *x = n->in(k);
0N/A int idx;
0N/A while( (idx=x->is_Copy()) != 0 ) {
0N/A Node *copy = x->in(idx);
0N/A guarantee(copy != NULL, "must not resurrect dead copy");
0N/A if( lrgs(n2lidx(copy)).reg() != nk_reg ) break;
0N/A blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd);
0N/A if( n->in(k) != copy ) break; // Failed for some cutout?
0N/A x = copy; // Progress, try again
0N/A }
0N/A
0N/A // Phis and 2-address instructions cannot change registers so easily - their
0N/A // outputs must match their input.
0N/A if( !can_change_regs )
0N/A return blk_adjust; // Only check stupid copies!
0N/A
0N/A // Loop backedges won't have a value-mapping yet
0N/A if( &value == NULL ) return blk_adjust;
0N/A
0N/A // Skip through all copies to the _value_ being used. Do not change from
0N/A // int to pointer. This attempts to jump through a chain of copies, where
0N/A // intermediate copies might be illegal, i.e., value is stored down to stack
0N/A // then reloaded BUT survives in a register the whole way.
0N/A Node *val = skip_copies(n->in(k));
0N/A
1915N/A if (val == x && nk_idx != 0 &&
1915N/A regnd[nk_reg] != NULL && regnd[nk_reg] != x &&
1915N/A n2lidx(x) == n2lidx(regnd[nk_reg])) {
1915N/A // When rematerialzing nodes and stretching lifetimes, the
1915N/A // allocator will reuse the original def for multidef LRG instead
1915N/A // of the current reaching def because it can't know it's safe to
1915N/A // do so. After allocation completes if they are in the same LRG
1915N/A // then it should use the current reaching def instead.
1915N/A n->set_req(k, regnd[nk_reg]);
1915N/A blk_adjust += yank_if_dead(val, current_block, &value, &regnd);
1915N/A val = skip_copies(n->in(k));
1915N/A }
1915N/A
3845N/A if (val == x) return blk_adjust; // No progress?
0N/A
3845N/A int n_regs = RegMask::num_registers(val->ideal_reg());
0N/A uint val_idx = n2lidx(val);
0N/A OptoReg::Name val_reg = lrgs(val_idx).reg();
0N/A
0N/A // See if it happens to already be in the correct register!
0N/A // (either Phi's direct register, or the common case of the name
0N/A // never-clobbered original-def register)
3845N/A if (register_contains_value(val, val_reg, n_regs, value)) {
0N/A blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
0N/A if( n->in(k) == regnd[val_reg] ) // Success! Quit trying
0N/A return blk_adjust;
0N/A }
0N/A
0N/A // See if we can skip the copy by changing registers. Don't change from
0N/A // using a register to using the stack unless we know we can remove a
0N/A // copy-load. Otherwise we might end up making a pile of Intel cisc-spill
0N/A // ops reading from memory instead of just loading once and using the
0N/A // register.
0N/A
0N/A // Also handle duplicate copies here.
0N/A const Type *t = val->is_Con() ? val->bottom_type() : NULL;
0N/A
0N/A // Scan all registers to see if this value is around already
0N/A for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
400N/A if (reg == (uint)nk_reg) {
400N/A // Found ourselves so check if there is only one user of this
400N/A // copy and keep on searching for a better copy if so.
400N/A bool ignore_self = true;
400N/A x = n->in(k);
400N/A DUIterator_Fast imax, i = x->fast_outs(imax);
400N/A Node* first = x->fast_out(i); i++;
400N/A while (i < imax && ignore_self) {
400N/A Node* use = x->fast_out(i); i++;
400N/A if (use != first) ignore_self = false;
400N/A }
400N/A if (ignore_self) continue;
400N/A }
400N/A
0N/A Node *vv = value[reg];
3851N/A if (n_regs > 1) { // Doubles and vectors check for aligned-adjacent set
3851N/A uint last = (n_regs-1); // Looking for the last part of a set
3851N/A if ((reg&last) != last) continue; // Wrong part of a set
3851N/A if (!register_contains_value(vv, reg, n_regs, value)) continue; // Different value
0N/A }
0N/A if( vv == val || // Got a direct hit?
0N/A (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
0N/A vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
0N/A assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
0N/A if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
0N/A OptoReg::is_reg(reg) || // turning into a register use OR
0N/A regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
0N/A blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
0N/A if( n->in(k) == regnd[reg] ) // Success! Quit trying
0N/A return blk_adjust;
0N/A } // End of if not degrading to a stack
0N/A } // End of if found value in another register
0N/A } // End of scan all machine registers
0N/A return blk_adjust;
0N/A}
0N/A
0N/A
0N/A//
0N/A// Check if nreg already contains the constant value val. Normal copy
0N/A// elimination doesn't doesn't work on constants because multiple
0N/A// nodes can represent the same constant so the type and rule of the
0N/A// MachNode must be checked to ensure equivalence.
0N/A//
70N/Abool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n,
70N/A Block *current_block,
0N/A Node_List& value, Node_List& regnd,
0N/A OptoReg::Name nreg, OptoReg::Name nreg2) {
0N/A if (value[nreg] != val && val->is_Con() &&
0N/A value[nreg] != NULL && value[nreg]->is_Con() &&
0N/A (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) &&
0N/A value[nreg]->bottom_type() == val->bottom_type() &&
0N/A value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) {
0N/A // This code assumes that two MachNodes representing constants
0N/A // which have the same rule and the same bottom type will produce
0N/A // identical effects into a register. This seems like it must be
0N/A // objectively true unless there are hidden inputs to the nodes
0N/A // but if that were to change this code would need to updated.
0N/A // Since they are equivalent the second one if redundant and can
0N/A // be removed.
0N/A //
70N/A // n will be replaced with the old value but n might have
0N/A // kills projections associated with it so remove them now so that
605N/A // yank_if_dead will be able to eliminate the copy once the uses
0N/A // have been transferred to the old[value].
70N/A for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
70N/A Node* use = n->fast_out(i);
0N/A if (use->is_Proj() && use->outcnt() == 0) {
0N/A // Kill projections have no users and one input
0N/A use->set_req(0, C->top());
0N/A yank_if_dead(use, current_block, &value, &regnd);
0N/A --i; --imax;
0N/A }
0N/A }
0N/A _post_alloc++;
0N/A return true;
0N/A }
0N/A return false;
0N/A}
0N/A
0N/A
0N/A//------------------------------post_allocate_copy_removal---------------------
0N/A// Post-Allocation peephole copy removal. We do this in 1 pass over the
0N/A// basic blocks. We maintain a mapping of registers to Nodes (an array of
0N/A// Nodes indexed by machine register or stack slot number). NULL means that a
0N/A// register is not mapped to any Node. We can (want to have!) have several
0N/A// registers map to the same Node. We walk forward over the instructions
0N/A// updating the mapping as we go. At merge points we force a NULL if we have
0N/A// to merge 2 different Nodes into the same register. Phi functions will give
0N/A// us a new Node if there is a proper value merging. Since the blocks are
0N/A// arranged in some RPO, we will visit all parent blocks before visiting any
0N/A// successor blocks (except at loops).
0N/A//
0N/A// If we find a Copy we look to see if the Copy's source register is a stack
0N/A// slot and that value has already been loaded into some machine register; if
0N/A// so we use machine register directly. This turns a Load into a reg-reg
0N/A// Move. We also look for reloads of identical constants.
0N/A//
0N/A// When we see a use from a reg-reg Copy, we will attempt to use the copy's
0N/A// source directly and make the copy go dead.
0N/Avoid PhaseChaitin::post_allocate_copy_removal() {
0N/A NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); )
0N/A ResourceMark rm;
0N/A
0N/A // Need a mapping from basic block Node_Lists. We need a Node_List to
0N/A // map from register number to value-producing Node.
0N/A Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
0N/A memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
0N/A // Need a mapping from basic block Node_Lists. We need a Node_List to
0N/A // map from register number to register-defining Node.
0N/A Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
0N/A memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
0N/A
0N/A // We keep unused Node_Lists on a free_list to avoid wasting
0N/A // memory.
0N/A GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16);
0N/A
0N/A // For all blocks
0N/A for( uint i = 0; i < _cfg._num_blocks; i++ ) {
0N/A uint j;
0N/A Block *b = _cfg._blocks[i];
0N/A
0N/A // Count of Phis in block
0N/A uint phi_dex;
0N/A for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) {
0N/A Node *phi = b->_nodes[phi_dex];
0N/A if( !phi->is_Phi() )
0N/A break;
0N/A }
0N/A
0N/A // If any predecessor has not been visited, we do not know the state
0N/A // of registers at the start. Check for this, while updating copies
0N/A // along Phi input edges
0N/A bool missing_some_inputs = false;
0N/A Block *freed = NULL;
0N/A for( j = 1; j < b->num_preds(); j++ ) {
0N/A Block *pb = _cfg._bbs[b->pred(j)->_idx];
0N/A // Remove copies along phi edges
0N/A for( uint k=1; k<phi_dex; k++ )
0N/A elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false );
0N/A if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge?
0N/A // See if this predecessor's mappings have been used by everybody
0N/A // who wants them. If so, free 'em.
0N/A uint k;
0N/A for( k=0; k<pb->_num_succs; k++ ) {
0N/A Block *pbsucc = pb->_succs[k];
0N/A if( !blk2value[pbsucc->_pre_order] && pbsucc != b )
0N/A break; // Found a future user
0N/A }
0N/A if( k >= pb->_num_succs ) { // No more uses, free!
0N/A freed = pb; // Record last block freed
0N/A free_list.push(blk2value[pb->_pre_order]);
0N/A free_list.push(blk2regnd[pb->_pre_order]);
0N/A }
0N/A } else { // This block has unvisited (loopback) inputs
0N/A missing_some_inputs = true;
0N/A }
0N/A }
0N/A
0N/A
0N/A // Extract Node_List mappings. If 'freed' is non-zero, we just popped
0N/A // 'freed's blocks off the list
0N/A Node_List &regnd = *(free_list.is_empty() ? new Node_List() : free_list.pop());
0N/A Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop());
0N/A assert( !freed || blk2value[freed->_pre_order] == &value, "" );
0N/A value.map(_max_reg,NULL);
0N/A regnd.map(_max_reg,NULL);
0N/A // Set mappings as OUR mappings
0N/A blk2value[b->_pre_order] = &value;
0N/A blk2regnd[b->_pre_order] = &regnd;
0N/A
0N/A // Initialize value & regnd for this block
0N/A if( missing_some_inputs ) {
0N/A // Some predecessor has not yet been visited; zap map to empty
0N/A for( uint k = 0; k < (uint)_max_reg; k++ ) {
0N/A value.map(k,NULL);
0N/A regnd.map(k,NULL);
0N/A }
0N/A } else {
0N/A if( !freed ) { // Didn't get a freebie prior block
0N/A // Must clone some data
0N/A freed = _cfg._bbs[b->pred(1)->_idx];
0N/A Node_List &f_value = *blk2value[freed->_pre_order];
0N/A Node_List &f_regnd = *blk2regnd[freed->_pre_order];
0N/A for( uint k = 0; k < (uint)_max_reg; k++ ) {
0N/A value.map(k,f_value[k]);
0N/A regnd.map(k,f_regnd[k]);
0N/A }
0N/A }
0N/A // Merge all inputs together, setting to NULL any conflicts.
0N/A for( j = 1; j < b->num_preds(); j++ ) {
0N/A Block *pb = _cfg._bbs[b->pred(j)->_idx];
0N/A if( pb == freed ) continue; // Did self already via freelist
0N/A Node_List &p_regnd = *blk2regnd[pb->_pre_order];
0N/A for( uint k = 0; k < (uint)_max_reg; k++ ) {
0N/A if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs?
0N/A value.map(k,NULL); // Then no value handy
0N/A regnd.map(k,NULL);
0N/A }
0N/A }
0N/A }
0N/A }
0N/A
0N/A // For all Phi's
0N/A for( j = 1; j < phi_dex; j++ ) {
0N/A uint k;
0N/A Node *phi = b->_nodes[j];
0N/A uint pidx = n2lidx(phi);
0N/A OptoReg::Name preg = lrgs(n2lidx(phi)).reg();
0N/A
0N/A // Remove copies remaining on edges. Check for junk phi.
0N/A Node *u = NULL;
0N/A for( k=1; k<phi->req(); k++ ) {
0N/A Node *x = phi->in(k);
0N/A if( phi != x && u != x ) // Found a different input
0N/A u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
0N/A }
0N/A if( u != NodeSentinel ) { // Junk Phi. Remove
0N/A b->_nodes.remove(j--); phi_dex--;
0N/A _cfg._bbs.map(phi->_idx,NULL);
0N/A phi->replace_by(u);
4123N/A phi->disconnect_inputs(NULL, C);
0N/A continue;
0N/A }
0N/A // Note that if value[pidx] exists, then we merged no new values here
0N/A // and the phi is useless. This can happen even with the above phi
0N/A // removal for complex flows. I cannot keep the better known value here
0N/A // because locally the phi appears to define a new merged value. If I
0N/A // keep the better value then a copy of the phi, being unable to use the
0N/A // global flow analysis, can't "peek through" the phi to the original
0N/A // reaching value and so will act like it's defining a new value. This
0N/A // can lead to situations where some uses are from the old and some from
0N/A // the new values. Not illegal by itself but throws the over-strong
0N/A // assert in scheduling.
0N/A if( pidx ) {
0N/A value.map(preg,phi);
0N/A regnd.map(preg,phi);
3845N/A int n_regs = RegMask::num_registers(phi->ideal_reg());
3845N/A for (int l = 1; l < n_regs; l++) {
3845N/A OptoReg::Name preg_lo = OptoReg::add(preg,-l);
0N/A value.map(preg_lo,phi);
0N/A regnd.map(preg_lo,phi);
0N/A }
0N/A }
0N/A }
0N/A
0N/A // For all remaining instructions
0N/A for( j = phi_dex; j < b->_nodes.size(); j++ ) {
0N/A Node *n = b->_nodes[j];
0N/A
0N/A if( n->outcnt() == 0 && // Dead?
0N/A n != C->top() && // (ignore TOP, it has no du info)
0N/A !n->is_Proj() ) { // fat-proj kills
0N/A j -= yank_if_dead(n,b,&value,&regnd);
0N/A continue;
0N/A }
0N/A
0N/A // Improve reaching-def info. Occasionally post-alloc's liveness gives
0N/A // up (at loop backedges, because we aren't doing a full flow pass).
0N/A // The presence of a live use essentially asserts that the use's def is
0N/A // alive and well at the use (or else the allocator fubar'd). Take
0N/A // advantage of this info to set a reaching def for the use-reg.
0N/A uint k;
0N/A for( k = 1; k < n->req(); k++ ) {
0N/A Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE
0N/A guarantee(def != NULL, "no disconnected nodes at this point");
0N/A uint useidx = n2lidx(def); // useidx is the live range index for this USE
0N/A
0N/A if( useidx ) {
0N/A OptoReg::Name ureg = lrgs(useidx).reg();
0N/A if( !value[ureg] ) {
0N/A int idx; // Skip occasional useless copy
0N/A while( (idx=def->is_Copy()) != 0 &&
0N/A def->in(idx) != NULL && // NULL should not happen
0N/A ureg == lrgs(n2lidx(def->in(idx))).reg() )
0N/A def = def->in(idx);
0N/A Node *valdef = skip_copies(def); // tighten up val through non-useless copies
0N/A value.map(ureg,valdef); // record improved reaching-def info
0N/A regnd.map(ureg, def);
0N/A // Record other half of doubles
3845N/A uint def_ideal_reg = def->ideal_reg();
3845N/A int n_regs = RegMask::num_registers(def_ideal_reg);
3845N/A for (int l = 1; l < n_regs; l++) {
3845N/A OptoReg::Name ureg_lo = OptoReg::add(ureg,-l);
3845N/A if (!value[ureg_lo] &&
3845N/A (!RegMask::can_represent(ureg_lo) ||
3845N/A lrgs(useidx).mask().Member(ureg_lo))) { // Nearly always adjacent
3845N/A value.map(ureg_lo,valdef); // record improved reaching-def info
3845N/A regnd.map(ureg_lo, def);
3845N/A }
0N/A }
0N/A }
0N/A }
0N/A }
0N/A
0N/A const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0;
0N/A
0N/A // Remove copies along input edges
0N/A for( k = 1; k < n->req(); k++ )
0N/A j -= elide_copy( n, k, b, value, regnd, two_adr!=k );
0N/A
0N/A // Unallocated Nodes define no registers
0N/A uint lidx = n2lidx(n);
0N/A if( !lidx ) continue;
0N/A
0N/A // Update the register defined by this instruction
0N/A OptoReg::Name nreg = lrgs(lidx).reg();
0N/A // Skip through all copies to the _value_ being defined.
0N/A // Do not change from int to pointer
0N/A Node *val = skip_copies(n);
0N/A
923N/A // Clear out a dead definition before starting so that the
923N/A // elimination code doesn't have to guard against it. The
923N/A // definition could in fact be a kill projection with a count of
923N/A // 0 which is safe but since those are uninteresting for copy
923N/A // elimination just delete them as well.
923N/A if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) {
923N/A regnd.map(nreg, NULL);
923N/A value.map(nreg, NULL);
923N/A }
923N/A
0N/A uint n_ideal_reg = n->ideal_reg();
3845N/A int n_regs = RegMask::num_registers(n_ideal_reg);
3845N/A if (n_regs == 1) {
0N/A // If Node 'n' does not change the value mapped by the register,
0N/A // then 'n' is a useless copy. Do not update the register->node
0N/A // mapping so 'n' will go dead.
0N/A if( value[nreg] != val ) {
70N/A if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) {
923N/A j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
0N/A } else {
0N/A // Update the mapping: record new Node defined by the register
0N/A regnd.map(nreg,n);
0N/A // Update mapping for defined *value*, which is the defined
0N/A // Node after skipping all copies.
0N/A value.map(nreg,val);
0N/A }
923N/A } else if( !may_be_copy_of_callee(n) ) {
0N/A assert( n->is_Copy(), "" );
923N/A j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
0N/A }
3845N/A } else if (RegMask::is_vector(n_ideal_reg)) {
3845N/A // If Node 'n' does not change the value mapped by the register,
3845N/A // then 'n' is a useless copy. Do not update the register->node
3845N/A // mapping so 'n' will go dead.
3845N/A if (!register_contains_value(val, nreg, n_regs, value)) {
3845N/A // Update the mapping: record new Node defined by the register
3845N/A regnd.map(nreg,n);
3845N/A // Update mapping for defined *value*, which is the defined
3845N/A // Node after skipping all copies.
3845N/A value.map(nreg,val);
3845N/A for (int l = 1; l < n_regs; l++) {
3845N/A OptoReg::Name nreg_lo = OptoReg::add(nreg,-l);
3845N/A regnd.map(nreg_lo, n );
3845N/A value.map(nreg_lo,val);
3845N/A }
3845N/A } else if (n->is_Copy()) {
3845N/A // Note: vector can't be constant and can't be copy of calee.
3845N/A j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
3845N/A }
0N/A } else {
0N/A // If the value occupies a register pair, record same info
0N/A // in both registers.
0N/A OptoReg::Name nreg_lo = OptoReg::add(nreg,-1);
0N/A if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or
0N/A !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent
0N/A // Sparc occasionally has non-adjacent pairs.
0N/A // Find the actual other value
0N/A RegMask tmp = lrgs(lidx).mask();
0N/A tmp.Remove(nreg);
0N/A nreg_lo = tmp.find_first_elem();
0N/A }
0N/A if( value[nreg] != val || value[nreg_lo] != val ) {
70N/A if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) {
923N/A j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
0N/A } else {
0N/A regnd.map(nreg , n );
0N/A regnd.map(nreg_lo, n );
0N/A value.map(nreg ,val);
0N/A value.map(nreg_lo,val);
0N/A }
923N/A } else if( !may_be_copy_of_callee(n) ) {
0N/A assert( n->is_Copy(), "" );
923N/A j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
0N/A }
0N/A }
0N/A
0N/A // Fat projections kill many registers
0N/A if( n_ideal_reg == MachProjNode::fat_proj ) {
0N/A RegMask rm = n->out_RegMask();
0N/A // wow, what an expensive iterator...
0N/A nreg = rm.find_first_elem();
0N/A while( OptoReg::is_valid(nreg)) {
0N/A rm.Remove(nreg);
0N/A value.map(nreg,n);
0N/A regnd.map(nreg,n);
0N/A nreg = rm.find_first_elem();
0N/A }
0N/A }
0N/A
0N/A } // End of for all instructions in the block
0N/A
0N/A } // End for all blocks
0N/A}