mulnode.cpp revision 1472
2038N/A/*
3528N/A * Copyright (c) 1997, 2009, Oracle and/or its affiliates. All rights reserved.
2038N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
2038N/A *
2038N/A * This code is free software; you can redistribute it and/or modify it
2038N/A * under the terms of the GNU General Public License version 2 only, as
2362N/A * published by the Free Software Foundation.
2038N/A *
2362N/A * This code is distributed in the hope that it will be useful, but WITHOUT
2038N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
2038N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
2038N/A * version 2 for more details (a copy is included in the LICENSE file that
2038N/A * accompanied this code).
2038N/A *
2038N/A * You should have received a copy of the GNU General Public License version
2038N/A * 2 along with this work; if not, write to the Free Software Foundation,
2038N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
2038N/A *
2038N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
2038N/A * or visit www.oracle.com if you need additional information or have any
2362N/A * questions.
2362N/A *
2362N/A */
2038N/A
2038N/A// Portions of code courtesy of Clifford Click
2038N/A
3793N/A#include "incls/_precompiled.incl"
3907N/A#include "incls/_mulnode.cpp.incl"
3907N/A
2038N/A
2038N/A//=============================================================================
3793N/A//------------------------------hash-------------------------------------------
2038N/A// Hash function over MulNodes. Needs to be commutative; i.e., I swap
3793N/A// (commute) inputs to MulNodes willy-nilly so the hash function must return
3793N/A// the same value in the presence of edge swapping.
2038N/Auint MulNode::hash() const {
2038N/A return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
2038N/A}
2038N/A
2038N/A//------------------------------Identity---------------------------------------
2038N/A// Multiplying a one preserves the other argument
2038N/ANode *MulNode::Identity( PhaseTransform *phase ) {
2038N/A register const Type *one = mul_id(); // The multiplicative identity
2038N/A if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
2038N/A if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
2038N/A
5452N/A return this;
2038N/A}
2431N/A
2435N/A//------------------------------Ideal------------------------------------------
5452N/A// We also canonicalize the Node, moving constants to the right input,
5452N/A// and flatten expressions (so that 1+x+2 becomes x+3).
5452N/ANode *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
2435N/A const Type *t1 = phase->type( in(1) );
2435N/A const Type *t2 = phase->type( in(2) );
2038N/A Node *progress = NULL; // Progress flag
2038N/A // We are OK if right is a constant, or right is a load and
2038N/A // left is a non-constant.
2038N/A if( !(t2->singleton() ||
2038N/A (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
2038N/A if( t1->singleton() || // Left input is a constant?
2038N/A // Otherwise, sort inputs (commutativity) to help value numbering.
5452N/A (in(1)->_idx > in(2)->_idx) ) {
5452N/A swap_edges(1, 2);
5452N/A const Type *t = t1;
2038N/A t1 = t2;
2038N/A t2 = t;
2038N/A progress = this; // Made progress
2038N/A }
2038N/A }
2431N/A
2038N/A // If the right input is a constant, and the left input is a product of a
2038N/A // constant, flatten the expression tree.
2040N/A uint op = Opcode();
5452N/A if( t2->singleton() && // Right input is a constant?
2040N/A op != Op_MulF && // Float & double cannot reassociate
2431N/A op != Op_MulD ) {
2040N/A if( t2 == Type::TOP ) return NULL;
2040N/A Node *mul1 = in(1);
5452N/A#ifdef ASSERT
2040N/A // Check for dead loop
2040N/A int op1 = mul1->Opcode();
2040N/A if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
2040N/A ( op1 == mul_opcode() || op1 == add_opcode() ) &&
5452N/A ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
2040N/A phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
2431N/A assert(false, "dead loop in MulNode::Ideal");
2040N/A#endif
2040N/A
5452N/A if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
2040N/A // Mul of a constant?
2431N/A const Type *t12 = phase->type( mul1->in(2) );
2040N/A if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
2040N/A // Compute new constant; check for overflow
5452N/A const Type *tcon01 = mul1->as_Mul()->mul_ring(t2,t12);
2040N/A if( tcon01->singleton() ) {
2431N/A // The Mul of the flattened expression
2040N/A set_req(1, mul1->in(1));
2040N/A set_req(2, phase->makecon( tcon01 ));
5452N/A t2 = tcon01;
2040N/A progress = this; // Made progress
2431N/A }
2431N/A }
2040N/A }
5452N/A // If the right input is a constant, and the left input is an add of a
4250N/A // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
4250N/A const Node *add1 = in(1);
4250N/A if( add1->Opcode() == add_opcode() ) { // Left input is an add?
4250N/A // Add of a constant?
4250N/A const Type *t12 = phase->type( add1->in(2) );
4250N/A if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
4250N/A assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
4250N/A // Compute new constant; check for overflow
4250N/A const Type *tcon01 = mul_ring(t2,t12);
4250N/A if( tcon01->singleton() ) {
4250N/A
4250N/A // Convert (X+con1)*con0 into X*con0
4250N/A Node *mul = clone(); // mul = ()*con0
4250N/A mul->set_req(1,add1->in(1)); // mul = X*con0
4250N/A mul = phase->transform(mul);
4250N/A
4250N/A Node *add2 = add1->clone();
4250N/A add2->set_req(1, mul); // X*con0 + con0*con1
4250N/A add2->set_req(2, phase->makecon(tcon01) );
4250N/A progress = add2;
4250N/A }
4250N/A }
5452N/A } // End of is left input an add
4250N/A } // End of is right input a Mul
2038N/A
2038N/A return progress;
2038N/A}
2038N/A
2038N/A//------------------------------Value-----------------------------------------
2038N/Aconst Type *MulNode::Value( PhaseTransform *phase ) const {
2435N/A const Type *t1 = phase->type( in(1) );
2038N/A const Type *t2 = phase->type( in(2) );
2038N/A // Either input is TOP ==> the result is TOP
2038N/A if( t1 == Type::TOP ) return Type::TOP;
2431N/A if( t2 == Type::TOP ) return Type::TOP;
2038N/A
2038N/A // Either input is ZERO ==> the result is ZERO.
2038N/A // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
2435N/A int op = Opcode();
2435N/A if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
2431N/A const Type *zero = add_id(); // The multiplicative zero
2038N/A if( t1->higher_equal( zero ) ) return zero;
2038N/A if( t2->higher_equal( zero ) ) return zero;
2038N/A }
2038N/A
2038N/A // Either input is BOTTOM ==> the result is the local BOTTOM
2038N/A if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
2038N/A return bottom_type();
2038N/A
2038N/A#if defined(IA32)
2431N/A // Can't trust native compilers to properly fold strict double
2038N/A // multiplication with round-to-zero on this platform.
2038N/A if (op == Op_MulD && phase->C->method()->is_strict()) {
2038N/A return TypeD::DOUBLE;
2038N/A }
2038N/A#endif
2038N/A
2038N/A return mul_ring(t1,t2); // Local flavor of type multiplication
2038N/A}
2038N/A
2431N/A
2038N/A//=============================================================================
2038N/A//------------------------------Ideal------------------------------------------
2038N/A// Check for power-of-2 multiply, then try the regular MulNode::Ideal
2038N/ANode *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
2435N/A // Swap constant to right
5452N/A jint con;
2435N/A if ((con = in(1)->find_int_con(0)) != 0) {
2435N/A swap_edges(1, 2);
2435N/A // Finish rest of method to use info in 'con'
2435N/A } else if ((con = in(2)->find_int_con(0)) == 0) {
2038N/A return MulNode::Ideal(phase, can_reshape);
2038N/A }
5455N/A
2038N/A // Now we have a constant Node on the right and the constant in con
2038N/A if( con == 0 ) return NULL; // By zero is handled by Value call
2038N/A if( con == 1 ) return NULL; // By one is handled by Identity call
2038N/A
2038N/A // Check for negative constant; if so negate the final result
2038N/A bool sign_flip = false;
2038N/A if( con < 0 ) {
2038N/A con = -con;
2038N/A sign_flip = true;
2038N/A }
2038N/A
2431N/A // Get low bit; check for being the only bit
2038N/A Node *res = NULL;
2038N/A jint bit1 = con & -con; // Extract low bit
2038N/A if( bit1 == con ) { // Found a power of 2?
2038N/A res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
2038N/A } else {
2038N/A
2038N/A // Check for constant with 2 bits set
2038N/A jint bit2 = con-bit1;
2431N/A bit2 = bit2 & -bit2; // Extract 2nd bit
2431N/A if( bit2 + bit1 == con ) { // Found all bits in con?
2038N/A Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
2038N/A Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
2038N/A res = new (phase->C, 3) AddINode( n2, n1 );
2038N/A
2038N/A } else if (is_power_of_2(con+1)) {
2038N/A // Sleezy: power-of-2 -1. Next time be generic.
2038N/A jint temp = (jint) (con + 1);
2038N/A Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
2038N/A res = new (phase->C, 3) SubINode( n1, in(1) );
2038N/A } else {
2038N/A return MulNode::Ideal(phase, can_reshape);
2038N/A }
5455N/A }
2038N/A
2038N/A if( sign_flip ) { // Need to negate result?
2038N/A res = phase->transform(res);// Transform, before making the zero con
2038N/A res = new (phase->C, 3) SubINode(phase->intcon(0),res);
2038N/A }
2038N/A
2038N/A return res; // Return final result
2038N/A}
2038N/A
2038N/A//------------------------------mul_ring---------------------------------------
2038N/A// Compute the product type of two integer ranges into this node.
2038N/Aconst Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
2038N/A const TypeInt *r0 = t0->is_int(); // Handy access
2040N/A const TypeInt *r1 = t1->is_int();
2040N/A
2040N/A // Fetch endpoints of all ranges
2040N/A int32 lo0 = r0->_lo;
2038N/A double a = (double)lo0;
2038N/A int32 hi0 = r0->_hi;
2038N/A double b = (double)hi0;
2431N/A int32 lo1 = r1->_lo;
2431N/A double c = (double)lo1;
2431N/A int32 hi1 = r1->_hi;
2431N/A double d = (double)hi1;
2431N/A
2431N/A // Compute all endpoints & check for overflow
2431N/A int32 A = lo0*lo1;
2431N/A if( (double)A != a*c ) return TypeInt::INT; // Overflow?
2431N/A int32 B = lo0*hi1;
2431N/A if( (double)B != a*d ) return TypeInt::INT; // Overflow?
2431N/A int32 C = hi0*lo1;
2431N/A if( (double)C != b*c ) return TypeInt::INT; // Overflow?
2431N/A int32 D = hi0*hi1;
2431N/A if( (double)D != b*d ) return TypeInt::INT; // Overflow?
2431N/A
2431N/A if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
2431N/A else { lo0 = B; hi0 = A; }
2431N/A if( C < D ) {
2431N/A if( C < lo0 ) lo0 = C;
2431N/A if( D > hi0 ) hi0 = D;
2431N/A } else {
2431N/A if( D < lo0 ) lo0 = D;
2431N/A if( C > hi0 ) hi0 = C;
2431N/A }
2431N/A return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
2431N/A}
2431N/A
2431N/A
2431N/A//=============================================================================
2431N/A//------------------------------Ideal------------------------------------------
2431N/A// Check for power-of-2 multiply, then try the regular MulNode::Ideal
2038N/ANode *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
2431N/A // Swap constant to right
2038N/A jlong con;
2038N/A if ((con = in(1)->find_long_con(0)) != 0) {
2038N/A swap_edges(1, 2);
3793N/A // Finish rest of method to use info in 'con'
2038N/A } else if ((con = in(2)->find_long_con(0)) == 0) {
2038N/A return MulNode::Ideal(phase, can_reshape);
2038N/A }
2038N/A
2038N/A // Now we have a constant Node on the right and the constant in con
3012N/A if( con == CONST64(0) ) return NULL; // By zero is handled by Value call
3012N/A if( con == CONST64(1) ) return NULL; // By one is handled by Identity call
3012N/A
3012N/A // Check for negative constant; if so negate the final result
3012N/A bool sign_flip = false;
3012N/A if( con < 0 ) {
2038N/A con = -con;
2431N/A sign_flip = true;
2038N/A }
2038N/A
2038N/A // Get low bit; check for being the only bit
5455N/A Node *res = NULL;
2038N/A jlong bit1 = con & -con; // Extract low bit
2038N/A if( bit1 == con ) { // Found a power of 2?
2038N/A res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
2038N/A } else {
2038N/A
2038N/A // Check for constant with 2 bits set
2038N/A jlong bit2 = con-bit1;
2038N/A bit2 = bit2 & -bit2; // Extract 2nd bit
2038N/A if( bit2 + bit1 == con ) { // Found all bits in con?
2038N/A Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
2038N/A Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
2038N/A res = new (phase->C, 3) AddLNode( n2, n1 );
2038N/A
2038N/A } else if (is_power_of_2_long(con+1)) {
2038N/A // Sleezy: power-of-2 -1. Next time be generic.
2038N/A jlong temp = (jlong) (con + 1);
5455N/A Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
2038N/A res = new (phase->C, 3) SubLNode( n1, in(1) );
2038N/A } else {
2038N/A return MulNode::Ideal(phase, can_reshape);
5455N/A }
2038N/A }
2038N/A
2038N/A if( sign_flip ) { // Need to negate result?
2038N/A res = phase->transform(res);// Transform, before making the zero con
2038N/A res = new (phase->C, 3) SubLNode(phase->longcon(0),res);
2038N/A }
2038N/A
2038N/A return res; // Return final result
2038N/A}
2038N/A
2038N/A//------------------------------mul_ring---------------------------------------
2038N/A// Compute the product type of two integer ranges into this node.
2038N/Aconst Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
2038N/A const TypeLong *r0 = t0->is_long(); // Handy access
2038N/A const TypeLong *r1 = t1->is_long();
2038N/A
2038N/A // Fetch endpoints of all ranges
2038N/A jlong lo0 = r0->_lo;
2038N/A double a = (double)lo0;
2038N/A jlong hi0 = r0->_hi;
2038N/A double b = (double)hi0;
2038N/A jlong lo1 = r1->_lo;
2038N/A double c = (double)lo1;
2038N/A jlong hi1 = r1->_hi;
2038N/A double d = (double)hi1;
2038N/A
2038N/A // Compute all endpoints & check for overflow
3529N/A jlong A = lo0*lo1;
3529N/A if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
3529N/A jlong B = lo0*hi1;
3529N/A if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
3529N/A jlong C = hi0*lo1;
3529N/A if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
3529N/A jlong D = hi0*hi1;
3529N/A if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
4183N/A
4183N/A if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
4183N/A else { lo0 = B; hi0 = A; }
3529N/A if( C < D ) {
3529N/A if( C < lo0 ) lo0 = C;
3529N/A if( D > hi0 ) hi0 = D;
3529N/A } else {
3529N/A if( D < lo0 ) lo0 = D;
3529N/A if( C > hi0 ) hi0 = C;
3529N/A }
3529N/A return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
3529N/A}
3529N/A
3529N/A//=============================================================================
5455N/A//------------------------------mul_ring---------------------------------------
3529N/A// Compute the product type of two double ranges into this node.
3529N/Aconst Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
3529N/A if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
3529N/A return TypeF::make( t0->getf() * t1->getf() );
3529N/A}
3529N/A
5455N/A//=============================================================================
3529N/A//------------------------------mul_ring---------------------------------------
3529N/A// Compute the product type of two double ranges into this node.
3529N/Aconst Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
3529N/A if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
3529N/A // We must be multiplying 2 double constants.
3529N/A return TypeD::make( t0->getd() * t1->getd() );
3529N/A}
3529N/A
5455N/A//=============================================================================
5455N/A//------------------------------Value------------------------------------------
3529N/Aconst Type *MulHiLNode::Value( PhaseTransform *phase ) const {
2038N/A // Either input is TOP ==> the result is TOP
2038N/A const Type *t1 = phase->type( in(1) );
2038N/A const Type *t2 = phase->type( in(2) );
2038N/A if( t1 == Type::TOP ) return Type::TOP;
2038N/A if( t2 == Type::TOP ) return Type::TOP;
2038N/A
2038N/A // Either input is BOTTOM ==> the result is the local BOTTOM
5455N/A const Type *bot = bottom_type();
2038N/A if( (t1 == bot) || (t2 == bot) ||
2040N/A (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
4250N/A return bot;
2038N/A
5452N/A // It is not worth trying to constant fold this stuff!
5452N/A return TypeLong::LONG;
5452N/A}
5452N/A
5452N/A//=============================================================================
5452N/A//------------------------------mul_ring---------------------------------------
5452N/A// Supplied function returns the product of the inputs IN THE CURRENT RING.
2038N/A// For the logical operations the ring's MUL is really a logical AND function.
2038N/A// This also type-checks the inputs for sanity. Guaranteed never to
2038N/A// be passed a TOP or BOTTOM type, these are filtered out by pre-check.
2038N/Aconst Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
2038N/A const TypeInt *r0 = t0->is_int(); // Handy access
2038N/A const TypeInt *r1 = t1->is_int();
2040N/A int widen = MAX2(r0->_widen,r1->_widen);
2038N/A
2038N/A // If either input is a constant, might be able to trim cases
2038N/A if( !r0->is_con() && !r1->is_con() )
2038N/A return TypeInt::INT; // No constants to be had
2431N/A
2038N/A // Both constants? Return bits
5455N/A if( r0->is_con() && r1->is_con() )
2038N/A return TypeInt::make( r0->get_con() & r1->get_con() );
2038N/A
2038N/A if( r0->is_con() && r0->get_con() > 0 )
2038N/A return TypeInt::make(0, r0->get_con(), widen);
2038N/A
2038N/A if( r1->is_con() && r1->get_con() > 0 )
2038N/A return TypeInt::make(0, r1->get_con(), widen);
2038N/A
2038N/A if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
2038N/A return TypeInt::BOOL;
2038N/A }
2038N/A
2038N/A return TypeInt::INT; // No constants to be had
2038N/A}
2038N/A
2038N/A//------------------------------Identity---------------------------------------
2038N/A// Masking off the high bits of an unsigned load is not required
2038N/ANode *AndINode::Identity( PhaseTransform *phase ) {
2038N/A
2038N/A // x & x => x
2038N/A if (phase->eqv(in(1), in(2))) return in(1);
2038N/A
2431N/A Node* in1 = in(1);
5452N/A uint op = in1->Opcode();
5452N/A const TypeInt* t2 = phase->type(in(2))->isa_int();
5452N/A if (t2 && t2->is_con()) {
5452N/A int con = t2->get_con();
2431N/A // Masking off high bits which are always zero is useless.
2038N/A const TypeInt* t1 = phase->type( in(1) )->isa_int();
2431N/A if (t1 != NULL && t1->_lo >= 0) {
2038N/A jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
2431N/A if ((t1_support & con) == t1_support)
2038N/A return in1;
2038N/A }
2038N/A // Masking off the high bits of a unsigned-shift-right is not
2038N/A // needed either.
5455N/A if (op == Op_URShiftI) {
2038N/A const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
2431N/A if (t12 && t12->is_con()) { // Shift is by a constant
2038N/A int shift = t12->get_con();
2038N/A shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
2038N/A int mask = max_juint >> shift;
3012N/A if ((mask & con) == mask) // If AND is useless, skip it
2038N/A return in1;
2038N/A }
2431N/A }
2431N/A }
2038N/A return MulNode::Identity(phase);
2038N/A}
2038N/A
2038N/A//------------------------------Ideal------------------------------------------
2431N/ANode *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
2431N/A // Special case constant AND mask
2431N/A const TypeInt *t2 = phase->type( in(2) )->isa_int();
2431N/A if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
2038N/A const int mask = t2->get_con();
2038N/A Node *load = in(1);
2431N/A uint lop = load->Opcode();
2431N/A
2431N/A // Masking bits off of a Character? Hi bits are already zero.
2431N/A if( lop == Op_LoadUS &&
2431N/A (mask & 0xFFFF0000) ) // Can we make a smaller mask?
2431N/A return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF));
2040N/A
2040N/A // Masking bits off of a Short? Loading a Character does some masking
2040N/A if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
2040N/A Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control),
2431N/A load->in(MemNode::Memory),
2431N/A load->in(MemNode::Address),
2431N/A load->adr_type());
2040N/A ldus = phase->transform(ldus);
2431N/A return new (phase->C, 3) AndINode(ldus, phase->intcon(mask & 0xFFFF));
2431N/A }
2431N/A
2431N/A // Masking sign bits off of a Byte? Do an unsigned byte load plus
2431N/A // an and.
2431N/A if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
2038N/A Node* ldub = new (phase->C, 3) LoadUBNode(load->in(MemNode::Control),
2038N/A load->in(MemNode::Memory),
2038N/A load->in(MemNode::Address),
2038N/A load->adr_type());
2038N/A ldub = phase->transform(ldub);
2038N/A return new (phase->C, 3) AndINode(ldub, phase->intcon(mask));
2038N/A }
2038N/A
2038N/A // Masking off sign bits? Dont make them!
2038N/A if( lop == Op_RShiftI ) {
2038N/A const TypeInt *t12 = phase->type(load->in(2))->isa_int();
2038N/A if( t12 && t12->is_con() ) { // Shift is by a constant
2038N/A int shift = t12->get_con();
2038N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
2038N/A const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
2038N/A // If the AND'ing of the 2 masks has no bits, then only original shifted
2038N/A // bits survive. NO sign-extension bits survive the maskings.
2038N/A if( (sign_bits_mask & mask) == 0 ) {
2038N/A // Use zero-fill shift instead
2038N/A Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2)));
2038N/A return new (phase->C, 3) AndINode( zshift, in(2) );
2038N/A }
2038N/A }
2038N/A }
2038N/A
2038N/A // Check for 'negate/and-1', a pattern emitted when someone asks for
2038N/A // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
2038N/A // plus 1) and the mask is of the low order bit. Skip the negate.
2038N/A if( lop == Op_SubI && mask == 1 && load->in(1) &&
2038N/A phase->type(load->in(1)) == TypeInt::ZERO )
2038N/A return new (phase->C, 3) AndINode( load->in(2), in(2) );
2038N/A
2040N/A return MulNode::Ideal(phase, can_reshape);
2038N/A}
3011N/A
2038N/A//=============================================================================
2431N/A//------------------------------mul_ring---------------------------------------
3240N/A// Supplied function returns the product of the inputs IN THE CURRENT RING.
3530N/A// For the logical operations the ring's MUL is really a logical AND function.
2038N/A// This also type-checks the inputs for sanity. Guaranteed never to
3530N/A// be passed a TOP or BOTTOM type, these are filtered out by pre-check.
3530N/Aconst Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
3530N/A const TypeLong *r0 = t0->is_long(); // Handy access
3530N/A const TypeLong *r1 = t1->is_long();
2038N/A int widen = MAX2(r0->_widen,r1->_widen);
2431N/A
2431N/A // If either input is a constant, might be able to trim cases
2038N/A if( !r0->is_con() && !r1->is_con() )
2038N/A return TypeLong::LONG; // No constants to be had
2038N/A
2038N/A // Both constants? Return bits
2038N/A if( r0->is_con() && r1->is_con() )
3240N/A return TypeLong::make( r0->get_con() & r1->get_con() );
2038N/A
2038N/A if( r0->is_con() && r0->get_con() > 0 )
3240N/A return TypeLong::make(CONST64(0), r0->get_con(), widen);
2038N/A
2431N/A if( r1->is_con() && r1->get_con() > 0 )
2431N/A return TypeLong::make(CONST64(0), r1->get_con(), widen);
2038N/A
2038N/A return TypeLong::LONG; // No constants to be had
4245N/A}
4245N/A
3240N/A//------------------------------Identity---------------------------------------
4245N/A// Masking off the high bits of an unsigned load is not required
4245N/ANode *AndLNode::Identity( PhaseTransform *phase ) {
4245N/A
4245N/A // x & x => x
4245N/A if (phase->eqv(in(1), in(2))) return in(1);
4245N/A
3240N/A Node *usr = in(1);
3240N/A const TypeLong *t2 = phase->type( in(2) )->isa_long();
3240N/A if( t2 && t2->is_con() ) {
3240N/A jlong con = t2->get_con();
2038N/A // Masking off high bits which are always zero is useless.
2038N/A const TypeLong* t1 = phase->type( in(1) )->isa_long();
2038N/A if (t1 != NULL && t1->_lo >= 0) {
2038N/A jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1;
2038N/A if ((t1_support & con) == t1_support)
2038N/A return usr;
2038N/A }
2038N/A uint lop = usr->Opcode();
2038N/A // Masking off the high bits of a unsigned-shift-right is not
2038N/A // needed either.
2038N/A if( lop == Op_URShiftL ) {
2038N/A const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
2038N/A if( t12 && t12->is_con() ) { // Shift is by a constant
2038N/A int shift = t12->get_con();
2038N/A shift &= BitsPerJavaLong - 1; // semantics of Java shifts
2038N/A jlong mask = max_julong >> shift;
2038N/A if( (mask&con) == mask ) // If AND is useless, skip it
2038N/A return usr;
2038N/A }
2038N/A }
2038N/A }
2038N/A return MulNode::Identity(phase);
2038N/A}
2038N/A
2038N/A//------------------------------Ideal------------------------------------------
2038N/ANode *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
2038N/A // Special case constant AND mask
2038N/A const TypeLong *t2 = phase->type( in(2) )->isa_long();
2038N/A if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
2038N/A const jlong mask = t2->get_con();
2038N/A
2038N/A Node* in1 = in(1);
2038N/A uint op = in1->Opcode();
2038N/A
2038N/A // Masking sign bits off of an integer? Do an unsigned integer to
2038N/A // long load.
2038N/A // NOTE: This check must be *before* we try to convert the AndLNode
2038N/A // to an AndINode and commute it with ConvI2LNode because
2040N/A // 0xFFFFFFFFL masks the whole integer and we get a sign extension,
2038N/A // which is wrong.
3011N/A if (op == Op_ConvI2L && in1->in(1)->Opcode() == Op_LoadI && mask == CONST64(0x00000000FFFFFFFF)) {
2038N/A Node* load = in1->in(1);
2431N/A return new (phase->C, 3) LoadUI2LNode(load->in(MemNode::Control),
3240N/A load->in(MemNode::Memory),
3530N/A load->in(MemNode::Address),
2038N/A load->adr_type());
3530N/A }
3530N/A
3530N/A // Are we masking a long that was converted from an int with a mask
3530N/A // that fits in 32-bits? Commute them and use an AndINode. Don't
2038N/A // convert masks which would cause a sign extension of the integer
2431N/A // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
2431N/A // would be optimized away later in Identity.
2038N/A if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) {
2038N/A Node* andi = new (phase->C, 3) AndINode(in1->in(1), phase->intcon(mask));
2038N/A andi = phase->transform(andi);
2038N/A return new (phase->C, 2) ConvI2LNode(andi);
2038N/A }
2040N/A
2431N/A // Masking off sign bits? Dont make them!
3240N/A if (op == Op_RShiftL) {
2038N/A const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
2038N/A if( t12 && t12->is_con() ) { // Shift is by a constant
2038N/A int shift = t12->get_con();
3240N/A shift &= BitsPerJavaLong - 1; // semantics of Java shifts
2038N/A const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
2431N/A // If the AND'ing of the 2 masks has no bits, then only original shifted
2431N/A // bits survive. NO sign-extension bits survive the maskings.
2038N/A if( (sign_bits_mask & mask) == 0 ) {
2038N/A // Use zero-fill shift instead
2038N/A Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(in1->in(1), in1->in(2)));
2038N/A return new (phase->C, 3) AndLNode(zshift, in(2));
2038N/A }
2038N/A }
2431N/A }
2431N/A
2431N/A return MulNode::Ideal(phase, can_reshape);
3530N/A}
3530N/A
2431N/A//=============================================================================
2431N/A//------------------------------Identity---------------------------------------
2431N/ANode *LShiftINode::Identity( PhaseTransform *phase ) {
2431N/A const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
2431N/A return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
2038N/A}
2038N/A
2431N/A//------------------------------Ideal------------------------------------------
2431N/A// If the right input is a constant, and the left input is an add of a
2431N/A// constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
2431N/ANode *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
2431N/A const Type *t = phase->type( in(2) );
2431N/A if( t == Type::TOP ) return NULL; // Right input is dead
2038N/A const TypeInt *t2 = t->isa_int();
2431N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
2431N/A const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
2038N/A
2040N/A if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
2038N/A
3011N/A // Left input is an add of a constant?
2038N/A Node *add1 = in(1);
2431N/A int add1_op = add1->Opcode();
3240N/A if( add1_op == Op_AddI ) { // Left input is an add?
3240N/A assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
3530N/A const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
2038N/A if( t12 && t12->is_con() ){ // Left input is an add of a con?
3530N/A // Transform is legal, but check for profit. Avoid breaking 'i2s'
3530N/A // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
3530N/A if( con < 16 ) {
3530N/A // Compute X << con0
2038N/A Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) );
2431N/A // Compute X<<con0 + (con1<<con0)
2431N/A return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con));
2431N/A }
2431N/A }
2038N/A }
2038N/A
2038N/A // Check for "(x>>c0)<<c0" which just masks off low bits
2431N/A if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
2431N/A add1->in(2) == in(2) )
2431N/A // Convert to "(x & -(1<<c0))"
2040N/A return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con)));
3240N/A
2038N/A // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
2038N/A if( add1_op == Op_AndI ) {
3240N/A Node *add2 = add1->in(1);
2038N/A int add2_op = add2->Opcode();
2038N/A if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
2038N/A add2->in(2) == in(2) ) {
2038N/A // Convert to "(x & (Y<<c0))"
5452N/A Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) );
5452N/A return new (phase->C, 3) AndINode( add2->in(1), y_sh );
5452N/A }
5452N/A }
5452N/A
5452N/A // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
5452N/A // before shifting them away.
5452N/A const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
5452N/A if( add1_op == Op_AndI &&
5452N/A phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
5452N/A return new (phase->C, 3) LShiftINode( add1->in(1), in(2) );
5452N/A
5452N/A return NULL;
5452N/A}
5452N/A
5452N/A//------------------------------Value------------------------------------------
5452N/A// A LShiftINode shifts its input2 left by input1 amount.
5452N/Aconst Type *LShiftINode::Value( PhaseTransform *phase ) const {
5452N/A const Type *t1 = phase->type( in(1) );
5452N/A const Type *t2 = phase->type( in(2) );
5452N/A // Either input is TOP ==> the result is TOP
5452N/A if( t1 == Type::TOP ) return Type::TOP;
5452N/A if( t2 == Type::TOP ) return Type::TOP;
5452N/A
5452N/A // Left input is ZERO ==> the result is ZERO.
5452N/A if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
5452N/A // Shift by zero does nothing
5452N/A if( t2 == TypeInt::ZERO ) return t1;
5452N/A
5452N/A // Either input is BOTTOM ==> the result is BOTTOM
5452N/A if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
5452N/A (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
5452N/A return TypeInt::INT;
5452N/A
5452N/A const TypeInt *r1 = t1->is_int(); // Handy access
5452N/A const TypeInt *r2 = t2->is_int(); // Handy access
5452N/A
2038N/A if (!r2->is_con())
2038N/A return TypeInt::INT;
2038N/A
2038N/A uint shift = r2->get_con();
2038N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
2038N/A // Shift by a multiple of 32 does nothing:
2038N/A if (shift == 0) return t1;
2038N/A
2038N/A // If the shift is a constant, shift the bounds of the type,
2038N/A // unless this could lead to an overflow.
2038N/A if (!r1->is_con()) {
2038N/A jint lo = r1->_lo, hi = r1->_hi;
2038N/A if (((lo << shift) >> shift) == lo &&
2038N/A ((hi << shift) >> shift) == hi) {
2038N/A // No overflow. The range shifts up cleanly.
2038N/A return TypeInt::make((jint)lo << (jint)shift,
2038N/A (jint)hi << (jint)shift,
2038N/A MAX2(r1->_widen,r2->_widen));
2038N/A }
2038N/A return TypeInt::INT;
2038N/A }
2038N/A
2038N/A return TypeInt::make( (jint)r1->get_con() << (jint)shift );
2038N/A}
2038N/A
2038N/A//=============================================================================
2040N/A//------------------------------Identity---------------------------------------
2038N/ANode *LShiftLNode::Identity( PhaseTransform *phase ) {
2038N/A const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
3011N/A return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
2038N/A}
2431N/A
3240N/A//------------------------------Ideal------------------------------------------
3530N/A// If the right input is a constant, and the left input is an add of a
2038N/A// constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
3530N/ANode *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
3530N/A const Type *t = phase->type( in(2) );
3530N/A if( t == Type::TOP ) return NULL; // Right input is dead
3530N/A const TypeInt *t2 = t->isa_int();
2038N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
2431N/A const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
2038N/A
2038N/A if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
2038N/A
2038N/A // Left input is an add of a constant?
2038N/A Node *add1 = in(1);
2038N/A int add1_op = add1->Opcode();
2038N/A if( add1_op == Op_AddL ) { // Left input is an add?
2038N/A // Avoid dead data cycles from dead loops
3240N/A assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
2038N/A const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
2038N/A if( t12 && t12->is_con() ){ // Left input is an add of a con?
2431N/A // Compute X << con0
2431N/A Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) );
2038N/A // Compute X<<con0 + (con1<<con0)
2038N/A return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con));
2038N/A }
2038N/A }
2038N/A
2038N/A // Check for "(x>>c0)<<c0" which just masks off low bits
2038N/A if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
2038N/A add1->in(2) == in(2) )
2038N/A // Convert to "(x & -(1<<c0))"
2038N/A return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
2038N/A
2038N/A // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
2431N/A if( add1_op == Op_AndL ) {
2431N/A Node *add2 = add1->in(1);
2431N/A int add2_op = add2->Opcode();
2431N/A if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
2038N/A add2->in(2) == in(2) ) {
2038N/A // Convert to "(x & (Y<<c0))"
2038N/A Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) );
2038N/A return new (phase->C, 3) AndLNode( add2->in(1), y_sh );
2038N/A }
2038N/A }
2038N/A
2038N/A // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
2038N/A // before shifting them away.
2038N/A const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1);
2038N/A if( add1_op == Op_AndL &&
2038N/A phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
2038N/A return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) );
2431N/A
2038N/A return NULL;
2038N/A}
2431N/A
2431N/A//------------------------------Value------------------------------------------
2431N/A// A LShiftLNode shifts its input2 left by input1 amount.
2431N/Aconst Type *LShiftLNode::Value( PhaseTransform *phase ) const {
2431N/A const Type *t1 = phase->type( in(1) );
2431N/A const Type *t2 = phase->type( in(2) );
2431N/A // Either input is TOP ==> the result is TOP
2431N/A if( t1 == Type::TOP ) return Type::TOP;
2038N/A if( t2 == Type::TOP ) return Type::TOP;
2040N/A
3530N/A // Left input is ZERO ==> the result is ZERO.
2038N/A if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
3011N/A // Shift by zero does nothing
2431N/A if( t2 == TypeInt::ZERO ) return t1;
2431N/A
2038N/A // Either input is BOTTOM ==> the result is BOTTOM
2431N/A if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
2431N/A (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
3240N/A return TypeLong::LONG;
2431N/A
3240N/A const TypeLong *r1 = t1->is_long(); // Handy access
3530N/A const TypeInt *r2 = t2->is_int(); // Handy access
2038N/A
3530N/A if (!r2->is_con())
3530N/A return TypeLong::LONG;
3530N/A
3530N/A uint shift = r2->get_con();
2038N/A shift &= BitsPerJavaLong - 1; // semantics of Java shifts
2431N/A // Shift by a multiple of 64 does nothing:
2431N/A if (shift == 0) return t1;
2431N/A
2431N/A // If the shift is a constant, shift the bounds of the type,
2431N/A // unless this could lead to an overflow.
2431N/A if (!r1->is_con()) {
2038N/A jlong lo = r1->_lo, hi = r1->_hi;
2038N/A if (((lo << shift) >> shift) == lo &&
2038N/A ((hi << shift) >> shift) == hi) {
2431N/A // No overflow. The range shifts up cleanly.
2038N/A return TypeLong::make((jlong)lo << (jint)shift,
2038N/A (jlong)hi << (jint)shift,
2431N/A MAX2(r1->_widen,r2->_widen));
2038N/A }
2040N/A return TypeLong::LONG;
2431N/A }
2431N/A
2431N/A return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
2431N/A}
2431N/A
2431N/A//=============================================================================
2431N/A//------------------------------Identity---------------------------------------
2431N/ANode *RShiftINode::Identity( PhaseTransform *phase ) {
2431N/A const TypeInt *t2 = phase->type(in(2))->isa_int();
2038N/A if( !t2 ) return this;
2038N/A if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
3240N/A return in(1);
2038N/A
2431N/A // Check for useless sign-masking
2431N/A if( in(1)->Opcode() == Op_LShiftI &&
2431N/A in(1)->req() == 3 &&
2431N/A in(1)->in(2) == in(2) &&
2431N/A t2->is_con() ) {
2431N/A uint shift = t2->get_con();
2431N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
2431N/A // Compute masks for which this shifting doesn't change
2431N/A int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
2038N/A int hi = ~lo; // 00007FFF
2038N/A const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
2431N/A if( !t11 ) return this;
2038N/A // Does actual value fit inside of mask?
2431N/A if( lo <= t11->_lo && t11->_hi <= hi )
2038N/A return in(1)->in(1); // Then shifting is a nop
2431N/A }
2431N/A
2431N/A return this;
2431N/A}
2431N/A
2431N/A//------------------------------Ideal------------------------------------------
2431N/ANode *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
2038N/A // Inputs may be TOP if they are dead.
2038N/A const TypeInt *t1 = phase->type( in(1) )->isa_int();
2040N/A if( !t1 ) return NULL; // Left input is an integer
2040N/A const TypeInt *t2 = phase->type( in(2) )->isa_int();
2040N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
2040N/A const TypeInt *t3; // type of in(1).in(2)
2040N/A int shift = t2->get_con();
2040N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
2040N/A
2040N/A if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
2040N/A
2040N/A // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
2040N/A // Such expressions arise normally from shift chains like (byte)(x >> 24).
2040N/A const Node *mask = in(1);
2040N/A if( mask->Opcode() == Op_AndI &&
2040N/A (t3 = phase->type(mask->in(2))->isa_int()) &&
2040N/A t3->is_con() ) {
2040N/A Node *x = mask->in(1);
2040N/A jint maskbits = t3->get_con();
2040N/A // Convert to "(x >> shift) & (mask >> shift)"
2040N/A Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) );
2040N/A return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
2040N/A }
2040N/A
2040N/A // Check for "(short[i] <<16)>>16" which simply sign-extends
2040N/A const Node *shl = in(1);
2040N/A if( shl->Opcode() != Op_LShiftI ) return NULL;
5455N/A
2040N/A if( shift == 16 &&
2040N/A (t3 = phase->type(shl->in(2))->isa_int()) &&
2040N/A t3->is_con(16) ) {
2040N/A Node *ld = shl->in(1);
2040N/A if( ld->Opcode() == Op_LoadS ) {
2040N/A // Sign extension is just useless here. Return a RShiftI of zero instead
2040N/A // returning 'ld' directly. We cannot return an old Node directly as
2040N/A // that is the job of 'Identity' calls and Identity calls only work on
2040N/A // direct inputs ('ld' is an extra Node removed from 'this'). The
2040N/A // combined optimization requires Identity only return direct inputs.
2040N/A set_req(1, ld);
2040N/A set_req(2, phase->intcon(0));
2040N/A return this;
2040N/A }
2040N/A else if( ld->Opcode() == Op_LoadUS )
2040N/A // Replace zero-extension-load with sign-extension-load
4183N/A return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control),
2040N/A ld->in(MemNode::Memory),
5455N/A ld->in(MemNode::Address),
2040N/A ld->adr_type());
2040N/A }
2040N/A
2040N/A // Check for "(byte[i] <<24)>>24" which simply sign-extends
5455N/A if( shift == 24 &&
2040N/A (t3 = phase->type(shl->in(2))->isa_int()) &&
2040N/A t3->is_con(24) ) {
2040N/A Node *ld = shl->in(1);
2040N/A if( ld->Opcode() == Op_LoadB ) {
2040N/A // Sign extension is just useless here
3530N/A set_req(1, ld);
2040N/A set_req(2, phase->intcon(0));
3530N/A return this;
3530N/A }
3530N/A }
2040N/A
2040N/A return NULL;
2040N/A}
3530N/A
3530N/A//------------------------------Value------------------------------------------
2040N/A// A RShiftINode shifts its input2 right by input1 amount.
2040N/Aconst Type *RShiftINode::Value( PhaseTransform *phase ) const {
2040N/A const Type *t1 = phase->type( in(1) );
2040N/A const Type *t2 = phase->type( in(2) );
3530N/A // Either input is TOP ==> the result is TOP
2435N/A if( t1 == Type::TOP ) return Type::TOP;
2435N/A if( t2 == Type::TOP ) return Type::TOP;
3530N/A
2435N/A // Left input is ZERO ==> the result is ZERO.
3530N/A if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
2435N/A // Shift by zero does nothing
3530N/A if( t2 == TypeInt::ZERO ) return t1;
2435N/A
2435N/A // Either input is BOTTOM ==> the result is BOTTOM
2040N/A if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
2038N/A return TypeInt::INT;
2435N/A
2435N/A if (t2 == TypeInt::INT)
2435N/A return TypeInt::INT;
2435N/A
2435N/A const TypeInt *r1 = t1->is_int(); // Handy access
2435N/A const TypeInt *r2 = t2->is_int(); // Handy access
2435N/A
2435N/A // If the shift is a constant, just shift the bounds of the type.
2435N/A // For example, if the shift is 31, we just propagate sign bits.
2435N/A if (r2->is_con()) {
2435N/A uint shift = r2->get_con();
3530N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
2435N/A // Shift by a multiple of 32 does nothing:
2435N/A if (shift == 0) return t1;
2038N/A // Calculate reasonably aggressive bounds for the result.
2040N/A // This is necessary if we are to correctly type things
3530N/A // like (x<<24>>24) == ((byte)x).
3530N/A jint lo = (jint)r1->_lo >> (jint)shift;
3530N/A jint hi = (jint)r1->_hi >> (jint)shift;
3530N/A assert(lo <= hi, "must have valid bounds");
3530N/A const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
3530N/A#ifdef ASSERT
3530N/A // Make sure we get the sign-capture idiom correct.
3530N/A if (shift == BitsPerJavaInteger-1) {
3530N/A if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
3530N/A if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
2040N/A }
2040N/A#endif
3530N/A return ti;
3530N/A }
3530N/A
3530N/A if( !r1->is_con() || !r2->is_con() )
3530N/A return TypeInt::INT;
3530N/A
3530N/A // Signed shift right
5452N/A return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
5452N/A}
3530N/A
3530N/A//=============================================================================
3530N/A//------------------------------Identity---------------------------------------
3530N/ANode *RShiftLNode::Identity( PhaseTransform *phase ) {
3530N/A const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
3530N/A return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
3530N/A}
3530N/A
3530N/A//------------------------------Value------------------------------------------
3530N/A// A RShiftLNode shifts its input2 right by input1 amount.
3530N/Aconst Type *RShiftLNode::Value( PhaseTransform *phase ) const {
3530N/A const Type *t1 = phase->type( in(1) );
3530N/A const Type *t2 = phase->type( in(2) );
3530N/A // Either input is TOP ==> the result is TOP
3530N/A if( t1 == Type::TOP ) return Type::TOP;
3530N/A if( t2 == Type::TOP ) return Type::TOP;
3530N/A
3530N/A // Left input is ZERO ==> the result is ZERO.
3530N/A if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
3530N/A // Shift by zero does nothing
3530N/A if( t2 == TypeInt::ZERO ) return t1;
3530N/A
3530N/A // Either input is BOTTOM ==> the result is BOTTOM
3530N/A if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
2435N/A return TypeLong::LONG;
3530N/A
3530N/A if (t2 == TypeInt::INT)
3530N/A return TypeLong::LONG;
3530N/A
3530N/A const TypeLong *r1 = t1->is_long(); // Handy access
3530N/A const TypeInt *r2 = t2->is_int (); // Handy access
3530N/A
2040N/A // If the shift is a constant, just shift the bounds of the type.
3530N/A // For example, if the shift is 63, we just propagate sign bits.
3530N/A if (r2->is_con()) {
3530N/A uint shift = r2->get_con();
3530N/A shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
3530N/A // Shift by a multiple of 64 does nothing:
3530N/A if (shift == 0) return t1;
3530N/A // Calculate reasonably aggressive bounds for the result.
3530N/A // This is necessary if we are to correctly type things
3530N/A // like (x<<24>>24) == ((byte)x).
3530N/A jlong lo = (jlong)r1->_lo >> (jlong)shift;
3530N/A jlong hi = (jlong)r1->_hi >> (jlong)shift;
3530N/A assert(lo <= hi, "must have valid bounds");
3530N/A const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
3530N/A #ifdef ASSERT
3530N/A // Make sure we get the sign-capture idiom correct.
3530N/A if (shift == (2*BitsPerJavaInteger)-1) {
3530N/A if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
3530N/A if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
3530N/A }
3530N/A #endif
3530N/A return tl;
3530N/A }
3530N/A
3530N/A return TypeLong::LONG; // Give up
3530N/A}
3530N/A
3530N/A//=============================================================================
3530N/A//------------------------------Identity---------------------------------------
3530N/ANode *URShiftINode::Identity( PhaseTransform *phase ) {
3530N/A const TypeInt *ti = phase->type( in(2) )->isa_int();
3530N/A if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
3530N/A
3530N/A // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
3530N/A // Happens during new-array length computation.
2040N/A // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
3240N/A Node *add = in(1);
2040N/A if( add->Opcode() == Op_AddI ) {
2040N/A const TypeInt *t2 = phase->type(add->in(2))->isa_int();
3530N/A if( t2 && t2->is_con(wordSize - 1) &&
3530N/A add->in(1)->Opcode() == Op_LShiftI ) {
3530N/A // Check that shift_counts are LogBytesPerWord
4250N/A Node *lshift_count = add->in(1)->in(2);
4250N/A const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
3530N/A if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
3530N/A t_lshift_count == phase->type(in(2)) ) {
4250N/A Node *x = add->in(1)->in(1);
4250N/A const TypeInt *t_x = phase->type(x)->isa_int();
4250N/A if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
3530N/A return x;
3530N/A }
3530N/A }
3530N/A }
3530N/A }
3530N/A
3530N/A return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
3530N/A}
3530N/A
3530N/A//------------------------------Ideal------------------------------------------
3530N/ANode *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
3530N/A const TypeInt *t2 = phase->type( in(2) )->isa_int();
3530N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
3530N/A const int con = t2->get_con() & 31; // Shift count is always masked
3530N/A if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
3530N/A // We'll be wanting the right-shift amount as a mask of that many bits
3530N/A const int mask = right_n_bits(BitsPerJavaInteger - con);
3530N/A
3530N/A int in1_op = in(1)->Opcode();
3530N/A
3530N/A // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
3530N/A if( in1_op == Op_URShiftI ) {
3530N/A const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
3530N/A if( t12 && t12->is_con() ) { // Right input is a constant
3530N/A assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
3530N/A const int con2 = t12->get_con() & 31; // Shift count is always masked
3530N/A const int con3 = con+con2;
2040N/A if( con3 < 32 ) // Only merge shifts if total is < 32
3530N/A return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) );
3530N/A }
3530N/A }
3530N/A
3530N/A // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
3530N/A // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
3530N/A // If Q is "X << z" the rounding is useless. Look for patterns like
3530N/A // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
3530N/A Node *add = in(1);
3530N/A if( in1_op == Op_AddI ) {
3530N/A Node *lshl = add->in(1);
3530N/A if( lshl->Opcode() == Op_LShiftI &&
3530N/A phase->type(lshl->in(2)) == t2 ) {
3530N/A Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) );
3530N/A Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) );
3530N/A return new (phase->C, 3) AndINode( sum, phase->intcon(mask) );
3530N/A }
3530N/A }
2040N/A
3530N/A // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
3530N/A // This shortens the mask. Also, if we are extracting a high byte and
3530N/A // storing it to a buffer, the mask will be removed completely.
2038N/A Node *andi = in(1);
2038N/A if( in1_op == Op_AndI ) {
2040N/A const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
2040N/A if( t3 && t3->is_con() ) { // Right input is a constant
2038N/A jint mask2 = t3->get_con();
2435N/A mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
2435N/A Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) );
2435N/A return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2));
2435N/A // The negative values are easier to materialize than positive ones.
2435N/A // A typical case from address arithmetic is ((x & ~15) >> 4).
2435N/A // It's better to change that to ((x >> 4) & ~0) versus
2435N/A // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
2435N/A }
2435N/A }
2435N/A
2435N/A // Check for "(X << z ) >>> z" which simply zero-extends
3530N/A Node *shl = in(1);
2435N/A if( in1_op == Op_LShiftI &&
2435N/A phase->type(shl->in(2)) == t2 )
2038N/A return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) );
2038N/A
2040N/A return NULL;
3530N/A}
3530N/A
3530N/A//------------------------------Value------------------------------------------
3530N/A// A URShiftINode shifts its input2 right by input1 amount.
3530N/Aconst Type *URShiftINode::Value( PhaseTransform *phase ) const {
3530N/A // (This is a near clone of RShiftINode::Value.)
3530N/A const Type *t1 = phase->type( in(1) );
2040N/A const Type *t2 = phase->type( in(2) );
2040N/A // Either input is TOP ==> the result is TOP
3530N/A if( t1 == Type::TOP ) return Type::TOP;
3530N/A if( t2 == Type::TOP ) return Type::TOP;
3530N/A
2038N/A // Left input is ZERO ==> the result is ZERO.
2038N/A if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
2040N/A // Shift by zero does nothing
2038N/A if( t2 == TypeInt::ZERO ) return t1;
2038N/A
2431N/A // Either input is BOTTOM ==> the result is BOTTOM
2040N/A if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
2040N/A return TypeInt::INT;
2040N/A
2040N/A if (t2 == TypeInt::INT)
2040N/A return TypeInt::INT;
2431N/A
2431N/A const TypeInt *r1 = t1->is_int(); // Handy access
2431N/A const TypeInt *r2 = t2->is_int(); // Handy access
2431N/A
2431N/A if (r2->is_con()) {
2431N/A uint shift = r2->get_con();
2431N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
2431N/A // Shift by a multiple of 32 does nothing:
2431N/A if (shift == 0) return t1;
2431N/A // Calculate reasonably aggressive bounds for the result.
2431N/A jint lo = (juint)r1->_lo >> (juint)shift;
2431N/A jint hi = (juint)r1->_hi >> (juint)shift;
2431N/A if (r1->_hi >= 0 && r1->_lo < 0) {
2431N/A // If the type has both negative and positive values,
2038N/A // there are two separate sub-domains to worry about:
2038N/A // The positive half and the negative half.
2040N/A jint neg_lo = lo;
2040N/A jint neg_hi = (juint)-1 >> (juint)shift;
5452N/A jint pos_lo = (juint) 0 >> (juint)shift;
2040N/A jint pos_hi = hi;
2040N/A lo = MIN2(neg_lo, pos_lo); // == 0
2040N/A hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
2040N/A }
2040N/A assert(lo <= hi, "must have valid bounds");
2040N/A const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
2040N/A #ifdef ASSERT
2040N/A // Make sure we get the sign-capture idiom correct.
2040N/A if (shift == BitsPerJavaInteger-1) {
2431N/A if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
4183N/A if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
4183N/A }
4183N/A #endif
4250N/A return ti;
2431N/A }
2040N/A
2040N/A //
2040N/A // Do not support shifted oops in info for GC
2040N/A //
2040N/A // else if( t1->base() == Type::InstPtr ) {
2040N/A //
2040N/A // const TypeInstPtr *o = t1->is_instptr();
2040N/A // if( t1->singleton() )
2040N/A // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
3241N/A // }
2431N/A // else if( t1->base() == Type::KlassPtr ) {
3241N/A // const TypeKlassPtr *o = t1->is_klassptr();
2040N/A // if( t1->singleton() )
4183N/A // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
2040N/A // }
2040N/A
2040N/A return TypeInt::INT;
2431N/A}
2431N/A
2431N/A//=============================================================================
2431N/A//------------------------------Identity---------------------------------------
2431N/ANode *URShiftLNode::Identity( PhaseTransform *phase ) {
2431N/A const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
2040N/A return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
2040N/A}
2040N/A
2040N/A//------------------------------Ideal------------------------------------------
2040N/ANode *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
2040N/A const TypeInt *t2 = phase->type( in(2) )->isa_int();
3241N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
2431N/A const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
3241N/A if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
2040N/A // note: mask computation below does not work for 0 shift count
4183N/A // We'll be wanting the right-shift amount as a mask of that many bits
2040N/A const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) -1);
2040N/A
2040N/A // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
2040N/A // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
2040N/A // If Q is "X << z" the rounding is useless. Look for patterns like
2040N/A // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
2040N/A Node *add = in(1);
2040N/A if( add->Opcode() == Op_AddL ) {
5455N/A Node *lshl = add->in(1);
2040N/A if( lshl->Opcode() == Op_LShiftL &&
2040N/A phase->type(lshl->in(2)) == t2 ) {
2040N/A Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) );
2038N/A Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) );
2038N/A return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) );
2038N/A }
2038N/A }
2038N/A
2038N/A // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
2038N/A // This shortens the mask. Also, if we are extracting a high byte and
2038N/A // storing it to a buffer, the mask will be removed completely.
2038N/A Node *andi = in(1);
2038N/A if( andi->Opcode() == Op_AndL ) {
2038N/A const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
2038N/A if( t3 && t3->is_con() ) { // Right input is a constant
2038N/A jlong mask2 = t3->get_con();
2040N/A mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
2040N/A Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) );
2038N/A return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2));
2038N/A }
2040N/A }
2038N/A
2038N/A // Check for "(X << z ) >>> z" which simply zero-extends
2038N/A Node *shl = in(1);
2038N/A if( shl->Opcode() == Op_LShiftL &&
2038N/A phase->type(shl->in(2)) == t2 )
2038N/A return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) );
2038N/A
3011N/A return NULL;
3011N/A}
5455N/A
3011N/A//------------------------------Value------------------------------------------
3011N/A// A URShiftINode shifts its input2 right by input1 amount.
2038N/Aconst Type *URShiftLNode::Value( PhaseTransform *phase ) const {
2038N/A // (This is a near clone of RShiftLNode::Value.)
2038N/A const Type *t1 = phase->type( in(1) );
2038N/A const Type *t2 = phase->type( in(2) );
2038N/A // Either input is TOP ==> the result is TOP
2038N/A if( t1 == Type::TOP ) return Type::TOP;
2038N/A if( t2 == Type::TOP ) return Type::TOP;
2038N/A
2038N/A // Left input is ZERO ==> the result is ZERO.
2038N/A if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
2038N/A // Shift by zero does nothing
2431N/A if( t2 == TypeInt::ZERO ) return t1;
2431N/A
2038N/A // Either input is BOTTOM ==> the result is BOTTOM
2038N/A if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
2038N/A return TypeLong::LONG;
4250N/A
2038N/A if (t2 == TypeInt::INT)
2038N/A return TypeLong::LONG;
4250N/A
3240N/A const TypeLong *r1 = t1->is_long(); // Handy access
2038N/A const TypeInt *r2 = t2->is_int (); // Handy access
2038N/A
2038N/A if (r2->is_con()) {
2038N/A uint shift = r2->get_con();
2038N/A shift &= BitsPerJavaLong - 1; // semantics of Java shifts
2038N/A // Shift by a multiple of 64 does nothing:
2038N/A if (shift == 0) return t1;
2040N/A // Calculate reasonably aggressive bounds for the result.
2038N/A jlong lo = (julong)r1->_lo >> (juint)shift;
2038N/A jlong hi = (julong)r1->_hi >> (juint)shift;
2038N/A if (r1->_hi >= 0 && r1->_lo < 0) {
2038N/A // If the type has both negative and positive values,
2038N/A // there are two separate sub-domains to worry about:
2038N/A // The positive half and the negative half.
2038N/A jlong neg_lo = lo;
2038N/A jlong neg_hi = (julong)-1 >> (juint)shift;
3240N/A jlong pos_lo = (julong) 0 >> (juint)shift;
2038N/A jlong pos_hi = hi;
2038N/A //lo = MIN2(neg_lo, pos_lo); // == 0
2038N/A lo = neg_lo < pos_lo ? neg_lo : pos_lo;
2038N/A //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
2038N/A hi = neg_hi > pos_hi ? neg_hi : pos_hi;
2038N/A }
2038N/A assert(lo <= hi, "must have valid bounds");
2038N/A const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
2038N/A #ifdef ASSERT
4250N/A // Make sure we get the sign-capture idiom correct.
2038N/A if (shift == BitsPerJavaLong - 1) {
2038N/A if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
2038N/A if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
2431N/A }
2038N/A #endif
2038N/A return tl;
2038N/A }
2038N/A
2038N/A return TypeLong::LONG; // Give up
2038N/A}
2038N/A