0N/A/*
1879N/A * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#include "precompiled.hpp"
1879N/A#include "memory/allocation.inline.hpp"
1879N/A#include "opto/addnode.hpp"
1879N/A#include "opto/connode.hpp"
1879N/A#include "opto/memnode.hpp"
1879N/A#include "opto/mulnode.hpp"
1879N/A#include "opto/phaseX.hpp"
1879N/A#include "opto/subnode.hpp"
0N/A
1879N/A// Portions of code courtesy of Clifford Click
0N/A
0N/A
0N/A//=============================================================================
0N/A//------------------------------hash-------------------------------------------
0N/A// Hash function over MulNodes. Needs to be commutative; i.e., I swap
0N/A// (commute) inputs to MulNodes willy-nilly so the hash function must return
0N/A// the same value in the presence of edge swapping.
0N/Auint MulNode::hash() const {
0N/A return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
0N/A}
0N/A
0N/A//------------------------------Identity---------------------------------------
0N/A// Multiplying a one preserves the other argument
0N/ANode *MulNode::Identity( PhaseTransform *phase ) {
0N/A register const Type *one = mul_id(); // The multiplicative identity
0N/A if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
0N/A if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
0N/A
0N/A return this;
0N/A}
0N/A
0N/A//------------------------------Ideal------------------------------------------
0N/A// We also canonicalize the Node, moving constants to the right input,
0N/A// and flatten expressions (so that 1+x+2 becomes x+3).
0N/ANode *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A const Type *t1 = phase->type( in(1) );
0N/A const Type *t2 = phase->type( in(2) );
0N/A Node *progress = NULL; // Progress flag
0N/A // We are OK if right is a constant, or right is a load and
0N/A // left is a non-constant.
0N/A if( !(t2->singleton() ||
0N/A (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
0N/A if( t1->singleton() || // Left input is a constant?
0N/A // Otherwise, sort inputs (commutativity) to help value numbering.
0N/A (in(1)->_idx > in(2)->_idx) ) {
0N/A swap_edges(1, 2);
0N/A const Type *t = t1;
0N/A t1 = t2;
0N/A t2 = t;
0N/A progress = this; // Made progress
0N/A }
0N/A }
0N/A
0N/A // If the right input is a constant, and the left input is a product of a
0N/A // constant, flatten the expression tree.
0N/A uint op = Opcode();
0N/A if( t2->singleton() && // Right input is a constant?
0N/A op != Op_MulF && // Float & double cannot reassociate
0N/A op != Op_MulD ) {
0N/A if( t2 == Type::TOP ) return NULL;
0N/A Node *mul1 = in(1);
0N/A#ifdef ASSERT
0N/A // Check for dead loop
0N/A int op1 = mul1->Opcode();
0N/A if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
0N/A ( op1 == mul_opcode() || op1 == add_opcode() ) &&
0N/A ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
0N/A phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
0N/A assert(false, "dead loop in MulNode::Ideal");
0N/A#endif
0N/A
0N/A if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
0N/A // Mul of a constant?
0N/A const Type *t12 = phase->type( mul1->in(2) );
0N/A if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
0N/A // Compute new constant; check for overflow
2667N/A const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
0N/A if( tcon01->singleton() ) {
0N/A // The Mul of the flattened expression
0N/A set_req(1, mul1->in(1));
0N/A set_req(2, phase->makecon( tcon01 ));
0N/A t2 = tcon01;
0N/A progress = this; // Made progress
0N/A }
0N/A }
0N/A }
0N/A // If the right input is a constant, and the left input is an add of a
0N/A // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
0N/A const Node *add1 = in(1);
0N/A if( add1->Opcode() == add_opcode() ) { // Left input is an add?
0N/A // Add of a constant?
0N/A const Type *t12 = phase->type( add1->in(2) );
0N/A if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
0N/A assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
0N/A // Compute new constant; check for overflow
0N/A const Type *tcon01 = mul_ring(t2,t12);
0N/A if( tcon01->singleton() ) {
0N/A
0N/A // Convert (X+con1)*con0 into X*con0
0N/A Node *mul = clone(); // mul = ()*con0
0N/A mul->set_req(1,add1->in(1)); // mul = X*con0
0N/A mul = phase->transform(mul);
0N/A
0N/A Node *add2 = add1->clone();
0N/A add2->set_req(1, mul); // X*con0 + con0*con1
0N/A add2->set_req(2, phase->makecon(tcon01) );
0N/A progress = add2;
0N/A }
0N/A }
0N/A } // End of is left input an add
0N/A } // End of is right input a Mul
0N/A
0N/A return progress;
0N/A}
0N/A
0N/A//------------------------------Value-----------------------------------------
0N/Aconst Type *MulNode::Value( PhaseTransform *phase ) const {
0N/A const Type *t1 = phase->type( in(1) );
0N/A const Type *t2 = phase->type( in(2) );
0N/A // Either input is TOP ==> the result is TOP
0N/A if( t1 == Type::TOP ) return Type::TOP;
0N/A if( t2 == Type::TOP ) return Type::TOP;
0N/A
0N/A // Either input is ZERO ==> the result is ZERO.
0N/A // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
0N/A int op = Opcode();
0N/A if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
0N/A const Type *zero = add_id(); // The multiplicative zero
0N/A if( t1->higher_equal( zero ) ) return zero;
0N/A if( t2->higher_equal( zero ) ) return zero;
0N/A }
0N/A
0N/A // Either input is BOTTOM ==> the result is the local BOTTOM
0N/A if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
0N/A return bottom_type();
0N/A
404N/A#if defined(IA32)
404N/A // Can't trust native compilers to properly fold strict double
404N/A // multiplication with round-to-zero on this platform.
404N/A if (op == Op_MulD && phase->C->method()->is_strict()) {
404N/A return TypeD::DOUBLE;
404N/A }
404N/A#endif
404N/A
0N/A return mul_ring(t1,t2); // Local flavor of type multiplication
0N/A}
0N/A
0N/A
0N/A//=============================================================================
0N/A//------------------------------Ideal------------------------------------------
0N/A// Check for power-of-2 multiply, then try the regular MulNode::Ideal
0N/ANode *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A // Swap constant to right
0N/A jint con;
0N/A if ((con = in(1)->find_int_con(0)) != 0) {
0N/A swap_edges(1, 2);
0N/A // Finish rest of method to use info in 'con'
0N/A } else if ((con = in(2)->find_int_con(0)) == 0) {
0N/A return MulNode::Ideal(phase, can_reshape);
0N/A }
0N/A
0N/A // Now we have a constant Node on the right and the constant in con
0N/A if( con == 0 ) return NULL; // By zero is handled by Value call
0N/A if( con == 1 ) return NULL; // By one is handled by Identity call
0N/A
0N/A // Check for negative constant; if so negate the final result
0N/A bool sign_flip = false;
0N/A if( con < 0 ) {
0N/A con = -con;
0N/A sign_flip = true;
0N/A }
0N/A
0N/A // Get low bit; check for being the only bit
0N/A Node *res = NULL;
0N/A jint bit1 = con & -con; // Extract low bit
0N/A if( bit1 == con ) { // Found a power of 2?
4022N/A res = new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
0N/A } else {
0N/A
0N/A // Check for constant with 2 bits set
0N/A jint bit2 = con-bit1;
0N/A bit2 = bit2 & -bit2; // Extract 2nd bit
0N/A if( bit2 + bit1 == con ) { // Found all bits in con?
4022N/A Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
4022N/A Node *n2 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
4022N/A res = new (phase->C) AddINode( n2, n1 );
0N/A
0N/A } else if (is_power_of_2(con+1)) {
0N/A // Sleezy: power-of-2 -1. Next time be generic.
0N/A jint temp = (jint) (con + 1);
4022N/A Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
4022N/A res = new (phase->C) SubINode( n1, in(1) );
0N/A } else {
0N/A return MulNode::Ideal(phase, can_reshape);
0N/A }
0N/A }
0N/A
0N/A if( sign_flip ) { // Need to negate result?
0N/A res = phase->transform(res);// Transform, before making the zero con
4022N/A res = new (phase->C) SubINode(phase->intcon(0),res);
0N/A }
0N/A
0N/A return res; // Return final result
0N/A}
0N/A
0N/A//------------------------------mul_ring---------------------------------------
0N/A// Compute the product type of two integer ranges into this node.
0N/Aconst Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
0N/A const TypeInt *r0 = t0->is_int(); // Handy access
0N/A const TypeInt *r1 = t1->is_int();
0N/A
0N/A // Fetch endpoints of all ranges
0N/A int32 lo0 = r0->_lo;
0N/A double a = (double)lo0;
0N/A int32 hi0 = r0->_hi;
0N/A double b = (double)hi0;
0N/A int32 lo1 = r1->_lo;
0N/A double c = (double)lo1;
0N/A int32 hi1 = r1->_hi;
0N/A double d = (double)hi1;
0N/A
0N/A // Compute all endpoints & check for overflow
0N/A int32 A = lo0*lo1;
0N/A if( (double)A != a*c ) return TypeInt::INT; // Overflow?
0N/A int32 B = lo0*hi1;
0N/A if( (double)B != a*d ) return TypeInt::INT; // Overflow?
0N/A int32 C = hi0*lo1;
0N/A if( (double)C != b*c ) return TypeInt::INT; // Overflow?
0N/A int32 D = hi0*hi1;
0N/A if( (double)D != b*d ) return TypeInt::INT; // Overflow?
0N/A
0N/A if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
0N/A else { lo0 = B; hi0 = A; }
0N/A if( C < D ) {
0N/A if( C < lo0 ) lo0 = C;
0N/A if( D > hi0 ) hi0 = D;
0N/A } else {
0N/A if( D < lo0 ) lo0 = D;
0N/A if( C > hi0 ) hi0 = C;
0N/A }
0N/A return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
0N/A}
0N/A
0N/A
0N/A//=============================================================================
0N/A//------------------------------Ideal------------------------------------------
0N/A// Check for power-of-2 multiply, then try the regular MulNode::Ideal
0N/ANode *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A // Swap constant to right
0N/A jlong con;
0N/A if ((con = in(1)->find_long_con(0)) != 0) {
0N/A swap_edges(1, 2);
0N/A // Finish rest of method to use info in 'con'
0N/A } else if ((con = in(2)->find_long_con(0)) == 0) {
0N/A return MulNode::Ideal(phase, can_reshape);
0N/A }
0N/A
0N/A // Now we have a constant Node on the right and the constant in con
0N/A if( con == CONST64(0) ) return NULL; // By zero is handled by Value call
0N/A if( con == CONST64(1) ) return NULL; // By one is handled by Identity call
0N/A
0N/A // Check for negative constant; if so negate the final result
0N/A bool sign_flip = false;
0N/A if( con < 0 ) {
0N/A con = -con;
0N/A sign_flip = true;
0N/A }
0N/A
0N/A // Get low bit; check for being the only bit
0N/A Node *res = NULL;
0N/A jlong bit1 = con & -con; // Extract low bit
0N/A if( bit1 == con ) { // Found a power of 2?
4022N/A res = new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
0N/A } else {
0N/A
0N/A // Check for constant with 2 bits set
0N/A jlong bit2 = con-bit1;
0N/A bit2 = bit2 & -bit2; // Extract 2nd bit
0N/A if( bit2 + bit1 == con ) { // Found all bits in con?
4022N/A Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
4022N/A Node *n2 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
4022N/A res = new (phase->C) AddLNode( n2, n1 );
0N/A
0N/A } else if (is_power_of_2_long(con+1)) {
0N/A // Sleezy: power-of-2 -1. Next time be generic.
0N/A jlong temp = (jlong) (con + 1);
4022N/A Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
4022N/A res = new (phase->C) SubLNode( n1, in(1) );
0N/A } else {
0N/A return MulNode::Ideal(phase, can_reshape);
0N/A }
0N/A }
0N/A
0N/A if( sign_flip ) { // Need to negate result?
0N/A res = phase->transform(res);// Transform, before making the zero con
4022N/A res = new (phase->C) SubLNode(phase->longcon(0),res);
0N/A }
0N/A
0N/A return res; // Return final result
0N/A}
0N/A
0N/A//------------------------------mul_ring---------------------------------------
0N/A// Compute the product type of two integer ranges into this node.
0N/Aconst Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
0N/A const TypeLong *r0 = t0->is_long(); // Handy access
0N/A const TypeLong *r1 = t1->is_long();
0N/A
0N/A // Fetch endpoints of all ranges
0N/A jlong lo0 = r0->_lo;
0N/A double a = (double)lo0;
0N/A jlong hi0 = r0->_hi;
0N/A double b = (double)hi0;
0N/A jlong lo1 = r1->_lo;
0N/A double c = (double)lo1;
0N/A jlong hi1 = r1->_hi;
0N/A double d = (double)hi1;
0N/A
0N/A // Compute all endpoints & check for overflow
0N/A jlong A = lo0*lo1;
0N/A if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
0N/A jlong B = lo0*hi1;
0N/A if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
0N/A jlong C = hi0*lo1;
0N/A if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
0N/A jlong D = hi0*hi1;
0N/A if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
0N/A
0N/A if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
0N/A else { lo0 = B; hi0 = A; }
0N/A if( C < D ) {
0N/A if( C < lo0 ) lo0 = C;
0N/A if( D > hi0 ) hi0 = D;
0N/A } else {
0N/A if( D < lo0 ) lo0 = D;
0N/A if( C > hi0 ) hi0 = C;
0N/A }
0N/A return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
0N/A}
0N/A
0N/A//=============================================================================
0N/A//------------------------------mul_ring---------------------------------------
0N/A// Compute the product type of two double ranges into this node.
0N/Aconst Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
0N/A if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
0N/A return TypeF::make( t0->getf() * t1->getf() );
0N/A}
0N/A
0N/A//=============================================================================
0N/A//------------------------------mul_ring---------------------------------------
0N/A// Compute the product type of two double ranges into this node.
0N/Aconst Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
0N/A if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
404N/A // We must be multiplying 2 double constants.
0N/A return TypeD::make( t0->getd() * t1->getd() );
0N/A}
0N/A
0N/A//=============================================================================
145N/A//------------------------------Value------------------------------------------
145N/Aconst Type *MulHiLNode::Value( PhaseTransform *phase ) const {
145N/A // Either input is TOP ==> the result is TOP
145N/A const Type *t1 = phase->type( in(1) );
145N/A const Type *t2 = phase->type( in(2) );
145N/A if( t1 == Type::TOP ) return Type::TOP;
145N/A if( t2 == Type::TOP ) return Type::TOP;
145N/A
145N/A // Either input is BOTTOM ==> the result is the local BOTTOM
145N/A const Type *bot = bottom_type();
145N/A if( (t1 == bot) || (t2 == bot) ||
145N/A (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
145N/A return bot;
145N/A
145N/A // It is not worth trying to constant fold this stuff!
145N/A return TypeLong::LONG;
145N/A}
145N/A
145N/A//=============================================================================
0N/A//------------------------------mul_ring---------------------------------------
0N/A// Supplied function returns the product of the inputs IN THE CURRENT RING.
0N/A// For the logical operations the ring's MUL is really a logical AND function.
0N/A// This also type-checks the inputs for sanity. Guaranteed never to
0N/A// be passed a TOP or BOTTOM type, these are filtered out by pre-check.
0N/Aconst Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
0N/A const TypeInt *r0 = t0->is_int(); // Handy access
0N/A const TypeInt *r1 = t1->is_int();
0N/A int widen = MAX2(r0->_widen,r1->_widen);
0N/A
0N/A // If either input is a constant, might be able to trim cases
0N/A if( !r0->is_con() && !r1->is_con() )
0N/A return TypeInt::INT; // No constants to be had
0N/A
0N/A // Both constants? Return bits
0N/A if( r0->is_con() && r1->is_con() )
0N/A return TypeInt::make( r0->get_con() & r1->get_con() );
0N/A
0N/A if( r0->is_con() && r0->get_con() > 0 )
0N/A return TypeInt::make(0, r0->get_con(), widen);
0N/A
0N/A if( r1->is_con() && r1->get_con() > 0 )
0N/A return TypeInt::make(0, r1->get_con(), widen);
0N/A
0N/A if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
0N/A return TypeInt::BOOL;
0N/A }
0N/A
0N/A return TypeInt::INT; // No constants to be had
0N/A}
0N/A
0N/A//------------------------------Identity---------------------------------------
0N/A// Masking off the high bits of an unsigned load is not required
0N/ANode *AndINode::Identity( PhaseTransform *phase ) {
0N/A
0N/A // x & x => x
0N/A if (phase->eqv(in(1), in(2))) return in(1);
0N/A
824N/A Node* in1 = in(1);
824N/A uint op = in1->Opcode();
824N/A const TypeInt* t2 = phase->type(in(2))->isa_int();
824N/A if (t2 && t2->is_con()) {
0N/A int con = t2->get_con();
0N/A // Masking off high bits which are always zero is useless.
0N/A const TypeInt* t1 = phase->type( in(1) )->isa_int();
0N/A if (t1 != NULL && t1->_lo >= 0) {
824N/A jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
0N/A if ((t1_support & con) == t1_support)
824N/A return in1;
0N/A }
0N/A // Masking off the high bits of a unsigned-shift-right is not
0N/A // needed either.
824N/A if (op == Op_URShiftI) {
824N/A const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
824N/A if (t12 && t12->is_con()) { // Shift is by a constant
559N/A int shift = t12->get_con();
559N/A shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
559N/A int mask = max_juint >> shift;
824N/A if ((mask & con) == mask) // If AND is useless, skip it
824N/A return in1;
0N/A }
0N/A }
0N/A }
0N/A return MulNode::Identity(phase);
0N/A}
0N/A
0N/A//------------------------------Ideal------------------------------------------
0N/ANode *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A // Special case constant AND mask
0N/A const TypeInt *t2 = phase->type( in(2) )->isa_int();
0N/A if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
0N/A const int mask = t2->get_con();
0N/A Node *load = in(1);
0N/A uint lop = load->Opcode();
0N/A
0N/A // Masking bits off of a Character? Hi bits are already zero.
558N/A if( lop == Op_LoadUS &&
0N/A (mask & 0xFFFF0000) ) // Can we make a smaller mask?
4022N/A return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF));
0N/A
0N/A // Masking bits off of a Short? Loading a Character does some masking
4037N/A if (can_reshape &&
4037N/A load->outcnt() == 1 && load->unique_out() == this) {
4037N/A if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
4037N/A Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control),
4037N/A load->in(MemNode::Memory),
4037N/A load->in(MemNode::Address),
4037N/A load->adr_type());
4037N/A ldus = phase->transform(ldus);
4037N/A return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF));
4037N/A }
0N/A
4037N/A // Masking sign bits off of a Byte? Do an unsigned byte load plus
4037N/A // an and.
4037N/A if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
4037N/A Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control),
4037N/A load->in(MemNode::Memory),
4037N/A load->in(MemNode::Address),
4037N/A load->adr_type());
4037N/A ldub = phase->transform(ldub);
4037N/A return new (phase->C) AndINode(ldub, phase->intcon(mask));
4037N/A }
0N/A }
0N/A
0N/A // Masking off sign bits? Dont make them!
0N/A if( lop == Op_RShiftI ) {
0N/A const TypeInt *t12 = phase->type(load->in(2))->isa_int();
0N/A if( t12 && t12->is_con() ) { // Shift is by a constant
0N/A int shift = t12->get_con();
0N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
0N/A const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
0N/A // If the AND'ing of the 2 masks has no bits, then only original shifted
0N/A // bits survive. NO sign-extension bits survive the maskings.
0N/A if( (sign_bits_mask & mask) == 0 ) {
0N/A // Use zero-fill shift instead
4022N/A Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2)));
4022N/A return new (phase->C) AndINode( zshift, in(2) );
0N/A }
0N/A }
0N/A }
0N/A
0N/A // Check for 'negate/and-1', a pattern emitted when someone asks for
0N/A // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
0N/A // plus 1) and the mask is of the low order bit. Skip the negate.
0N/A if( lop == Op_SubI && mask == 1 && load->in(1) &&
0N/A phase->type(load->in(1)) == TypeInt::ZERO )
4022N/A return new (phase->C) AndINode( load->in(2), in(2) );
0N/A
0N/A return MulNode::Ideal(phase, can_reshape);
0N/A}
0N/A
0N/A//=============================================================================
0N/A//------------------------------mul_ring---------------------------------------
0N/A// Supplied function returns the product of the inputs IN THE CURRENT RING.
0N/A// For the logical operations the ring's MUL is really a logical AND function.
0N/A// This also type-checks the inputs for sanity. Guaranteed never to
0N/A// be passed a TOP or BOTTOM type, these are filtered out by pre-check.
0N/Aconst Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
0N/A const TypeLong *r0 = t0->is_long(); // Handy access
0N/A const TypeLong *r1 = t1->is_long();
0N/A int widen = MAX2(r0->_widen,r1->_widen);
0N/A
0N/A // If either input is a constant, might be able to trim cases
0N/A if( !r0->is_con() && !r1->is_con() )
0N/A return TypeLong::LONG; // No constants to be had
0N/A
0N/A // Both constants? Return bits
0N/A if( r0->is_con() && r1->is_con() )
0N/A return TypeLong::make( r0->get_con() & r1->get_con() );
0N/A
0N/A if( r0->is_con() && r0->get_con() > 0 )
0N/A return TypeLong::make(CONST64(0), r0->get_con(), widen);
0N/A
0N/A if( r1->is_con() && r1->get_con() > 0 )
0N/A return TypeLong::make(CONST64(0), r1->get_con(), widen);
0N/A
0N/A return TypeLong::LONG; // No constants to be had
0N/A}
0N/A
0N/A//------------------------------Identity---------------------------------------
0N/A// Masking off the high bits of an unsigned load is not required
0N/ANode *AndLNode::Identity( PhaseTransform *phase ) {
0N/A
0N/A // x & x => x
0N/A if (phase->eqv(in(1), in(2))) return in(1);
0N/A
0N/A Node *usr = in(1);
0N/A const TypeLong *t2 = phase->type( in(2) )->isa_long();
0N/A if( t2 && t2->is_con() ) {
0N/A jlong con = t2->get_con();
0N/A // Masking off high bits which are always zero is useless.
0N/A const TypeLong* t1 = phase->type( in(1) )->isa_long();
0N/A if (t1 != NULL && t1->_lo >= 0) {
0N/A jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1;
0N/A if ((t1_support & con) == t1_support)
0N/A return usr;
0N/A }
0N/A uint lop = usr->Opcode();
0N/A // Masking off the high bits of a unsigned-shift-right is not
0N/A // needed either.
0N/A if( lop == Op_URShiftL ) {
0N/A const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
559N/A if( t12 && t12->is_con() ) { // Shift is by a constant
559N/A int shift = t12->get_con();
559N/A shift &= BitsPerJavaLong - 1; // semantics of Java shifts
559N/A jlong mask = max_julong >> shift;
0N/A if( (mask&con) == mask ) // If AND is useless, skip it
0N/A return usr;
0N/A }
0N/A }
0N/A }
0N/A return MulNode::Identity(phase);
0N/A}
0N/A
0N/A//------------------------------Ideal------------------------------------------
0N/ANode *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A // Special case constant AND mask
0N/A const TypeLong *t2 = phase->type( in(2) )->isa_long();
0N/A if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
0N/A const jlong mask = t2->get_con();
0N/A
624N/A Node* in1 = in(1);
624N/A uint op = in1->Opcode();
624N/A
824N/A // Are we masking a long that was converted from an int with a mask
897N/A // that fits in 32-bits? Commute them and use an AndINode. Don't
897N/A // convert masks which would cause a sign extension of the integer
897N/A // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
897N/A // would be optimized away later in Identity.
897N/A if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) {
4022N/A Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask));
897N/A andi = phase->transform(andi);
4022N/A return new (phase->C) ConvI2LNode(andi);
824N/A }
824N/A
0N/A // Masking off sign bits? Dont make them!
624N/A if (op == Op_RShiftL) {
824N/A const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
0N/A if( t12 && t12->is_con() ) { // Shift is by a constant
0N/A int shift = t12->get_con();
559N/A shift &= BitsPerJavaLong - 1; // semantics of Java shifts
559N/A const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
0N/A // If the AND'ing of the 2 masks has no bits, then only original shifted
0N/A // bits survive. NO sign-extension bits survive the maskings.
0N/A if( (sign_bits_mask & mask) == 0 ) {
0N/A // Use zero-fill shift instead
4022N/A Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2)));
4022N/A return new (phase->C) AndLNode(zshift, in(2));
0N/A }
0N/A }
0N/A }
0N/A
0N/A return MulNode::Ideal(phase, can_reshape);
0N/A}
0N/A
0N/A//=============================================================================
0N/A//------------------------------Identity---------------------------------------
0N/ANode *LShiftINode::Identity( PhaseTransform *phase ) {
0N/A const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
0N/A return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
0N/A}
0N/A
0N/A//------------------------------Ideal------------------------------------------
0N/A// If the right input is a constant, and the left input is an add of a
0N/A// constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
0N/ANode *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A const Type *t = phase->type( in(2) );
0N/A if( t == Type::TOP ) return NULL; // Right input is dead
0N/A const TypeInt *t2 = t->isa_int();
0N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
0N/A const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
0N/A
0N/A if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
0N/A
0N/A // Left input is an add of a constant?
0N/A Node *add1 = in(1);
0N/A int add1_op = add1->Opcode();
0N/A if( add1_op == Op_AddI ) { // Left input is an add?
0N/A assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
0N/A const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
0N/A if( t12 && t12->is_con() ){ // Left input is an add of a con?
0N/A // Transform is legal, but check for profit. Avoid breaking 'i2s'
0N/A // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
0N/A if( con < 16 ) {
0N/A // Compute X << con0
4022N/A Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) );
0N/A // Compute X<<con0 + (con1<<con0)
4022N/A return new (phase->C) AddINode( lsh, phase->intcon(t12->get_con() << con));
0N/A }
0N/A }
0N/A }
0N/A
0N/A // Check for "(x>>c0)<<c0" which just masks off low bits
0N/A if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
0N/A add1->in(2) == in(2) )
0N/A // Convert to "(x & -(1<<c0))"
4022N/A return new (phase->C) AndINode(add1->in(1),phase->intcon( -(1<<con)));
0N/A
0N/A // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
0N/A if( add1_op == Op_AndI ) {
0N/A Node *add2 = add1->in(1);
0N/A int add2_op = add2->Opcode();
0N/A if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
0N/A add2->in(2) == in(2) ) {
0N/A // Convert to "(x & (Y<<c0))"
4022N/A Node *y_sh = phase->transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) );
4022N/A return new (phase->C) AndINode( add2->in(1), y_sh );
0N/A }
0N/A }
0N/A
0N/A // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
0N/A // before shifting them away.
0N/A const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
0N/A if( add1_op == Op_AndI &&
0N/A phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
4022N/A return new (phase->C) LShiftINode( add1->in(1), in(2) );
0N/A
0N/A return NULL;
0N/A}
0N/A
0N/A//------------------------------Value------------------------------------------
0N/A// A LShiftINode shifts its input2 left by input1 amount.
0N/Aconst Type *LShiftINode::Value( PhaseTransform *phase ) const {
0N/A const Type *t1 = phase->type( in(1) );
0N/A const Type *t2 = phase->type( in(2) );
0N/A // Either input is TOP ==> the result is TOP
0N/A if( t1 == Type::TOP ) return Type::TOP;
0N/A if( t2 == Type::TOP ) return Type::TOP;
0N/A
0N/A // Left input is ZERO ==> the result is ZERO.
0N/A if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
0N/A // Shift by zero does nothing
0N/A if( t2 == TypeInt::ZERO ) return t1;
0N/A
0N/A // Either input is BOTTOM ==> the result is BOTTOM
0N/A if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
0N/A (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
0N/A return TypeInt::INT;
0N/A
0N/A const TypeInt *r1 = t1->is_int(); // Handy access
0N/A const TypeInt *r2 = t2->is_int(); // Handy access
0N/A
0N/A if (!r2->is_con())
0N/A return TypeInt::INT;
0N/A
0N/A uint shift = r2->get_con();
0N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
0N/A // Shift by a multiple of 32 does nothing:
0N/A if (shift == 0) return t1;
0N/A
0N/A // If the shift is a constant, shift the bounds of the type,
0N/A // unless this could lead to an overflow.
0N/A if (!r1->is_con()) {
0N/A jint lo = r1->_lo, hi = r1->_hi;
0N/A if (((lo << shift) >> shift) == lo &&
0N/A ((hi << shift) >> shift) == hi) {
0N/A // No overflow. The range shifts up cleanly.
0N/A return TypeInt::make((jint)lo << (jint)shift,
0N/A (jint)hi << (jint)shift,
0N/A MAX2(r1->_widen,r2->_widen));
0N/A }
0N/A return TypeInt::INT;
0N/A }
0N/A
0N/A return TypeInt::make( (jint)r1->get_con() << (jint)shift );
0N/A}
0N/A
0N/A//=============================================================================
0N/A//------------------------------Identity---------------------------------------
0N/ANode *LShiftLNode::Identity( PhaseTransform *phase ) {
0N/A const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
0N/A return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
0N/A}
0N/A
0N/A//------------------------------Ideal------------------------------------------
0N/A// If the right input is a constant, and the left input is an add of a
0N/A// constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
0N/ANode *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A const Type *t = phase->type( in(2) );
0N/A if( t == Type::TOP ) return NULL; // Right input is dead
0N/A const TypeInt *t2 = t->isa_int();
0N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
0N/A const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
0N/A
0N/A if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
0N/A
0N/A // Left input is an add of a constant?
0N/A Node *add1 = in(1);
0N/A int add1_op = add1->Opcode();
0N/A if( add1_op == Op_AddL ) { // Left input is an add?
0N/A // Avoid dead data cycles from dead loops
0N/A assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
0N/A const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
0N/A if( t12 && t12->is_con() ){ // Left input is an add of a con?
0N/A // Compute X << con0
4022N/A Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) );
0N/A // Compute X<<con0 + (con1<<con0)
4022N/A return new (phase->C) AddLNode( lsh, phase->longcon(t12->get_con() << con));
0N/A }
0N/A }
0N/A
0N/A // Check for "(x>>c0)<<c0" which just masks off low bits
0N/A if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
0N/A add1->in(2) == in(2) )
0N/A // Convert to "(x & -(1<<c0))"
4022N/A return new (phase->C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
0N/A
0N/A // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
0N/A if( add1_op == Op_AndL ) {
0N/A Node *add2 = add1->in(1);
0N/A int add2_op = add2->Opcode();
0N/A if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
0N/A add2->in(2) == in(2) ) {
0N/A // Convert to "(x & (Y<<c0))"
4022N/A Node *y_sh = phase->transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) );
4022N/A return new (phase->C) AndLNode( add2->in(1), y_sh );
0N/A }
0N/A }
0N/A
0N/A // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
0N/A // before shifting them away.
559N/A const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1);
0N/A if( add1_op == Op_AndL &&
0N/A phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
4022N/A return new (phase->C) LShiftLNode( add1->in(1), in(2) );
0N/A
0N/A return NULL;
0N/A}
0N/A
0N/A//------------------------------Value------------------------------------------
0N/A// A LShiftLNode shifts its input2 left by input1 amount.
0N/Aconst Type *LShiftLNode::Value( PhaseTransform *phase ) const {
0N/A const Type *t1 = phase->type( in(1) );
0N/A const Type *t2 = phase->type( in(2) );
0N/A // Either input is TOP ==> the result is TOP
0N/A if( t1 == Type::TOP ) return Type::TOP;
0N/A if( t2 == Type::TOP ) return Type::TOP;
0N/A
0N/A // Left input is ZERO ==> the result is ZERO.
0N/A if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
0N/A // Shift by zero does nothing
0N/A if( t2 == TypeInt::ZERO ) return t1;
0N/A
0N/A // Either input is BOTTOM ==> the result is BOTTOM
0N/A if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
0N/A (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
0N/A return TypeLong::LONG;
0N/A
0N/A const TypeLong *r1 = t1->is_long(); // Handy access
0N/A const TypeInt *r2 = t2->is_int(); // Handy access
0N/A
0N/A if (!r2->is_con())
0N/A return TypeLong::LONG;
0N/A
0N/A uint shift = r2->get_con();
559N/A shift &= BitsPerJavaLong - 1; // semantics of Java shifts
0N/A // Shift by a multiple of 64 does nothing:
0N/A if (shift == 0) return t1;
0N/A
0N/A // If the shift is a constant, shift the bounds of the type,
0N/A // unless this could lead to an overflow.
0N/A if (!r1->is_con()) {
0N/A jlong lo = r1->_lo, hi = r1->_hi;
0N/A if (((lo << shift) >> shift) == lo &&
0N/A ((hi << shift) >> shift) == hi) {
0N/A // No overflow. The range shifts up cleanly.
0N/A return TypeLong::make((jlong)lo << (jint)shift,
0N/A (jlong)hi << (jint)shift,
0N/A MAX2(r1->_widen,r2->_widen));
0N/A }
0N/A return TypeLong::LONG;
0N/A }
0N/A
0N/A return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
0N/A}
0N/A
0N/A//=============================================================================
0N/A//------------------------------Identity---------------------------------------
0N/ANode *RShiftINode::Identity( PhaseTransform *phase ) {
0N/A const TypeInt *t2 = phase->type(in(2))->isa_int();
0N/A if( !t2 ) return this;
0N/A if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
0N/A return in(1);
0N/A
0N/A // Check for useless sign-masking
0N/A if( in(1)->Opcode() == Op_LShiftI &&
0N/A in(1)->req() == 3 &&
0N/A in(1)->in(2) == in(2) &&
0N/A t2->is_con() ) {
0N/A uint shift = t2->get_con();
0N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
0N/A // Compute masks for which this shifting doesn't change
0N/A int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
0N/A int hi = ~lo; // 00007FFF
0N/A const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
0N/A if( !t11 ) return this;
0N/A // Does actual value fit inside of mask?
0N/A if( lo <= t11->_lo && t11->_hi <= hi )
0N/A return in(1)->in(1); // Then shifting is a nop
0N/A }
0N/A
0N/A return this;
0N/A}
0N/A
0N/A//------------------------------Ideal------------------------------------------
0N/ANode *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A // Inputs may be TOP if they are dead.
0N/A const TypeInt *t1 = phase->type( in(1) )->isa_int();
0N/A if( !t1 ) return NULL; // Left input is an integer
0N/A const TypeInt *t2 = phase->type( in(2) )->isa_int();
0N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
0N/A const TypeInt *t3; // type of in(1).in(2)
0N/A int shift = t2->get_con();
0N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
0N/A
0N/A if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
0N/A
0N/A // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
0N/A // Such expressions arise normally from shift chains like (byte)(x >> 24).
0N/A const Node *mask = in(1);
0N/A if( mask->Opcode() == Op_AndI &&
0N/A (t3 = phase->type(mask->in(2))->isa_int()) &&
0N/A t3->is_con() ) {
0N/A Node *x = mask->in(1);
0N/A jint maskbits = t3->get_con();
0N/A // Convert to "(x >> shift) & (mask >> shift)"
4022N/A Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) );
4022N/A return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
0N/A }
0N/A
0N/A // Check for "(short[i] <<16)>>16" which simply sign-extends
0N/A const Node *shl = in(1);
0N/A if( shl->Opcode() != Op_LShiftI ) return NULL;
0N/A
0N/A if( shift == 16 &&
0N/A (t3 = phase->type(shl->in(2))->isa_int()) &&
0N/A t3->is_con(16) ) {
0N/A Node *ld = shl->in(1);
0N/A if( ld->Opcode() == Op_LoadS ) {
0N/A // Sign extension is just useless here. Return a RShiftI of zero instead
0N/A // returning 'ld' directly. We cannot return an old Node directly as
0N/A // that is the job of 'Identity' calls and Identity calls only work on
0N/A // direct inputs ('ld' is an extra Node removed from 'this'). The
0N/A // combined optimization requires Identity only return direct inputs.
0N/A set_req(1, ld);
0N/A set_req(2, phase->intcon(0));
0N/A return this;
0N/A }
4037N/A else if( can_reshape &&
4037N/A ld->Opcode() == Op_LoadUS &&
4037N/A ld->outcnt() == 1 && ld->unique_out() == shl)
0N/A // Replace zero-extension-load with sign-extension-load
4022N/A return new (phase->C) LoadSNode( ld->in(MemNode::Control),
0N/A ld->in(MemNode::Memory),
0N/A ld->in(MemNode::Address),
0N/A ld->adr_type());
0N/A }
0N/A
0N/A // Check for "(byte[i] <<24)>>24" which simply sign-extends
0N/A if( shift == 24 &&
0N/A (t3 = phase->type(shl->in(2))->isa_int()) &&
0N/A t3->is_con(24) ) {
0N/A Node *ld = shl->in(1);
0N/A if( ld->Opcode() == Op_LoadB ) {
0N/A // Sign extension is just useless here
0N/A set_req(1, ld);
0N/A set_req(2, phase->intcon(0));
0N/A return this;
0N/A }
0N/A }
0N/A
0N/A return NULL;
0N/A}
0N/A
0N/A//------------------------------Value------------------------------------------
0N/A// A RShiftINode shifts its input2 right by input1 amount.
0N/Aconst Type *RShiftINode::Value( PhaseTransform *phase ) const {
0N/A const Type *t1 = phase->type( in(1) );
0N/A const Type *t2 = phase->type( in(2) );
0N/A // Either input is TOP ==> the result is TOP
0N/A if( t1 == Type::TOP ) return Type::TOP;
0N/A if( t2 == Type::TOP ) return Type::TOP;
0N/A
0N/A // Left input is ZERO ==> the result is ZERO.
0N/A if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
0N/A // Shift by zero does nothing
0N/A if( t2 == TypeInt::ZERO ) return t1;
0N/A
0N/A // Either input is BOTTOM ==> the result is BOTTOM
0N/A if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
0N/A return TypeInt::INT;
0N/A
0N/A if (t2 == TypeInt::INT)
0N/A return TypeInt::INT;
0N/A
0N/A const TypeInt *r1 = t1->is_int(); // Handy access
0N/A const TypeInt *r2 = t2->is_int(); // Handy access
0N/A
0N/A // If the shift is a constant, just shift the bounds of the type.
0N/A // For example, if the shift is 31, we just propagate sign bits.
0N/A if (r2->is_con()) {
0N/A uint shift = r2->get_con();
0N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
0N/A // Shift by a multiple of 32 does nothing:
0N/A if (shift == 0) return t1;
0N/A // Calculate reasonably aggressive bounds for the result.
0N/A // This is necessary if we are to correctly type things
0N/A // like (x<<24>>24) == ((byte)x).
0N/A jint lo = (jint)r1->_lo >> (jint)shift;
0N/A jint hi = (jint)r1->_hi >> (jint)shift;
0N/A assert(lo <= hi, "must have valid bounds");
0N/A const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
0N/A#ifdef ASSERT
0N/A // Make sure we get the sign-capture idiom correct.
0N/A if (shift == BitsPerJavaInteger-1) {
0N/A if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
0N/A if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
0N/A }
0N/A#endif
0N/A return ti;
0N/A }
0N/A
0N/A if( !r1->is_con() || !r2->is_con() )
0N/A return TypeInt::INT;
0N/A
0N/A // Signed shift right
0N/A return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
0N/A}
0N/A
0N/A//=============================================================================
0N/A//------------------------------Identity---------------------------------------
0N/ANode *RShiftLNode::Identity( PhaseTransform *phase ) {
0N/A const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
0N/A return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
0N/A}
0N/A
0N/A//------------------------------Value------------------------------------------
0N/A// A RShiftLNode shifts its input2 right by input1 amount.
0N/Aconst Type *RShiftLNode::Value( PhaseTransform *phase ) const {
0N/A const Type *t1 = phase->type( in(1) );
0N/A const Type *t2 = phase->type( in(2) );
0N/A // Either input is TOP ==> the result is TOP
0N/A if( t1 == Type::TOP ) return Type::TOP;
0N/A if( t2 == Type::TOP ) return Type::TOP;
0N/A
0N/A // Left input is ZERO ==> the result is ZERO.
0N/A if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
0N/A // Shift by zero does nothing
0N/A if( t2 == TypeInt::ZERO ) return t1;
0N/A
0N/A // Either input is BOTTOM ==> the result is BOTTOM
0N/A if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
0N/A return TypeLong::LONG;
0N/A
0N/A if (t2 == TypeInt::INT)
0N/A return TypeLong::LONG;
0N/A
0N/A const TypeLong *r1 = t1->is_long(); // Handy access
0N/A const TypeInt *r2 = t2->is_int (); // Handy access
0N/A
0N/A // If the shift is a constant, just shift the bounds of the type.
0N/A // For example, if the shift is 63, we just propagate sign bits.
0N/A if (r2->is_con()) {
0N/A uint shift = r2->get_con();
0N/A shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
0N/A // Shift by a multiple of 64 does nothing:
0N/A if (shift == 0) return t1;
0N/A // Calculate reasonably aggressive bounds for the result.
0N/A // This is necessary if we are to correctly type things
0N/A // like (x<<24>>24) == ((byte)x).
0N/A jlong lo = (jlong)r1->_lo >> (jlong)shift;
0N/A jlong hi = (jlong)r1->_hi >> (jlong)shift;
0N/A assert(lo <= hi, "must have valid bounds");
0N/A const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
0N/A #ifdef ASSERT
0N/A // Make sure we get the sign-capture idiom correct.
0N/A if (shift == (2*BitsPerJavaInteger)-1) {
0N/A if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
0N/A if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
0N/A }
0N/A #endif
0N/A return tl;
0N/A }
0N/A
0N/A return TypeLong::LONG; // Give up
0N/A}
0N/A
0N/A//=============================================================================
0N/A//------------------------------Identity---------------------------------------
0N/ANode *URShiftINode::Identity( PhaseTransform *phase ) {
0N/A const TypeInt *ti = phase->type( in(2) )->isa_int();
0N/A if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
0N/A
0N/A // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
0N/A // Happens during new-array length computation.
0N/A // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
0N/A Node *add = in(1);
0N/A if( add->Opcode() == Op_AddI ) {
0N/A const TypeInt *t2 = phase->type(add->in(2))->isa_int();
0N/A if( t2 && t2->is_con(wordSize - 1) &&
0N/A add->in(1)->Opcode() == Op_LShiftI ) {
0N/A // Check that shift_counts are LogBytesPerWord
0N/A Node *lshift_count = add->in(1)->in(2);
0N/A const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
0N/A if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
0N/A t_lshift_count == phase->type(in(2)) ) {
0N/A Node *x = add->in(1)->in(1);
0N/A const TypeInt *t_x = phase->type(x)->isa_int();
0N/A if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
0N/A return x;
0N/A }
0N/A }
0N/A }
0N/A }
0N/A
0N/A return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
0N/A}
0N/A
0N/A//------------------------------Ideal------------------------------------------
0N/ANode *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A const TypeInt *t2 = phase->type( in(2) )->isa_int();
0N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
0N/A const int con = t2->get_con() & 31; // Shift count is always masked
0N/A if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
0N/A // We'll be wanting the right-shift amount as a mask of that many bits
0N/A const int mask = right_n_bits(BitsPerJavaInteger - con);
0N/A
0N/A int in1_op = in(1)->Opcode();
0N/A
0N/A // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
0N/A if( in1_op == Op_URShiftI ) {
0N/A const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
0N/A if( t12 && t12->is_con() ) { // Right input is a constant
0N/A assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
0N/A const int con2 = t12->get_con() & 31; // Shift count is always masked
0N/A const int con3 = con+con2;
0N/A if( con3 < 32 ) // Only merge shifts if total is < 32
4022N/A return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) );
0N/A }
0N/A }
0N/A
0N/A // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
0N/A // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
0N/A // If Q is "X << z" the rounding is useless. Look for patterns like
0N/A // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
0N/A Node *add = in(1);
0N/A if( in1_op == Op_AddI ) {
0N/A Node *lshl = add->in(1);
0N/A if( lshl->Opcode() == Op_LShiftI &&
0N/A phase->type(lshl->in(2)) == t2 ) {
4022N/A Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) );
4022N/A Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) );
4022N/A return new (phase->C) AndINode( sum, phase->intcon(mask) );
0N/A }
0N/A }
0N/A
0N/A // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
0N/A // This shortens the mask. Also, if we are extracting a high byte and
0N/A // storing it to a buffer, the mask will be removed completely.
0N/A Node *andi = in(1);
0N/A if( in1_op == Op_AndI ) {
0N/A const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
0N/A if( t3 && t3->is_con() ) { // Right input is a constant
0N/A jint mask2 = t3->get_con();
0N/A mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
4022N/A Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) );
4022N/A return new (phase->C) AndINode(newshr, phase->intcon(mask2));
0N/A // The negative values are easier to materialize than positive ones.
0N/A // A typical case from address arithmetic is ((x & ~15) >> 4).
0N/A // It's better to change that to ((x >> 4) & ~0) versus
0N/A // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
0N/A }
0N/A }
0N/A
0N/A // Check for "(X << z ) >>> z" which simply zero-extends
0N/A Node *shl = in(1);
0N/A if( in1_op == Op_LShiftI &&
0N/A phase->type(shl->in(2)) == t2 )
4022N/A return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) );
0N/A
0N/A return NULL;
0N/A}
0N/A
0N/A//------------------------------Value------------------------------------------
0N/A// A URShiftINode shifts its input2 right by input1 amount.
0N/Aconst Type *URShiftINode::Value( PhaseTransform *phase ) const {
0N/A // (This is a near clone of RShiftINode::Value.)
0N/A const Type *t1 = phase->type( in(1) );
0N/A const Type *t2 = phase->type( in(2) );
0N/A // Either input is TOP ==> the result is TOP
0N/A if( t1 == Type::TOP ) return Type::TOP;
0N/A if( t2 == Type::TOP ) return Type::TOP;
0N/A
0N/A // Left input is ZERO ==> the result is ZERO.
0N/A if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
0N/A // Shift by zero does nothing
0N/A if( t2 == TypeInt::ZERO ) return t1;
0N/A
0N/A // Either input is BOTTOM ==> the result is BOTTOM
0N/A if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
0N/A return TypeInt::INT;
0N/A
0N/A if (t2 == TypeInt::INT)
0N/A return TypeInt::INT;
0N/A
0N/A const TypeInt *r1 = t1->is_int(); // Handy access
0N/A const TypeInt *r2 = t2->is_int(); // Handy access
0N/A
0N/A if (r2->is_con()) {
0N/A uint shift = r2->get_con();
0N/A shift &= BitsPerJavaInteger-1; // semantics of Java shifts
0N/A // Shift by a multiple of 32 does nothing:
0N/A if (shift == 0) return t1;
0N/A // Calculate reasonably aggressive bounds for the result.
0N/A jint lo = (juint)r1->_lo >> (juint)shift;
0N/A jint hi = (juint)r1->_hi >> (juint)shift;
0N/A if (r1->_hi >= 0 && r1->_lo < 0) {
0N/A // If the type has both negative and positive values,
0N/A // there are two separate sub-domains to worry about:
0N/A // The positive half and the negative half.
0N/A jint neg_lo = lo;
0N/A jint neg_hi = (juint)-1 >> (juint)shift;
0N/A jint pos_lo = (juint) 0 >> (juint)shift;
0N/A jint pos_hi = hi;
0N/A lo = MIN2(neg_lo, pos_lo); // == 0
0N/A hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
0N/A }
0N/A assert(lo <= hi, "must have valid bounds");
0N/A const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
0N/A #ifdef ASSERT
0N/A // Make sure we get the sign-capture idiom correct.
0N/A if (shift == BitsPerJavaInteger-1) {
0N/A if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
0N/A if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
0N/A }
0N/A #endif
0N/A return ti;
0N/A }
0N/A
0N/A //
0N/A // Do not support shifted oops in info for GC
0N/A //
0N/A // else if( t1->base() == Type::InstPtr ) {
0N/A //
0N/A // const TypeInstPtr *o = t1->is_instptr();
0N/A // if( t1->singleton() )
0N/A // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
0N/A // }
0N/A // else if( t1->base() == Type::KlassPtr ) {
0N/A // const TypeKlassPtr *o = t1->is_klassptr();
0N/A // if( t1->singleton() )
0N/A // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
0N/A // }
0N/A
0N/A return TypeInt::INT;
0N/A}
0N/A
0N/A//=============================================================================
0N/A//------------------------------Identity---------------------------------------
0N/ANode *URShiftLNode::Identity( PhaseTransform *phase ) {
0N/A const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
0N/A return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
0N/A}
0N/A
0N/A//------------------------------Ideal------------------------------------------
0N/ANode *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
0N/A const TypeInt *t2 = phase->type( in(2) )->isa_int();
0N/A if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
0N/A const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
0N/A if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
0N/A // note: mask computation below does not work for 0 shift count
0N/A // We'll be wanting the right-shift amount as a mask of that many bits
559N/A const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) -1);
0N/A
0N/A // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
0N/A // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
0N/A // If Q is "X << z" the rounding is useless. Look for patterns like
0N/A // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
0N/A Node *add = in(1);
0N/A if( add->Opcode() == Op_AddL ) {
0N/A Node *lshl = add->in(1);
0N/A if( lshl->Opcode() == Op_LShiftL &&
0N/A phase->type(lshl->in(2)) == t2 ) {
4022N/A Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) );
4022N/A Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) );
4022N/A return new (phase->C) AndLNode( sum, phase->longcon(mask) );
0N/A }
0N/A }
0N/A
0N/A // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
0N/A // This shortens the mask. Also, if we are extracting a high byte and
0N/A // storing it to a buffer, the mask will be removed completely.
0N/A Node *andi = in(1);
0N/A if( andi->Opcode() == Op_AndL ) {
0N/A const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
0N/A if( t3 && t3->is_con() ) { // Right input is a constant
0N/A jlong mask2 = t3->get_con();
0N/A mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
4022N/A Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) );
4022N/A return new (phase->C) AndLNode(newshr, phase->longcon(mask2));
0N/A }
0N/A }
0N/A
0N/A // Check for "(X << z ) >>> z" which simply zero-extends
0N/A Node *shl = in(1);
0N/A if( shl->Opcode() == Op_LShiftL &&
0N/A phase->type(shl->in(2)) == t2 )
4022N/A return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) );
0N/A
0N/A return NULL;
0N/A}
0N/A
0N/A//------------------------------Value------------------------------------------
0N/A// A URShiftINode shifts its input2 right by input1 amount.
0N/Aconst Type *URShiftLNode::Value( PhaseTransform *phase ) const {
0N/A // (This is a near clone of RShiftLNode::Value.)
0N/A const Type *t1 = phase->type( in(1) );
0N/A const Type *t2 = phase->type( in(2) );
0N/A // Either input is TOP ==> the result is TOP
0N/A if( t1 == Type::TOP ) return Type::TOP;
0N/A if( t2 == Type::TOP ) return Type::TOP;
0N/A
0N/A // Left input is ZERO ==> the result is ZERO.
0N/A if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
0N/A // Shift by zero does nothing
0N/A if( t2 == TypeInt::ZERO ) return t1;
0N/A
0N/A // Either input is BOTTOM ==> the result is BOTTOM
0N/A if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
0N/A return TypeLong::LONG;
0N/A
0N/A if (t2 == TypeInt::INT)
0N/A return TypeLong::LONG;
0N/A
0N/A const TypeLong *r1 = t1->is_long(); // Handy access
0N/A const TypeInt *r2 = t2->is_int (); // Handy access
0N/A
0N/A if (r2->is_con()) {
0N/A uint shift = r2->get_con();
559N/A shift &= BitsPerJavaLong - 1; // semantics of Java shifts
0N/A // Shift by a multiple of 64 does nothing:
0N/A if (shift == 0) return t1;
0N/A // Calculate reasonably aggressive bounds for the result.
0N/A jlong lo = (julong)r1->_lo >> (juint)shift;
0N/A jlong hi = (julong)r1->_hi >> (juint)shift;
0N/A if (r1->_hi >= 0 && r1->_lo < 0) {
0N/A // If the type has both negative and positive values,
0N/A // there are two separate sub-domains to worry about:
0N/A // The positive half and the negative half.
0N/A jlong neg_lo = lo;
0N/A jlong neg_hi = (julong)-1 >> (juint)shift;
0N/A jlong pos_lo = (julong) 0 >> (juint)shift;
0N/A jlong pos_hi = hi;
0N/A //lo = MIN2(neg_lo, pos_lo); // == 0
0N/A lo = neg_lo < pos_lo ? neg_lo : pos_lo;
0N/A //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
0N/A hi = neg_hi > pos_hi ? neg_hi : pos_hi;
0N/A }
0N/A assert(lo <= hi, "must have valid bounds");
0N/A const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
0N/A #ifdef ASSERT
0N/A // Make sure we get the sign-capture idiom correct.
559N/A if (shift == BitsPerJavaLong - 1) {
0N/A if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
0N/A if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
0N/A }
0N/A #endif
0N/A return tl;
0N/A }
0N/A
0N/A return TypeLong::LONG; // Give up
0N/A}