0N/A

1879N/A#ifndef SHARE_VM_OPTO_CHAITIN_HPP

1879N/A#define SHARE_VM_OPTO_CHAITIN_HPP

1879N/A

1879N/A#include "code/vmreg.hpp"

1879N/A#include "libadt/port.hpp"

1879N/A#include "memory/resourceArea.hpp"

1879N/A#include "opto/connode.hpp"

1879N/A#include "opto/live.hpp"

1879N/A#include "opto/matcher.hpp"

1879N/A#include "opto/phase.hpp"

1879N/A#include "opto/regalloc.hpp"

1879N/A#include "opto/regmask.hpp"

1879N/A

0N/Aclass LoopTree;

0N/Aclass MachCallNode;

0N/Aclass MachSafePointNode;

0N/Aclass Matcher;

0N/Aclass PhaseCFG;

0N/Aclass PhaseLive;

0N/Aclass PhaseRegAlloc;

0N/Aclass PhaseChaitin;

0N/A

0N/A#define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001)

0N/A#define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25)

0N/A

0N/Aclass LRG : public ResourceObj {

2772N/A friend class VMStructs;

0N/Apublic:

0N/A enum { SPILL_REG=29999 }; // Register number of a spilled LRG

0N/A

0N/A double _cost; // 2 for loads/1 for stores times block freq

0N/A double _area; // Sum of all simultaneously live values

0N/A double score() const; // Compute score from cost and area

0N/A double _maxfreq; // Maximum frequency of any def or use

0N/A

0N/A Node *_def; // Check for multi-def live ranges

0N/A#ifndef PRODUCT

0N/A GrowableArray<Node*>* _defs;

0N/A#endif

0N/A

0N/A uint _risk_bias; // Index of LRG which we want to avoid color

0N/A uint _copy_bias; // Index of LRG which we want to share color

0N/A

0N/A uint _next; // Index of next LRG in linked list

0N/A uint _prev; // Index of prev LRG in linked list

0N/Aprivate:

0N/A uint _reg; // Chosen register; undefined if mask is plural

0N/Apublic:

0N/A // Return chosen register for this LRG. Error if the LRG is not bound to

0N/A // a single register.

0N/A OptoReg::Name reg() const { return OptoReg::Name(_reg); }

0N/A void set_reg( OptoReg::Name r ) { _reg = r; }

0N/A

0N/Aprivate:

0N/A uint _eff_degree; // Effective degree: Sum of neighbors _num_regs

0N/Apublic:

0N/A int degree() const { assert( _degree_valid, "" ); return _eff_degree; }

0N/A // Degree starts not valid and any change to the IFG neighbor

0N/A // set makes it not valid.

0N/A void set_degree( uint degree ) { _eff_degree = degree; debug_only(_degree_valid = 1;) }

0N/A // Made a change that hammered degree

0N/A void invalid_degree() { debug_only(_degree_valid=0;) }

0N/A // Incrementally modify degree. If it was correct, it should remain correct

0N/A void inc_degree( uint mod ) { _eff_degree += mod; }

0N/A // Compute the degree between 2 live ranges

0N/A int compute_degree( LRG &l ) const;

0N/A

0N/Aprivate:

0N/A RegMask _mask; // Allowed registers for this LRG

0N/A uint _mask_size; // cache of _mask.Size();

0N/Apublic:

0N/A int compute_mask_size() const { return _mask.is_AllStack() ? 65535 : _mask.Size(); }

0N/A void set_mask_size( int size ) {

0N/A assert((size == 65535) || (size == (int)_mask.Size()), "");

0N/A _mask_size = size;

3845N/A#ifdef ASSERT

3845N/A _msize_valid=1;

3845N/A if (_is_vector) {

3845N/A assert(!_fat_proj, "sanity");

3845N/A _mask.verify_sets(_num_regs);

3845N/A } else if (_num_regs == 2 && !_fat_proj) {

3845N/A _mask.verify_pairs();

3845N/A }

3845N/A#endif

0N/A }

0N/A void compute_set_mask_size() { set_mask_size(compute_mask_size()); }

0N/A int mask_size() const { assert( _msize_valid, "mask size not valid" );

0N/A return _mask_size; }

0N/A // Get the last mask size computed, even if it does not match the

0N/A // count of bits in the current mask.

0N/A int get_invalid_mask_size() const { return _mask_size; }

0N/A const RegMask &mask() const { return _mask; }

0N/A void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}

0N/A void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}

0N/A void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}

0N/A void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; }

0N/A void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }

0N/A void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) }

0N/A void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) }

3845N/A void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) }

3845N/A void clear_to_sets() { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }

0N/A

0N/A // Number of registers this live range uses when it colors

0N/Aprivate:

0N/A uint8 _num_regs; // 2 for Longs and Doubles, 1 for all else

0N/A // except _num_regs is kill count for fat_proj

0N/Apublic:

0N/A int num_regs() const { return _num_regs; }

0N/A void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }

0N/A

0N/Aprivate:

0N/A // Number of physical registers this live range uses when it colors

0N/A // Architecture and register-set dependent

0N/A uint8 _reg_pressure;

0N/Apublic:

0N/A void set_reg_pressure(int i) { _reg_pressure = i; }

0N/A int reg_pressure() const { return _reg_pressure; }

0N/A

0N/A // How much 'wiggle room' does this live range have?

0N/A // How many color choices can it make (scaled by _num_regs)?

0N/A int degrees_of_freedom() const { return mask_size() - _num_regs; }

0N/A // Bound LRGs have ZERO degrees of freedom. We also count

0N/A // must_spill as bound.

0N/A bool is_bound () const { return _is_bound; }

0N/A // Negative degrees-of-freedom; even with no neighbors this

0N/A // live range must spill.

0N/A bool not_free() const { return degrees_of_freedom() < 0; }

0N/A // Is this live range of "low-degree"? Trivially colorable?

0N/A bool lo_degree () const { return degree() <= degrees_of_freedom(); }

0N/A // Is this live range just barely "low-degree"? Trivially colorable?

0N/A bool just_lo_degree () const { return degree() == degrees_of_freedom(); }

0N/A

0N/A uint _is_oop:1, // Live-range holds an oop

0N/A _is_float:1, // True if in float registers

3845N/A _is_vector:1, // True if in vector registers

0N/A _was_spilled1:1, // True if prior spilling on def

0N/A _was_spilled2:1, // True if twice prior spilling on def

0N/A _is_bound:1, // live range starts life with no

0N/A // degrees of freedom.

0N/A _direct_conflict:1, // True if def and use registers in conflict

0N/A _must_spill:1, // live range has lost all degrees of freedom

0N/A // If _fat_proj is set, live range does NOT require aligned, adjacent

0N/A // registers and has NO interferences.

0N/A // If _fat_proj is clear, live range requires num_regs() to be a power of

0N/A // 2, and it requires registers to form an aligned, adjacent set.

0N/A _fat_proj:1, //

0N/A _was_lo:1, // Was lo-degree prior to coalesce

0N/A _msize_valid:1, // _mask_size cache valid

0N/A _degree_valid:1, // _degree cache valid

0N/A _has_copy:1, // Adjacent to some copy instruction

0N/A _at_risk:1; // Simplify says this guy is at risk to spill

0N/A

0N/A

0N/A // Alive if non-zero, dead if zero

0N/A bool alive() const { return _def != NULL; }

295N/A bool is_multidef() const { return _def == NodeSentinel; }

295N/A bool is_singledef() const { return _def != NodeSentinel; }

0N/A

0N/A#ifndef PRODUCT

0N/A void dump( ) const;

0N/A#endif

0N/A};

0N/A

0N/Aclass LRG_List : public ResourceObj {

2772N/A friend class VMStructs;

0N/A uint _cnt, _max;

0N/A uint* _lidxs;

0N/A ReallocMark _nesting; // assertion check for reallocations

0N/Apublic:

0N/A LRG_List( uint max );

0N/A

0N/A uint lookup( uint nidx ) const {

0N/A return _lidxs[nidx];

0N/A }

0N/A uint operator[] (uint nidx) const { return lookup(nidx); }

0N/A

0N/A void map( uint nidx, uint lidx ) {

0N/A assert( nidx < _cnt, "oob" );

0N/A _lidxs[nidx] = lidx;

0N/A }

0N/A void extend( uint nidx, uint lidx );

0N/A

0N/A uint Size() const { return _cnt; }

0N/A};

0N/A

0N/Aclass PhaseIFG : public Phase {

2772N/A friend class VMStructs;

0N/A // Current implementation: a triangular adjacency list.

0N/A

0N/A // Array of adjacency-lists, indexed by live-range number

0N/A IndexSet *_adjs;

0N/A

0N/A // Assertion bit for proper use of Squaring

0N/A bool _is_square;

0N/A

0N/A // Live range structure goes here

0N/A LRG *_lrgs; // Array of LRG structures

0N/A

0N/Apublic:

0N/A // Largest live-range number

0N/A uint _maxlrg;

0N/A

0N/A Arena *_arena;

0N/A

0N/A // Keep track of inserted and deleted Nodes

0N/A VectorSet *_yanked;

0N/A

0N/A PhaseIFG( Arena *arena );

0N/A void init( uint maxlrg );

0N/A

0N/A // Add edge between a and b. Returns true if actually addded.

0N/A int add_edge( uint a, uint b );

0N/A

0N/A // Add edge between a and everything in the vector

0N/A void add_vector( uint a, IndexSet *vec );

0N/A

0N/A // Test for edge existance

0N/A int test_edge( uint a, uint b ) const;

0N/A

0N/A // Square-up matrix for faster Union

0N/A void SquareUp();

0N/A

0N/A // Return number of LRG neighbors

0N/A uint neighbor_cnt( uint a ) const { return _adjs[a].count(); }

0N/A // Union edges of b into a on Squared-up matrix

0N/A void Union( uint a, uint b );

0N/A // Test for edge in Squared-up matrix

0N/A int test_edge_sq( uint a, uint b ) const;

0N/A // Yank a Node and all connected edges from the IFG. Be prepared to

0N/A // re-insert the yanked Node in reverse order of yanking. Return a

0N/A // list of neighbors (edges) yanked.

0N/A IndexSet *remove_node( uint a );

0N/A // Reinsert a yanked Node

0N/A void re_insert( uint a );

0N/A // Return set of neighbors

0N/A IndexSet *neighbors( uint a ) const { return &_adjs[a]; }

0N/A

0N/A#ifndef PRODUCT

0N/A // Dump the IFG

0N/A void dump() const;

0N/A void stats() const;

0N/A void verify( const PhaseChaitin * ) const;

0N/A#endif

0N/A

0N/A //--------------- Live Range Accessors

0N/A LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; }

0N/A

0N/A // Compute and set effective degree. Might be folded into SquareUp().

0N/A void Compute_Effective_Degree();

0N/A

0N/A // Compute effective degree as the sum of neighbors' _sizes.

0N/A int effective_degree( uint lidx ) const;

0N/A};

0N/A

0N/A

0N/A#ifdef SPARC

0N/A#define FLOAT_INCREMENT(regs) regs

0N/A#else

0N/A#define FLOAT_INCREMENT(regs) 1

0N/A#endif

0N/A

0N/Aclass PhaseChaitin : public PhaseRegAlloc {

2772N/A friend class VMStructs;

0N/A

0N/A int _trip_cnt;

0N/A int _alternate;

0N/A

0N/A uint _maxlrg; // Max live range number

0N/A LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); }

0N/A PhaseLive *_live; // Liveness, used in the interference graph

0N/A PhaseIFG *_ifg; // Interference graph (for original chunk)

0N/A Node_List **_lrg_nodes; // Array of node; lists for lrgs which spill

0N/A VectorSet _spilled_once; // Nodes that have been spilled

0N/A VectorSet _spilled_twice; // Nodes that have been spilled twice

0N/A

0N/A LRG_List _names; // Map from Nodes to Live RanGes

0N/A

0N/A // Union-find map. Declared as a short for speed.

0N/A // Indexed by live-range number, it returns the compacted live-range number

0N/A LRG_List _uf_map;

0N/A // Reset the Union-Find map to identity

0N/A void reset_uf_map( uint maxlrg );

0N/A // Remove the need for the Union-Find mapping

0N/A void compress_uf_map_for_nodes( );

0N/A

0N/A // Combine the Live Range Indices for these 2 Nodes into a single live

0N/A // range. Future requests for any Node in either live range will

0N/A // return the live range index for the combined live range.

0N/A void Union( const Node *src, const Node *dst );

0N/A

0N/A void new_lrg( const Node *x, uint lrg );

0N/A

0N/A // Compact live ranges, removing unused ones. Return new maxlrg.

0N/A void compact();

0N/A

0N/A uint _lo_degree; // Head of lo-degree LRGs list

0N/A uint _lo_stk_degree; // Head of lo-stk-degree LRGs list

0N/A uint _hi_degree; // Head of hi-degree LRGs list

0N/A uint _simplified; // Linked list head of simplified LRGs

0N/A

0N/A // Helper functions for Split()

0N/A uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx );

0N/A uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx );

0N/A int clone_projs( Block *b, uint idx, Node *con, Node *copy, uint &maxlrg );

295N/A Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits,

295N/A int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru);

0N/A // True if lidx is used before any real register is def'd in the block

0N/A bool prompt_use( Block *b, uint lidx );

0N/A Node *get_spillcopy_wide( Node *def, Node *use, uint uidx );

605N/A // Insert the spill at chosen location. Skip over any intervening Proj's or

0N/A // Phis. Skip over a CatchNode and projs, inserting in the fall-through block

0N/A // instead. Update high-pressure indices. Create a new live range.

0N/A void insert_proj( Block *b, uint i, Node *spill, uint maxlrg );

0N/A

0N/A bool is_high_pressure( Block *b, LRG *lrg, uint insidx );

0N/A

0N/A uint _oldphi; // Node index which separates pre-allocation nodes

0N/A

0N/A Block **_blks; // Array of blocks sorted by frequency for coalescing

0N/A

673N/A float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info

673N/A

0N/A#ifndef PRODUCT

0N/A bool _trace_spilling;

0N/A#endif

0N/A

0N/Apublic:

0N/A PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher );

0N/A ~PhaseChaitin() {}

0N/A

0N/A // Convert a Node into a Live Range Index - a lidx

0N/A uint Find( const Node *n ) {

0N/A uint lidx = n2lidx(n);

0N/A uint uf_lidx = _uf_map[lidx];

0N/A return (uf_lidx == lidx) ? uf_lidx : Find_compress(n);

0N/A }

0N/A uint Find_const( uint lrg ) const;

0N/A uint Find_const( const Node *n ) const;

0N/A

0N/A // Do all the real work of allocate

0N/A void Register_Allocate();

0N/A

0N/A uint n2lidx( const Node *n ) const { return _names[n->_idx]; }

0N/A

673N/A float high_frequency_lrg() const { return _high_frequency_lrg; }

673N/A

0N/A#ifndef PRODUCT

0N/A bool trace_spilling() const { return _trace_spilling; }

0N/A#endif

0N/A

0N/Aprivate:

0N/A // De-SSA the world. Assign registers to Nodes. Use the same register for

0N/A // all inputs to a PhiNode, effectively coalescing live ranges. Insert

0N/A // copies as needed.

0N/A void de_ssa();

0N/A uint Find_compress( const Node *n );

0N/A uint Find( uint lidx ) {

0N/A uint uf_lidx = _uf_map[lidx];

0N/A return (uf_lidx == lidx) ? uf_lidx : Find_compress(lidx);

0N/A }

0N/A uint Find_compress( uint lidx );

0N/A

0N/A uint Find_id( const Node *n ) {

0N/A uint retval = n2lidx(n);

0N/A assert(retval == Find(n),"Invalid node to lidx mapping");

0N/A return retval;

0N/A }

0N/A

0N/A // Add edge between reg and everything in the vector.

0N/A // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask

0N/A // information to trim the set of interferences. Return the

0N/A // count of edges added.

0N/A void interfere_with_live( uint reg, IndexSet *live );

0N/A // Count register pressure for asserts

0N/A uint count_int_pressure( IndexSet *liveout );

0N/A uint count_float_pressure( IndexSet *liveout );

0N/A

0N/A // Build the interference graph using virtual registers only.

0N/A // Used for aggressive coalescing.

0N/A void build_ifg_virtual( );

0N/A

0N/A // Build the interference graph using physical registers when available.

0N/A // That is, if 2 live ranges are simultaneously alive but in their

0N/A // acceptable register sets do not overlap, then they do not interfere.

0N/A uint build_ifg_physical( ResourceArea *a );

0N/A

0N/A // Gather LiveRanGe information, including register masks and base pointer/

0N/A // derived pointer relationships.

0N/A void gather_lrg_masks( bool mod_cisc_masks );

0N/A

0N/A // Force the bases of derived pointers to be alive at GC points.

0N/A bool stretch_base_pointer_live_ranges( ResourceArea *a );

0N/A // Helper to stretch above; recursively discover the base Node for

0N/A // a given derived Node. Easy for AddP-related machine nodes, but

0N/A // needs to be recursive for derived Phis.

0N/A Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg );

0N/A

0N/A // Set the was-lo-degree bit. Conservative coalescing should not change the

0N/A // colorability of the graph. If any live range was of low-degree before

0N/A // coalescing, it should Simplify. This call sets the was-lo-degree bit.

0N/A void set_was_low();

0N/A

0N/A // Split live-ranges that must spill due to register conflicts (as opposed

0N/A // to capacity spills). Typically these are things def'd in a register

0N/A // and used on the stack or vice-versa.

0N/A void pre_spill();

0N/A

0N/A // Init LRG caching of degree, numregs. Init lo_degree list.

0N/A void cache_lrg_info( );

0N/A

0N/A // Simplify the IFG by removing LRGs of low degree with no copies

0N/A void Pre_Simplify();

0N/A

0N/A // Simplify the IFG by removing LRGs of low degree

0N/A void Simplify();

0N/A

0N/A // Select colors by re-inserting edges into the IFG.

605N/A // Return TRUE if any spills occurred.

0N/A uint Select( );

0N/A // Helper function for select which allows biased coloring

0N/A OptoReg::Name choose_color( LRG &lrg, int chunk );

0N/A // Helper function which implements biasing heuristic

0N/A OptoReg::Name bias_color( LRG &lrg, int chunk );

0N/A

0N/A // Split uncolorable live ranges

0N/A // Return new number of live ranges

3982N/A uint Split(uint maxlrg, ResourceArea* split_arena);

0N/A

0N/A // Copy 'was_spilled'-edness from one Node to another.

0N/A void copy_was_spilled( Node *src, Node *dst );

0N/A // Set the 'spilled_once' or 'spilled_twice' flag on a node.

0N/A void set_was_spilled( Node *n );

0N/A

0N/A // Convert ideal spill-nodes into machine loads & stores

0N/A // Set C->failing when fixup spills could not complete, node limit exceeded.

0N/A void fixup_spills();

0N/A

0N/A // Post-Allocation peephole copy removal

0N/A void post_allocate_copy_removal();

0N/A Node *skip_copies( Node *c );

923N/A // Replace the old node with the current live version of that value

923N/A // and yank the old value if it's dead.

923N/A int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg,

923N/A Block *current_block, Node_List& value, Node_List& regnd ) {

923N/A Node* v = regnd[nreg];

923N/A assert(v->outcnt() != 0, "no dead values");

923N/A old->replace_by(v);

923N/A return yank_if_dead(old, current_block, &value, &regnd);

923N/A }

923N/A

3056N/A int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {

3056N/A return yank_if_dead_recurse(old, old, current_block, value, regnd);

3056N/A }

3056N/A int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,

3056N/A Node_List *value, Node_List *regnd);

2767N/A int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd );

0N/A int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List &regnd, bool can_change_regs );

0N/A int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List &regnd );

0N/A bool may_be_copy_of_callee( Node *def ) const;

0N/A

0N/A // If nreg already contains the same constant as val then eliminate it

70N/A bool eliminate_copy_of_constant(Node* val, Node* n,

70N/A Block *current_block, Node_List& value, Node_List &regnd,

0N/A OptoReg::Name nreg, OptoReg::Name nreg2);

0N/A // Extend the node to LRG mapping

0N/A void add_reference( const Node *node, const Node *old_node);

0N/A

0N/Aprivate:

0N/A

0N/A static int _final_loads, _final_stores, _final_copies, _final_memoves;

0N/A static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost;

0N/A static int _conserv_coalesce, _conserv_coalesce_pair;

0N/A static int _conserv_coalesce_trie, _conserv_coalesce_quad;

0N/A static int _post_alloc;

0N/A static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce;

0N/A static int _used_cisc_instructions, _unused_cisc_instructions;

0N/A static int _allocator_attempts, _allocator_successes;

0N/A

0N/A#ifndef PRODUCT

0N/A static uint _high_pressure, _low_pressure;

0N/A

0N/A void dump() const;

0N/A void dump( const Node *n ) const;

0N/A void dump( const Block * b ) const;

0N/A void dump_degree_lists() const;

0N/A void dump_simplified() const;

1923N/A void dump_lrg( uint lidx, bool defs_only) const;

1923N/A void dump_lrg( uint lidx) const {

1923N/A // dump defs and uses by default

1923N/A dump_lrg(lidx, false);

1923N/A }

0N/A void dump_bb( uint pre_order ) const;

0N/A

0N/A // Verify that base pointers and derived pointers are still sane

0N/A void verify_base_ptrs( ResourceArea *a ) const;

0N/A

566N/A void verify( ResourceArea *a, bool verify_ifg = false ) const;

566N/A

0N/A void dump_for_spill_split_recycle() const;

0N/A

0N/Apublic:

0N/A void dump_frame() const;

0N/A char *dump_register( const Node *n, char *buf ) const;

0N/Aprivate:

0N/A static void print_chaitin_statistics();

0N/A#endif

0N/A friend class PhaseCoalesce;

0N/A friend class PhaseAggressiveCoalesce;

0N/A friend class PhaseConservativeCoalesce;

0N/A};

1879N/A

1879N/A#endif // SHARE_VM_OPTO_CHAITIN_HPP