c1_MacroAssembler.hpp revision 1879
0N/A/*
2362N/A * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
2362N/A * published by the Free Software Foundation.
0N/A *
2362N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
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0N/A *
0N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
0N/A * or visit www.oracle.com if you need additional information or have any
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2362N/A */
0N/A
0N/A#ifndef SHARE_VM_C1_C1_MACROASSEMBLER_HPP
0N/A#define SHARE_VM_C1_C1_MACROASSEMBLER_HPP
0N/A
0N/A#include "asm/assembler.hpp"
0N/A#ifdef TARGET_ARCH_x86
0N/A# include "assembler_x86.inline.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_sparc
0N/A# include "assembler_sparc.inline.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_zero
0N/A# include "assembler_zero.inline.hpp"
0N/A#endif
0N/A
0N/Aclass CodeEmitInfo;
0N/A
0N/Aclass C1_MacroAssembler: public MacroAssembler {
0N/A public:
0N/A // creation
0N/A C1_MacroAssembler(CodeBuffer* code) : MacroAssembler(code) { pd_init(); }
0N/A
0N/A //----------------------------------------------------
0N/A void explicit_null_check(Register base);
0N/A
0N/A void inline_cache_check(Register receiver, Register iCache);
0N/A void build_frame(int frame_size_in_bytes);
0N/A void remove_frame(int frame_size_in_bytes);
0N/A
0N/A void unverified_entry(Register receiver, Register ic_klass);
0N/A void verified_entry();
0N/A void verify_stack_oop(int offset) PRODUCT_RETURN;
0N/A void verify_not_null_oop(Register r) PRODUCT_RETURN;
0N/A
0N/A#ifdef TARGET_ARCH_x86
0N/A# include "c1_MacroAssembler_x86.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_sparc
0N/A# include "c1_MacroAssembler_sparc.hpp"
0N/A#endif
0N/A
0N/A};
0N/A
0N/A
0N/A
0N/A// A StubAssembler is a MacroAssembler w/ extra functionality for runtime
0N/A// stubs. Currently it 'knows' some stub info. Eventually, the information
0N/A// may be set automatically or can be asserted when using specialised
0N/A// StubAssembler functions.
0N/A
0N/Aclass StubAssembler: public C1_MacroAssembler {
0N/A private:
0N/A const char* _name;
0N/A bool _must_gc_arguments;
0N/A int _frame_size;
0N/A int _num_rt_args;
0N/A int _stub_id;
0N/A
0N/A public:
0N/A // creation
0N/A StubAssembler(CodeBuffer* code, const char * name, int stub_id);
0N/A void set_info(const char* name, bool must_gc_arguments);
0N/A
0N/A void set_frame_size(int size);
0N/A void set_num_rt_args(int args);
0N/A
0N/A // accessors
0N/A const char* name() const { return _name; }
0N/A bool must_gc_arguments() const { return _must_gc_arguments; }
0N/A int frame_size() const { return _frame_size; }
0N/A int num_rt_args() const { return _num_rt_args; }
0N/A int stub_id() const { return _stub_id; }
0N/A
0N/A // runtime calls (return offset of call to be used by GC map)
0N/A int call_RT(Register oop_result1, Register oop_result2, address entry, int args_size = 0);
0N/A int call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1);
0N/A int call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2);
0N/A int call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3);
0N/A};
0N/A
0N/A#endif // SHARE_VM_C1_C1_MACROASSEMBLER_HPP
0N/A